OpenCores
URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [sw/] [lib/] [include/] [neorv32_xirq.h] - Blame information for rev 61

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 61 zero_gravi
// #################################################################################################
2
// # << NEORV32: neorv32_xirq.h - External Interrupt controller HW Driver >>                       #
3
// # ********************************************************************************************* #
4
// # BSD 3-Clause License                                                                          #
5
// #                                                                                               #
6
// # Copyright (c) 2021, Stephan Nolting. All rights reserved.                                     #
7
// #                                                                                               #
8
// # Redistribution and use in source and binary forms, with or without modification, are          #
9
// # permitted provided that the following conditions are met:                                     #
10
// #                                                                                               #
11
// # 1. Redistributions of source code must retain the above copyright notice, this list of        #
12
// #    conditions and the following disclaimer.                                                   #
13
// #                                                                                               #
14
// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of     #
15
// #    conditions and the following disclaimer in the documentation and/or other materials        #
16
// #    provided with the distribution.                                                            #
17
// #                                                                                               #
18
// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to  #
19
// #    endorse or promote products derived from this software without specific prior written      #
20
// #    permission.                                                                                #
21
// #                                                                                               #
22
// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS   #
23
// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF               #
24
// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE    #
25
// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,     #
26
// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
27
// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED    #
28
// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING     #
29
// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED  #
30
// # OF THE POSSIBILITY OF SUCH DAMAGE.                                                            #
31
// # ********************************************************************************************* #
32
// # The NEORV32 Processor - https://github.com/stnolting/neorv32              (c) Stephan Nolting #
33
// #################################################################################################
34
 
35
 
36
/**********************************************************************//**
37
 * @file neorv32_xirq.h
38
 * @author Stephan Nolting
39
 * @brief SExternal Interrupt controller HW driver header file.
40
 **************************************************************************/
41
 
42
#ifndef neorv32_xirq_h
43
#define neorv32_xirq_h
44
 
45
 
46
/**********************************************************************//**
47
 * @name XIRQ fast interrupt channel
48
 **************************************************************************/
49
 /**@{*/
50
/** XIRQ MIE FIRQ bit */
51
#define XIRQ_FIRQ_ENABLE  CSR_MIE_FIRQ8E  // MIE FIRQ bit
52
/** XIRQ MIP FIRQ bit */
53
#define XIRQ_FIRQ_PENDING CSR_MIP_FIRQ8P  // MIP FIRQ bit
54
/** XIRQ RTE IRQ ID */
55
#define XIRQ_RTE_ID       RTE_TRAP_FIRQ_8 // RTE IRQ ID
56
/**@}*/
57
 
58
 
59
// prototypes
60
int neorv32_xirq_available(void);
61
int neorv32_xirq_setup(void);
62
void neorv32_xirq_global_enable(void);
63
void neorv32_xirq_global_disable(void);
64
int neorv32_xirq_get_num(void);
65
 
66
int neorv32_xirq_install(uint8_t ch, void (*handler)(void));
67
int neorv32_xirq_uninstall(uint8_t ch);
68
 
69
 
70
#endif // neorv32_xirq_h

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.