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[/] [neorv32/] [trunk/] [sw/] [lib/] [source/] [neorv32_pwm.c] - Blame information for rev 61

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// #################################################################################################
// # << NEORV32: neorv32_pwm.c - Pulse Width Modulation Controller (PWM) HW Driver >>              #
// # ********************************************************************************************* #
// # BSD 3-Clause License                                                                          #
// #                                                                                               #
// # Copyright (c) 2021, Stephan Nolting. All rights reserved.                                     #
// #                                                                                               #
// # Redistribution and use in source and binary forms, with or without modification, are          #
// # permitted provided that the following conditions are met:                                     #
// #                                                                                               #
// # 1. Redistributions of source code must retain the above copyright notice, this list of        #
// #    conditions and the following disclaimer.                                                   #
// #                                                                                               #
// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of     #
// #    conditions and the following disclaimer in the documentation and/or other materials        #
// #    provided with the distribution.                                                            #
// #                                                                                               #
// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to  #
// #    endorse or promote products derived from this software without specific prior written      #
// #    permission.                                                                                #
// #                                                                                               #
// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS   #
// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF               #
// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE    #
// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,     #
// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED    #
// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING     #
// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED  #
// # OF THE POSSIBILITY OF SUCH DAMAGE.                                                            #
// # ********************************************************************************************* #
// # The NEORV32 Processor - https://github.com/stnolting/neorv32              (c) Stephan Nolting #
// #################################################################################################
 
 
/**********************************************************************//**
 * @file neorv32_pwm.c
 * @author Stephan Nolting
 * @brief Pulse-Width Modulation Controller (PWM) HW driver source file.
 *
 * @note These functions should only be used if the PWM unit was synthesized (IO_PWM_EN = true).
 **************************************************************************/
 
#include "neorv32.h"
#include "neorv32_pwm.h"
 
 
/**********************************************************************//**
 * Check if PWM unit was synthesized.
 *
 * @return 0 if PWM was not synthesized, 1 if PWM is available.
 **************************************************************************/
int neorv32_pwm_available(void) {
 
  if (SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_IO_PWM)) {
    return 1;
  }
  else {
    return 0;
  }
}
 
 
/**********************************************************************//**
 * Enable and configure pulse width modulation controller. The PWM control register bits are listed in #NEORV32_PWM_CT_enum.
 *
 * @param[in] prsc Clock prescaler select (0..7). See #NEORV32_CLOCK_PRSC_enum.
 **************************************************************************/
void neorv32_pwm_setup(uint8_t prsc) {
 
  PWM_CT = 0; // reset
 
  uint32_t ct_enable = 1;
  ct_enable = ct_enable << PWM_CT_EN;
 
  uint32_t ct_prsc = (uint32_t)(prsc & 0x07);
  ct_prsc = ct_prsc << PWM_CT_PRSC0;
 
  PWM_CT = ct_enable | ct_prsc;
}
 
 
/**********************************************************************//**
 * Disable pulse width modulation controller.
 **************************************************************************/
void neorv32_pwm_disable(void) {
 
  PWM_CT &= ~((uint32_t)(1 << PWM_CT_EN));
}
 
 
/**********************************************************************//**
 * Enable pulse width modulation controller.
 **************************************************************************/
void neorv32_pwm_enable(void) {
 
  PWM_CT |= ((uint32_t)(1 << PWM_CT_EN));
}
 
 
/**********************************************************************//**
 * Get number of implemented channels.
 * @warning This function will override all duty cycle configuration registers.
 *
 * @return Number of implemented channels.
 **************************************************************************/
int neorv32_pmw_get_num_channels(void) {
 
  neorv32_pwm_disable();
 
  uint8_t index = 0;
  uint8_t cnt = 0;
 
  for (index=0; index<60; index++) {
    neorv32_pwm_set(index, 1);
    cnt += neorv32_pwm_get(index);
  }
 
  return (int)cnt;
}
 
 
/**********************************************************************//**
 * Set duty cycle for channel.
 *
 * @param[in] channel Channel select (0..59).
 * @param[in] duty Duty cycle (0..255).
 **************************************************************************/
void neorv32_pwm_set(uint8_t channel, uint8_t duty) {
 
  if (channel > 59) {
    return; // out-of-range
  }
 
  // compute duty-cycle offset
  uint32_t reg_offset  = (uint32_t)(channel / 4);
  uint8_t  byte_offset = channel % 4;
 
  // read-modify-write
  uint32_t duty_mask = 0xff;
  uint32_t duty_new  = (uint32_t)duty;
 
  duty_mask = duty_mask << (byte_offset * 8);
  duty_new  = duty_new  << (byte_offset * 8);
 
  uint32_t duty_cycle = (*(IO_REG32 (&PWM_DUTY0 + reg_offset)));
 
  duty_cycle &= ~duty_mask; // clear previous duty cycle
  duty_cycle |= duty_new; // set new duty cycle
 
  (*(IO_REG32 (&PWM_DUTY0 + reg_offset))) = duty_cycle;
}
 
 
/**********************************************************************//**
 * Get duty cycle from channel.
 *
 * @param[in] channel Channel select (0..59).
 * @return Duty cycle (0..255) of channel 'channel'.
 **************************************************************************/
uint8_t neorv32_pwm_get(uint8_t channel) {
 
  if (channel > 59) {
    return 0; // out-of-range
  }
 
  // compute duty-cycle offset
  uint32_t reg_offset  = (uint32_t)(channel / 4);
  uint8_t  byte_offset = channel % 4;
 
  // read
  uint32_t tmp = (*(IO_REG32 (&PWM_DUTY0 + reg_offset)));
  tmp = tmp >> ((byte_offset * 8));
 
  return (uint8_t)tmp;
}

Line No.	Rev	Author	Line
1	2	zero_gravi	`// #################################################################################################`
2			`// # << NEORV32: neorv32_pwm.c - Pulse Width Modulation Controller (PWM) HW Driver >> #`
3			`// # ********************************************************************************************* #`
4			`// # BSD 3-Clause License #`
5			`// # #`
6	44	zero_gravi	`// # Copyright (c) 2021, Stephan Nolting. All rights reserved. #`
7	2	zero_gravi	`// # #`
8			`// # Redistribution and use in source and binary forms, with or without modification, are #`
9			`// # permitted provided that the following conditions are met: #`
10			`// # #`
11			`// # 1. Redistributions of source code must retain the above copyright notice, this list of #`
12			`// # conditions and the following disclaimer. #`
13			`// # #`
14			`// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of #`
15			`// # conditions and the following disclaimer in the documentation and/or other materials #`
16			`// # provided with the distribution. #`
17			`// # #`
18			`// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to #`
19			`// # endorse or promote products derived from this software without specific prior written #`
20			`// # permission. #`
21			`// # #`
22			`// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #`
23			`// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #`
24			`// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #`
25			`// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #`
26			`// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #`
27			`// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #`
28			`// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #`
29			`// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #`
30			`// # OF THE POSSIBILITY OF SUCH DAMAGE. #`
31			`// # ********************************************************************************************* #`
32			`// # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #`
33			`// #################################################################################################`
34
35
36			`/********************************************************************//`
37			`* @file neorv32_pwm.c`
38			`* @author Stephan Nolting`
39			`* @brief Pulse-Width Modulation Controller (PWM) HW driver source file.`
40			`*`
41	44	zero_gravi	`* @note These functions should only be used if the PWM unit was synthesized (IO_PWM_EN = true).`
42	2	zero_gravi	`**************************************************************************/`
43
44			`#include "neorv32.h"`
45			`#include "neorv32_pwm.h"`
46
47
48			`/********************************************************************//`
49			`* Check if PWM unit was synthesized.`
50			`*`
51			`* @return 0 if PWM was not synthesized, 1 if PWM is available.`
52			`**************************************************************************/`
53			`int neorv32_pwm_available(void) {`
54
55	12	zero_gravi	`if (SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_IO_PWM)) {`
56	2	zero_gravi	`return 1;`
57			`}`
58			`else {`
59			`return 0;`
60			`}`
61			`}`
62
63
64			`/********************************************************************//`
65			`* Enable and configure pulse width modulation controller. The PWM control register bits are listed in #NEORV32_PWM_CT_enum.`
66			`*`
67			`* @param[in] prsc Clock prescaler select (0..7). See #NEORV32_CLOCK_PRSC_enum.`
68			`**************************************************************************/`
69			`void neorv32_pwm_setup(uint8_t prsc) {`
70
71			`PWM_CT = 0; // reset`
72
73			`uint32_t ct_enable = 1;`
74			`ct_enable = ct_enable << PWM_CT_EN;`
75
76			`uint32_t ct_prsc = (uint32_t)(prsc & 0x07);`
77			`ct_prsc = ct_prsc << PWM_CT_PRSC0;`
78
79			`PWM_CT = ct_enable \| ct_prsc;`
80			`}`
81
82
83			`/********************************************************************//`
84			`* Disable pulse width modulation controller.`
85			`**************************************************************************/`
86			`void neorv32_pwm_disable(void) {`
87
88			`PWM_CT &= ~((uint32_t)(1 << PWM_CT_EN));`
89			`}`
90
91
92			`/********************************************************************//`
93	61	zero_gravi	`* Enable pulse width modulation controller.`
94			`**************************************************************************/`
95			`void neorv32_pwm_enable(void) {`
96
97			`PWM_CT \|= ((uint32_t)(1 << PWM_CT_EN));`
98			`}`
99
100
101			`/********************************************************************//`
102	60	zero_gravi	`* Get number of implemented channels.`
103			`* @warning This function will override all duty cycle configuration registers.`
104	2	zero_gravi	`*`
105	60	zero_gravi	`* @return Number of implemented channels.`
106			`**************************************************************************/`
107			`int neorv32_pmw_get_num_channels(void) {`
108
109			`neorv32_pwm_disable();`
110
111			`uint8_t index = 0;`
112			`uint8_t cnt = 0;`
113
114			`for (index=0; index<60; index++) {`
115			`neorv32_pwm_set(index, 1);`
116			`cnt += neorv32_pwm_get(index);`
117			`}`
118
119			`return (int)cnt;`
120			`}`
121
122
123			`/********************************************************************//`
124			`* Set duty cycle for channel.`
125			`*`
126			`* @param[in] channel Channel select (0..59).`
127	2	zero_gravi	`* @param[in] duty Duty cycle (0..255).`
128			`**************************************************************************/`
129			`void neorv32_pwm_set(uint8_t channel, uint8_t duty) {`
130
131	60	zero_gravi	`if (channel > 59) {`
132			`return; // out-of-range`
133			`}`
134	2	zero_gravi
135	60	zero_gravi	`// compute duty-cycle offset`
136			`uint32_t reg_offset = (uint32_t)(channel / 4);`
137			`uint8_t byte_offset = channel % 4;`
138
139			`// read-modify-write`
140	2	zero_gravi	`uint32_t duty_mask = 0xff;`
141			`uint32_t duty_new = (uint32_t)duty;`
142
143	60	zero_gravi	`duty_mask = duty_mask << (byte_offset * 8);`
144			`duty_new = duty_new << (byte_offset * 8);`
145	2	zero_gravi
146	60	zero_gravi	`uint32_t duty_cycle = (*(IO_REG32 (&PWM_DUTY0 + reg_offset)));`
147	35	zero_gravi
148			`duty_cycle &= ~duty_mask; // clear previous duty cycle`
149			`duty_cycle \|= duty_new; // set new duty cycle`
150
151	60	zero_gravi	`(*(IO_REG32 (&PWM_DUTY0 + reg_offset))) = duty_cycle;`
152	2	zero_gravi	`}`
153	60	zero_gravi
154
155			`/********************************************************************//`
156			`* Get duty cycle from channel.`
157			`*`
158			`* @param[in] channel Channel select (0..59).`
159			`* @return Duty cycle (0..255) of channel 'channel'.`
160			`**************************************************************************/`
161			`uint8_t neorv32_pwm_get(uint8_t channel) {`
162
163			`if (channel > 59) {`
164			`return 0; // out-of-range`
165			`}`
166
167			`// compute duty-cycle offset`
168			`uint32_t reg_offset = (uint32_t)(channel / 4);`
169			`uint8_t byte_offset = channel % 4;`
170
171			`// read`
172			`uint32_t tmp = (*(IO_REG32 (&PWM_DUTY0 + reg_offset)));`
173			`tmp = tmp >> ((byte_offset * 8));`
174
175			`return (uint8_t)tmp;`
176			`}`

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[/] [neorv32/] [trunk/] [sw/] [lib/] [source/] [neorv32_pwm.c] - Blame information for rev 61