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// #################################################################################################
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// # << NEORV32: neorv32_xirq.c - External Interrupt controller HW Driver >> #
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// # ********************************************************************************************* #
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// # BSD 3-Clause License #
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// # #
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// # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
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// # #
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// # Redistribution and use in source and binary forms, with or without modification, are #
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// # permitted provided that the following conditions are met: #
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// # #
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// # 1. Redistributions of source code must retain the above copyright notice, this list of #
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// # conditions and the following disclaimer. #
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// # #
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// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
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// # conditions and the following disclaimer in the documentation and/or other materials #
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// # provided with the distribution. #
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// # #
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// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to #
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// # endorse or promote products derived from this software without specific prior written #
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// # permission. #
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// # #
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// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #
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// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #
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// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #
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// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
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// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
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// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
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// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
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// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
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// # OF THE POSSIBILITY OF SUCH DAMAGE. #
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// # ********************************************************************************************* #
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// # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
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// #################################################################################################
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/**********************************************************************//**
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* @file neorv32_xirq.c
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* @author Stephan Nolting
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* @brief External Interrupt controller HW driver source file.
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**************************************************************************/
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#include "neorv32.h"
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#include "neorv32_xirq.h"
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/**********************************************************************//**
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* The >private< trap vector look-up table of the XIRQ.
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**************************************************************************/
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static uint32_t __neorv32_xirq_vector_lut[32] __attribute__((unused)); // trap handler vector table
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// private functions
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static void __attribute__((aligned(16))) __neorv32_xirq_core(void);
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static void __neorv32_xirq_dummy_handler(void);
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/**********************************************************************//**
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* Check if external interrupt controller was synthesized.
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*
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* @return 0 if XIRQ was not synthesized, 1 if EXTIRQ is available.
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**************************************************************************/
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int neorv32_xirq_available(void) {
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if (NEORV32_SYSINFO.SOC & (1 << SYSINFO_SOC_IO_XIRQ)) {
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return 1;
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}
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else {
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return 0;
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}
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}
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/**********************************************************************//**
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* Initialize XIRQ controller.
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*
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* @note All interrupt channels will be deactivated, all pending IRQs will be deleted and all
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* handler addresses will be deleted.
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* @return 0 if success, 1 if error.
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**************************************************************************/
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int neorv32_xirq_setup(void) {
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NEORV32_XIRQ.IER = 0; // disable all input channels
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NEORV32_XIRQ.IPR = 0; // clear all pending IRQs
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int i;
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for (i=0; i<32; i++) {
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__neorv32_xirq_vector_lut[i] = (uint32_t)(&__neorv32_xirq_dummy_handler);
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}
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// register XIRQ handler in NEORV32 RTE
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return neorv32_rte_exception_install(XIRQ_RTE_ID, __neorv32_xirq_core);
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}
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/**********************************************************************//**
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* Globally enable XIRQ interrupts (via according FIRQ channel).
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**************************************************************************/
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void neorv32_xirq_global_enable(void) {
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// enable XIRQ fast interrupt channel
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neorv32_cpu_irq_enable(XIRQ_FIRQ_ENABLE);
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}
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/**********************************************************************//**
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* Globally disable XIRQ interrupts (via according FIRQ channel).
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**************************************************************************/
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void neorv32_xirq_global_disable(void) {
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// enable XIRQ fast interrupt channel
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neorv32_cpu_irq_disable(XIRQ_FIRQ_ENABLE);
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}
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/**********************************************************************//**
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* Get number of implemented XIRQ channels
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*
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* @return Number of implemented channels (0..32).
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**************************************************************************/
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int neorv32_xirq_get_num(void) {
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uint32_t enable;
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int i, cnt;
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if (neorv32_xirq_available()) {
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neorv32_cpu_irq_disable(XIRQ_FIRQ_ENABLE); // make sure XIRQ cannot fire
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NEORV32_XIRQ.IER = 0xffffffff; // try to set all enable flags
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enable = NEORV32_XIRQ.IER; // read back actually set flags
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// count set bits in enable
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cnt = 0;
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for (i=0; i<32; i++) {
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if (enable & 1) {
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cnt++;
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}
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enable >>= 1;
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}
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return cnt;
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}
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else {
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return 0;
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}
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}
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/**********************************************************************//**
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* Clear pending interrupt.
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*
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* @param[in] ch XIRQ interrupt channel (0..31).
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**************************************************************************/
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void neorv32_xirq_clear_pending(uint8_t ch) {
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if (ch < 32) { // channel valid?
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NEORV32_XIRQ.IPR = ~(1 << ch);
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}
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}
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/**********************************************************************//**
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* Enable IRQ channel.
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*
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* @param[in] ch XIRQ interrupt channel (0..31).
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**************************************************************************/
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void neorv32_xirq_channel_enable(uint8_t ch) {
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if (ch < 32) { // channel valid?
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NEORV32_XIRQ.IER |= 1 << ch;
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}
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}
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/**********************************************************************//**
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* Disable IRQ channel.
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*
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* @param[in] ch XIRQ interrupt channel (0..31).
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**************************************************************************/
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void neorv32_xirq_channel_disable(uint8_t ch) {
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if (ch < 32) { // channel valid?
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NEORV32_XIRQ.IER &= ~(1 << ch);
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}
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}
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/**********************************************************************//**
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* Install exception handler function for XIRQ channel.
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*
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* @note This will also activate the according XIRQ channel and clear a pending IRQ at this channel.
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*
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* @param[in] ch XIRQ interrupt channel (0..31).
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* @param[in] handler The actual handler function for the specified exception (function MUST be of type "void function(void);").
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* @return 0 if success, 1 if error.
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**************************************************************************/
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int neorv32_xirq_install(uint8_t ch, void (*handler)(void)) {
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// channel valid?
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if (ch < 32) {
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__neorv32_xirq_vector_lut[ch] = (uint32_t)handler; // install handler
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uint32_t mask = 1 << ch;
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NEORV32_XIRQ.IPR = ~mask; // clear if pending
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NEORV32_XIRQ.IER |= mask; // enable channel
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return 0;
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}
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return 1;
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}
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/**********************************************************************//**
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* Uninstall exception handler function for XIRQ channel.
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*
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* @note This will also deactivate the according XIRQ channel and clear pending state.
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*
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* @param[in] ch XIRQ interrupt channel (0..31).
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* @return 0 if success, 1 if error.
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**************************************************************************/
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int neorv32_xirq_uninstall(uint8_t ch) {
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// channel valid?
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if (ch < 32) {
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__neorv32_xirq_vector_lut[ch] = (uint32_t)(&__neorv32_xirq_dummy_handler); // override using dummy handler
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uint32_t mask = 1 << ch;
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NEORV32_XIRQ.IER &= ~mask; // disable channel
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NEORV32_XIRQ.IPR = ~mask; // clear if pending
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return 0;
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}
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return 1;
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}
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/**********************************************************************//**
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* This is the actual second-level (F)IRQ handler for the XIRQ. It will
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* call the previously installed handler if an XIRQ fires.
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**************************************************************************/
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static void __attribute__((aligned(16))) __neorv32_xirq_core(void) {
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register uint32_t src = NEORV32_XIRQ.SCR; // get IRQ source (with highest priority)
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uint32_t mask = 1 << src;
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NEORV32_XIRQ.IPR = ~mask; // clear current pending interrupt
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NEORV32_XIRQ.SCR = 0; // acknowledge current interrupt (CPU FIRQ)
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// execute handler
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register uint32_t xirq_handler = __neorv32_xirq_vector_lut[src];
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void (*handler_pnt)(void);
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handler_pnt = (void*)xirq_handler;
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(*handler_pnt)();
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}
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/**********************************************************************//**
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* XIRQ dummy handler.
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**************************************************************************/
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static void __neorv32_xirq_dummy_handler(void) {
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asm volatile ("nop");
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}
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