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ndumitrach |
# Main board wing pin [] to FPGA pin Pxx map
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# -------C------- -------B------- -------A-------
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# [GND] [C00] P114 [GND] [B00] P99 P100 [A15]
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# [2V5] [C01] P115 [2V5] [B01] P97 P98 [A14]
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| 5 |
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# [3V3] [C02] P116 [3V3] [B02] P92 P93 [A13]
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| 6 |
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# [5V0] [C03] P117 [5V0] [B03] P87 P88 [A12]
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| 7 |
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# [C04] P118 [B04] P84 P85 [A11] [5V0]
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| 8 |
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# [C05] P119 [B05] P82 P83 [A10] [3V3]
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| 9 |
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# [C06] P120 [B06] P80 P81 [A09] [2V5]
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| 10 |
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# [C07] P121 [B07] P78 P79 [A08] [GND]
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| 11 |
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# [GND] [C08] P123 [GND] [B08] P74 P75 [A07]
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| 12 |
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# [2V5] [C09] P124 [2V5] [B09] P95 P67 [A06]
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| 13 |
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# [3V3] [C10] P126 [3V3] [B10] P62 P66 [A05]
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| 14 |
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# [5V0] [C11] P127 [5V0] [B11] P59 P61 [A04]
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| 15 |
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# [C12] P131 [B12] P57 P58 [A03] [5V0]
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| 16 |
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# [C13] P132 [B13] P55 P56 [A02] [3V3]
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| 17 |
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# [C14] P133 [B14] P50 P51 [A01] [2V5]
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| 18 |
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# [C15] P134 [B15] P47 P48 [A00] [GND]
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| 19 |
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| 20 |
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## Prohibit the automatic placement of pins that are connected to VCC or GND for configuration.
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| 21 |
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CONFIG PROHIBIT=P144;
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| 22 |
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CONFIG PROHIBIT=P69;
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| 23 |
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CONFIG PROHIBIT=P60;
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| 24 |
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| 25 |
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NET CLK_32MHZ LOC="P94" | IOSTANDARD = LVTTL | PERIOD=31.26ns;
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NET RX LOC="P101" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=SLOW; # RX
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| 27 |
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NET TX LOC="P105" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=SLOW | PULLUP; # TX
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| 28 |
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| 29 |
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NET SDRAM_ADDR(0) LOC="P140" | IOSTANDARD=LVTTL; # SDRAM_ADDR0
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| 30 |
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NET SDRAM_ADDR(1) LOC="P139" | IOSTANDARD=LVTTL; # SDRAM_ADDR1
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| 31 |
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NET SDRAM_ADDR(2) LOC="P138" | IOSTANDARD=LVTTL; # SDRAM_ADDR2
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| 32 |
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NET SDRAM_ADDR(3) LOC="P137" | IOSTANDARD=LVTTL; # SDRAM_ADDR3
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| 33 |
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NET SDRAM_ADDR(4) LOC="P46" | IOSTANDARD=LVTTL; # SDRAM_ADDR4
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| 34 |
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NET SDRAM_ADDR(5) LOC="P45" | IOSTANDARD=LVTTL; # SDRAM_ADDR5
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| 35 |
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NET SDRAM_ADDR(6) LOC="P44" | IOSTANDARD=LVTTL; # SDRAM_ADDR6
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| 36 |
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NET SDRAM_ADDR(7) LOC="P43" | IOSTANDARD=LVTTL; # SDRAM_ADDR7
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| 37 |
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NET SDRAM_ADDR(8) LOC="P41" | IOSTANDARD=LVTTL; # SDRAM_ADDR8
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| 38 |
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NET SDRAM_ADDR(9) LOC="P40" | IOSTANDARD=LVTTL; # SDRAM_ADDR9
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| 39 |
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NET SDRAM_ADDR(10) LOC="P141" | IOSTANDARD=LVTTL; # SDRAM_ADDR10
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| 40 |
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NET SDRAM_ADDR(11) LOC="P35" | IOSTANDARD=LVTTL; # SDRAM_ADDR11
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| 41 |
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NET SDRAM_ADDR(12) LOC="P34" | IOSTANDARD=LVTTL; # SDRAM_ADDR12
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| 42 |
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NET SDRAM_DATA(0) LOC="P9" | IOSTANDARD=LVTTL; # SDRAM_DATA0
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| 43 |
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NET SDRAM_DATA(1) LOC="P10" | IOSTANDARD=LVTTL; # SDRAM_DATA1
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| 44 |
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NET SDRAM_DATA(2) LOC="P11" | IOSTANDARD=LVTTL; # SDRAM_DATA2
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| 45 |
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NET SDRAM_DATA(3) LOC="P12" | IOSTANDARD=LVTTL; # SDRAM_DATA3
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| 46 |
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NET SDRAM_DATA(4) LOC="P14" | IOSTANDARD=LVTTL; # SDRAM_DATA4
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| 47 |
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NET SDRAM_DATA(5) LOC="P15" | IOSTANDARD=LVTTL; # SDRAM_DATA5
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| 48 |
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NET SDRAM_DATA(6) LOC="P16" | IOSTANDARD=LVTTL; # SDRAM_DATA6
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| 49 |
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NET SDRAM_DATA(7) LOC="P8" | IOSTANDARD=LVTTL; # SDRAM_DATA7
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| 50 |
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NET SDRAM_DATA(8) LOC="P21" | IOSTANDARD=LVTTL; # SDRAM_DATA8
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| 51 |
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NET SDRAM_DATA(9) LOC="P22" | IOSTANDARD=LVTTL; # SDRAM_DATA9
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| 52 |
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NET SDRAM_DATA(10) LOC="P23" | IOSTANDARD=LVTTL; # SDRAM_DATA10
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NET SDRAM_DATA(11) LOC="P24" | IOSTANDARD=LVTTL; # SDRAM_DATA11
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| 54 |
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NET SDRAM_DATA(12) LOC="P26" | IOSTANDARD=LVTTL; # SDRAM_DATA12
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| 55 |
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NET SDRAM_DATA(13) LOC="P27" | IOSTANDARD=LVTTL; # SDRAM_DATA13
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| 56 |
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NET SDRAM_DATA(14) LOC="P29" | IOSTANDARD=LVTTL; # SDRAM_DATA14
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| 57 |
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NET SDRAM_DATA(15) LOC="P30" | IOSTANDARD=LVTTL; # SDRAM_DATA15
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| 58 |
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NET SDRAM_DQML LOC="P7" | IOSTANDARD=LVTTL; # SDRAM_DQML
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| 59 |
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NET SDRAM_DQMH LOC="P17" | IOSTANDARD=LVTTL; # SDRAM_DQMH
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| 60 |
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NET SDRAM_BA(0) LOC="P143" | IOSTANDARD=LVTTL; # SDRAM_BA0
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| 61 |
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NET SDRAM_BA(1) LOC="P142" | IOSTANDARD=LVTTL; # SDRAM_BA1
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| 62 |
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NET SDRAM_nWE LOC="P6" | IOSTANDARD=LVTTL; # SDRAM_nWE
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| 63 |
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NET SDRAM_nCAS LOC="P5" | IOSTANDARD=LVTTL; # SDRAM_nCAS
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| 64 |
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NET SDRAM_nRAS LOC="P2" | IOSTANDARD=LVTTL; # SDRAM_nRAS
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| 65 |
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NET SDRAM_nCS LOC="P1" | IOSTANDARD=LVTTL; # SDRAM_CS
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| 66 |
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NET SDRAM_CLK LOC="P32" | IOSTANDARD=LVTTL; # SDRAM_CLK
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NET SDRAM_CKE LOC="P33" | IOSTANDARD=LVTTL; # SDRAM_CKE
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#NET JTAG_TMS LOC="P107" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # JTAG_TMS
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| 69 |
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#NET JTAG_TCK LOC="P109" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # JTAG_TCK
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| 70 |
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#NET JTAG_TDI LOC="P110" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # JTAG_TDI
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| 71 |
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#NET JTAG_TDO LOC="P106" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # JTAG_TDO
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| 72 |
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#NET FLASH_CS LOC="P38" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # FLASH_CS
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| 73 |
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#NET FLASH_CK LOC="P70" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # FLASH_CK
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| 74 |
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#NET FLASH_SI LOC="P64" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST; # FLASH_SI
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| 75 |
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#NET FLASH_SO LOC="P65" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST | PULLUP; # FLASH_SO
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| 76 |
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| 77 |
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NET "VGA_R<5>" LOC = "P121" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; #C7 - 0.5K || 10K
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| 78 |
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NET "VGA_R<4>" LOC = "P120" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; #C6 - 1K
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| 79 |
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NET "VGA_R<3>" LOC = "P119" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; #C5 - 2K
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| 80 |
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NET "VGA_R<2>" LOC = "P118" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; #C4 - 4K
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| 81 |
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NET "VGA_R<1>" LOC = "P133" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; #C14 - 8K
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| 82 |
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NET "VGA_R<0>" LOC = "P131" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; #C12 - 16K
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| 84 |
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NET "VGA_G<5>" LOC = "P78" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; #B7 - 0.5K || 10K
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| 85 |
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NET "VGA_G<4>" LOC = "P80" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; #B6 - 1K
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| 86 |
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NET "VGA_G<3>" LOC = "P82" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; #B5 - 2K
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| 87 |
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NET "VGA_G<2>" LOC = "P84" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; #B4 - 4K
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| 88 |
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NET "VGA_G<1>" LOC = "P55" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; #B13 - 8K
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| 89 |
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NET "VGA_G<0>" LOC = "P57" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; #B12 - 16K
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| 90 |
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| 91 |
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NET "VGA_B<5>" LOC = "P87" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; #B3 - 0.5K || 10K
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| 92 |
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NET "VGA_B<4>" LOC = "P92" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; #B2 - 1K
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| 93 |
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NET "VGA_B<3>" LOC = "P97" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; #B1 - 2K
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| 94 |
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NET "VGA_B<2>" LOC = "P99" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; #B0 - 4K
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| 95 |
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NET "VGA_B<1>" LOC = "P47" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; #B15 - 8K
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| 96 |
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NET "VGA_B<0>" LOC = "P50" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; #B14 - 16K
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| 97 |
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| 98 |
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NET "VGA_HSYNC" LOC = "P117" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; #C3 - 75
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| 99 |
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NET "VGA_VSYNC" LOC = "P116" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ; #C2 - 75
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| 101 |
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NET "LED<7>" LOC = "P61" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 | PULLDOWN ; #A4 - 330
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| 102 |
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NET "LED<6>" LOC = "P66" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 | PULLDOWN ; #A5 - 330
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| 103 |
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NET "LED<5>" LOC = "P67" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 | PULLDOWN ; #A6 - 330
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| 104 |
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NET "LED<4>" LOC = "P75" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 | PULLDOWN ; #A7 - 330
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| 105 |
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NET "LED<3>" LOC = "P58" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 | PULLDOWN ; #A3 - 330
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| 106 |
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NET "LED<2>" LOC = "P48" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 | PULLDOWN ; #A0 - 330
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| 107 |
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NET "LED<1>" LOC = "P51" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 | PULLDOWN ; #A1 - 330
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| 108 |
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NET "LED<0>" LOC = "P56" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 | PULLDOWN ; #A2 - 330
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| 109 |
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#NET "LED1" LOC = "P112"| IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE=8 | PULLUP; # USER LED1
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| 110 |
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| 111 |
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#NET "BTN_EAST" LOC = "P59" | IOSTANDARD = LVTTL | PULLDOWN ; #B11 - to +
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| 112 |
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#NET "BTN_NORTH" LOC = "P95" | IOSTANDARD = LVTTL | PULLDOWN ; #B9 - to +
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| 113 |
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NET "BTN_SOUTH" LOC = "P62" | IOSTANDARD = LVTTL | PULLDOWN ; #B10 - to +
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| 114 |
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NET "BTN_WEST" LOC = "P74" | IOSTANDARD = LVTTL | PULLDOWN ; #B8 - to +
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| 115 |
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#NET "BTN_CENTER" LOC = "P85" | IOSTANDARD = LVTTL | PULLDOWN ; #A11 - to +
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| 116 |
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| 117 |
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NET "PS2DATA" LOC="P114" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=SLOW | PULLUP; # C0
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| 118 |
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NET "PS2CLKA" LOC="P115" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=SLOW | PULLUP; # C1
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| 119 |
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NET "PS2DATB" LOC="P88" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=SLOW | PULLUP; # A12
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| 120 |
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NET "PS2CLKB" LOC="P93" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=SLOW | PULLUP; # A13
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| 121 |
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NET "AUDIO_L" LOC="P98" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=SLOW; # A14
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| 122 |
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NET "AUDIO_R" LOC="P100" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=SLOW; # A15
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| 123 |
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| 124 |
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NET "SD_nCS" LOC = "P85" |IOSTANDARD = LVTTL | SLEW = FAST | DRIVE = 8 ; #A11
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| 125 |
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NET "SD_DO" LOC = "P83" |IOSTANDARD = LVTTL | PULLUP; #A10
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| 126 |
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NET "SD_CK" LOC = "P81" |IOSTANDARD = LVTTL | SLEW = FAST | DRIVE = 8 ; #A9
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| 127 |
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NET "SD_DI" LOC = "P79" |IOSTANDARD = LVTTL | SLEW = FAST | DRIVE = 8 ; #A8
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