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arif_endro |
#- ------------------------------------------------------------------------
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#- Copyright (C) 2010 Arif Endro Nugroho
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#- All rights reserved.
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#-
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#- Redistribution and use in source and binary forms, with or without
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#- modification, are permitted provided that the following conditions
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#- are met:
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#-
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#- 1. Redistributions of source code must retain the above copyright
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#- notice, this list of conditions and the following disclaimer.
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#- 2. Redistributions in binary form must reproduce the above copyright
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#- notice, this list of conditions and the following disclaimer in the
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#- documentation and/or other materials provided with the distribution.
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#-
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#- THIS SOFTWARE IS PROVIDED BY ARIF ENDRO NUGROHO "AS IS" AND ANY EXPRESS
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#- OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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#- WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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#- DISCLAIMED. IN NO EVENT SHALL ARIF ENDRO NUGROHO BE LIABLE FOR ANY
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#- DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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#- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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#- OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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#- HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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#- STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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#- ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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#- POSSIBILITY OF SUCH DAMAGE.
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#-
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#- End Of License.
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#- ------------------------------------------------------------------------
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#
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# Need to FLATTENING the design before OCP and NERO
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# Use x2y vst vst
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# then flatlo -r
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# this two sequence will remove most warning/error message when
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# performing LOON on the netlist.
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#
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# BOOM will optimize the logic
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# BOOG will optimize/convert the logic into netlist
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# LOON will optimize the netlist (this will report area/timing)
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#
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# VST is a circuit netlist file
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# AP is a circuit placement file (OCP/NERO create this file)
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# VBE is alliance VHDL Behavioral Description file
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VASYFLAGS = -V -B -I vhdl -a -p -o
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BOOMFLAGS = -VP
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BOOGFLAGS =
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LOONFLAGS =
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OCPFLAGS = -v
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NEROFLAGS = -V -G -6 -p
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DRUCFLAGS =
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S2RFLAGS = -v
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OCP = ocp
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NERO = nero
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DRUC = druc
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S2R = s2r
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VASY = vasy
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BOOM = boom
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GENPAT = genpat -v
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BOOG = boog
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LOON = loon
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RM = /bin/rm -vf
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X2Y = x2y
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FLATLO = flatlo
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X2YFLAGS = vst vst
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FLATLOFLAGS = -r
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TOUCH = touch
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# Set-up TARGET variable respectively
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%.ap: TARGET = $(subst .ap,, $@)
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%.pat: TARGET = $(subst .pat,, $@)
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%.cif: TARGET = $(subst .cif,, $@)
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%.vst: TARGET = $(subst .vst,, $@)
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%.flt: TARGET = $(subst .flt,, $@)
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%.sflt: TARGET = $(subst .sflt,, $@)
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%.flatten: TARGET = $(subst .flatten,, $@)
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all:
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%.vbe: %.vhdl
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@$(VASY) $(VASYFLAGS) $<
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%.vst: %.vbe
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@$(BOOM) $(BOOMFLAGS) $(TARGET) $(TARGET)_o
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@$(BOOG) $(BOOGFLAGS) $(TARGET)_o
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@$(LOON) $(LOONFLAGS) $(TARGET)_o $(TARGET)
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-$(RM) $(TARGET)_o.*
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%.sflt: %.vbe
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# @$(BOOM) $(BOOMFLAGS) $(TARGET)_model $(TARGET)_model_o
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@$(BOOG) $(BOOGFLAGS) $(TARGET)_model
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# @$(BOOG) $(BOOGFLAGS) $(TARGET)_model_o
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# @$(LOON) $(LOONFLAGS) $(TARGET)_model_o $(TARGET)_model
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-$(RM) $(TARGET)_model_o.*
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@$(X2Y) $(X2YFLAGS) $(TARGET) $(TARGET)_m
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@$(FLATLO) $(FLATLOFLAGS) $(TARGET)_m $(TARGET)
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# @$(FLATLO) $(FLATLOFLAGS) $(TARGET)_m $(TARGET)_o
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# @$(LOON) $(LOONFLAGS) $(TARGET)_o $(TARGET)
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-$(RM) $(TARGET){_o,m}.*
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@$(TOUCH) $@
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%.flt: %.vbe
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@$(BOOM) $(BOOMFLAGS) $(TARGET)_model $(TARGET)_model_o
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@$(BOOG) $(BOOGFLAGS) $(TARGET)_model_o
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@$(LOON) $(LOONFLAGS) $(TARGET)_model_o $(TARGET)_model
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-$(RM) $(TARGET)_model_o.*
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@$(X2Y) $(X2YFLAGS) $(TARGET) $(TARGET)_m
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@$(FLATLO) $(FLATLOFLAGS) $(TARGET)_m $(TARGET)_o
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@$(LOON) $(LOONFLAGS) $(TARGET)_o $(TARGET)
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-$(RM) $(TARGET){_o,m}.*
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@$(TOUCH) $@
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%.flatten: %.vst
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@$(X2Y) $(X2YFLAGS) $(TARGET) $(TARGET)_m
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@$(FLATLO) $(FLATLOFLAGS) $(TARGET)_m $(TARGET)_o
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@$(LOON) $(LOONFLAGS) $(TARGET)_o $(TARGET)
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-$(RM) $(TARGET){_o,m}.*
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clean:
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@rm -vf *.dat *.gpl *.vhd *.vbe *.boom *.vst *.xsc *.ap *.cif *.drc done.* *.flt *.sflt *_syn.pat *_sim.pat
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