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[/] [noc/] [src/] [top.cc] - Blame information for rev 4

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1 4 imori 
/*
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 * =====================================================================================
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 *
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 *       Filename:  tile.cc
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 *
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 *    Description:
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 *
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 *        Version:  1.0
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 *        Created:  04/08/2009 10:49:51 PM
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 *       Revision:  none
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 *       Compiler:  gcc
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 *
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 *         Author:  Soontea Kwon (), Kwonst@skku.edu
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 *        Company:  Mobile Electronics Lab
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 *
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 * =====================================================================================
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 */
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#include "top.h"
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void top :: rl_conn(tile *tile_l, tile *tile_r, sc_signal<bool> *fdata_out,
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                                        sc_signal<bool> *fdata_in, sc_signal<sc_logic> *foi_in,
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                                        sc_signal<sc_logic> *foi_out, sc_signal<bool> *fin_write_n,
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                                        sc_signal<bool> *fout_write_n, sc_signal<sc_uint<3> > *fout_full,
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                                        sc_signal<sc_uint<3> > *fin_full, sc_signal<sc_uint<2> > *fout_sel,
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                                        sc_signal<sc_uint<2> > *fin_sel)
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{
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        tile_l->e_oi_out(*foi_out);
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        tile_r->w_oi_in(*foi_out);
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        tile_l->e_oi_in(*foi_in);
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        tile_r->w_oi_out(*foi_in);
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        tile_l->e_data_out(*fdata_out);
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        tile_r->w_data_in(*fdata_out);
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        tile_l->e_data_in(*fdata_in);
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        tile_r->w_data_out(*fdata_in);
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        tile_l->e_out_write_n(*fout_write_n);
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        tile_r->w_in_write_n(*fout_write_n);
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        tile_l->e_in_write_n(*fin_write_n);
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        tile_r->w_out_write_n(*fin_write_n);
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        tile_l->e_out_full(*fout_full);
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        tile_r->w_in_full(*fout_full);
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        tile_l->e_in_full(*fin_full);
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        tile_r->w_out_full(*fin_full);
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        tile_l->e_out_sel(*fout_sel);
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        tile_r->w_in_sel(*fout_sel);
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        tile_l->e_in_sel(*fin_sel);
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        tile_r->w_out_sel(*fin_sel);
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}
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void top :: ud_conn(tile *tile_u, tile *tile_d, sc_signal<bool> *fdata_out,
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                                        sc_signal<bool> *fdata_in, sc_signal<sc_logic> *foi_in,
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                                        sc_signal<sc_logic> *foi_out, sc_signal<bool> *fin_write_n,
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                                        sc_signal<bool> *fout_write_n, sc_signal<sc_uint<3> > *fout_full,
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                                        sc_signal<sc_uint<3> > *fin_full, sc_signal<sc_uint<2> > *fout_sel,
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                                        sc_signal<sc_uint<2> > *fin_sel)
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{
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        tile_u->s_oi_out(*foi_out);
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        tile_d->n_oi_in(*foi_out);
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        tile_u->s_oi_in(*foi_in);
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        tile_d->n_oi_out(*foi_in);
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        tile_u->s_data_out(*fdata_out);
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        tile_d->n_data_in(*fdata_out);
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        tile_u->s_data_in(*fdata_in);
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        tile_d->n_data_out(*fdata_in);
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        tile_u->s_out_write_n(*fout_write_n);
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        tile_d->n_in_write_n(*fout_write_n);
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        tile_u->s_in_write_n(*fin_write_n);
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        tile_d->n_out_write_n(*fin_write_n);
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        tile_u->s_out_full(*fout_full);
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        tile_d->n_in_full(*fout_full);
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        tile_u->s_in_full(*fin_full);
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        tile_d->n_out_full(*fin_full);
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        tile_u->s_out_sel(*fout_sel);
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        tile_d->n_in_sel(*fout_sel);
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        tile_u->s_in_sel(*fin_sel);
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        tile_d->n_out_sel(*fin_sel);
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}
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void top :: north_disable(tile *tile, sc_signal<bool> *fdata_out,
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                                        sc_signal<bool> *fdata_in, sc_signal<sc_logic> *foi_in,
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                                        sc_signal<sc_logic> *foi_out, sc_signal<bool> *fin_write_n,
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                                        sc_signal<bool> *fout_write_n, sc_signal<sc_uint<3> > *fout_full,
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                                        sc_signal<sc_uint<3> > *fin_full, sc_signal<sc_uint<2> > *fout_sel,
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                                        sc_signal<sc_uint<2> > *fin_sel)
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{
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        tile->n_oi_out(*foi_out);
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        tile->n_oi_in(*foi_in);
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        tile->n_data_out(*fdata_out);
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        tile->n_data_in(*fdata_in);
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        tile->n_out_write_n(*fout_write_n);
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        tile->n_in_write_n(*fin_write_n);
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        tile->n_out_full(*fout_full);
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        tile->n_in_full(*fin_full);
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        tile->n_out_sel(*fout_sel);
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        tile->n_in_sel(*fin_sel);
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}
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void top ::south_disable(tile *tile,sc_signal<bool> *fdata_out,
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                                        sc_signal<bool> *fdata_in,  sc_signal<sc_logic> *foi_in,
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                                        sc_signal<sc_logic> *foi_out, sc_signal<bool> *fin_write_n,
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                                        sc_signal<bool> *fout_write_n, sc_signal<sc_uint<3> > *fout_full,
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                                        sc_signal<sc_uint<3> > *fin_full, sc_signal<sc_uint<2> > *fout_sel,
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                                        sc_signal<sc_uint<2> > *fin_sel )
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{
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        tile->s_oi_out(*foi_out);
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        tile->s_oi_in(*foi_in);
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        tile->s_data_out(*fdata_out);
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        tile->s_data_in(*fdata_in);
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        tile->s_out_write_n(*fout_write_n);
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        tile->s_in_write_n(*fin_write_n);
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        tile->s_out_full(*fout_full);
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        tile->s_in_full(*fin_full);
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        tile->s_out_sel(*fout_sel);
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        tile->s_in_sel(*fin_sel);
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}
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void top ::east_disable(tile *tile, sc_signal<bool> *fdata_out,
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                                        sc_signal<bool> *fdata_in,  sc_signal<sc_logic> *foi_in,
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                                        sc_signal<sc_logic> *foi_out, sc_signal<bool> *fin_write_n,
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                                        sc_signal<bool> *fout_write_n, sc_signal<sc_uint<3> > *fout_full,
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                                        sc_signal<sc_uint<3> > *fin_full, sc_signal<sc_uint<2> > *fout_sel,
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                                        sc_signal<sc_uint<2> > *fin_sel)
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{
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        tile->e_oi_out(*foi_out);
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        tile->e_oi_in(*foi_in);
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        tile->e_data_out(*fdata_out);
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        tile->e_data_in(*fdata_in);
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        tile->e_out_write_n(*fout_write_n);
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        tile->e_in_write_n(*fin_write_n);
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        tile->e_out_full(*fout_full);
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        tile->e_in_full(*fin_full);
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        tile->e_out_sel(*fout_sel);
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        tile->e_in_sel(*fin_sel);
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}
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void top ::west_disable(tile *tile, sc_signal<bool> *fdata_out,
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                                        sc_signal<bool> *fdata_in,  sc_signal<sc_logic> *foi_in,
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                                        sc_signal<sc_logic> *foi_out, sc_signal<bool> *fin_write_n,
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                                        sc_signal<bool> *fout_write_n, sc_signal<sc_uint<3> > *fout_full,
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                                        sc_signal<sc_uint<3> > *fin_full, sc_signal<sc_uint<2> > *fout_sel,
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                                        sc_signal<sc_uint<2> > *fin_sel)
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{
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        tile->w_oi_out(*foi_out);
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        tile->w_oi_in(*foi_in);
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        tile->w_data_out(*fdata_out);
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        tile->w_data_in(*fdata_in);
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        tile->w_out_write_n(*fout_write_n);
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        tile->w_in_write_n(*fin_write_n);
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        tile->w_out_full(*fout_full);
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        tile->w_in_full(*fin_full);
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        tile->w_out_sel(*fout_sel);
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        tile->w_in_sel(*fin_sel);
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}

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