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schelleg |
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-----------------------------------------------------------------------------
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-- NoCem -- Network on Chip Emulation Tool for System on Chip Research
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-- and Implementations
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--
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-- Copyright (C) 2006 Graham Schelle, Dirk Grunwald
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--
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-- This program is free software; you can redistribute it and/or
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-- modify it under the terms of the GNU General Public License
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-- as published by the Free Software Foundation; either version 2
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-- of the License, or (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with this program; if not, write to the Free Software
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-- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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-- 02110-1301, USA.
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--
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-- The authors can be contacted by email: <schelleg,grunwald>@cs.colorado.edu
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--
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-- or by mail: Campus Box 430, Department of Computer Science,
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-- University of Colorado at Boulder, Boulder, Colorado 80309
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--------------------------------------------------------------------------------
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--
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-- Filename: ap_exerciser_vc.vhd
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--
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-- Description: access point exerciser for VC designs
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--
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.STD_LOGIC_ARITH.ALL;
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use IEEE.STD_LOGIC_UNSIGNED.ALL;
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use work.pkg_nocem.all;
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entity ap_exerciser_vc is
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Generic(
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DELAY_START_COUNTER_WIDTH : integer := 32;
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DELAY_START_CYCLES : integer := 500;
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PKT_LENGTH : integer := 5;
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INTERVAL_COUNTER_WIDTH : integer := 8;
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DATA_OUT_INTERVAL : integer := 16;
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INIT_DEST_ADDR : integer := 0;
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MY_ADDR : integer := 0;
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EXERCISER_MODE : integer := EXERCISER_MODE_SIM
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) ;
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Port (
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-- arbitration lines (usage depends on underlying network)
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arb_req : out std_logic;
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arb_cntrl_out : out arb_cntrl_word;
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arb_grant : in std_logic;
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arb_cntrl_in : in arb_cntrl_word;
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datain : in data_word;
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datain_valid : in std_logic;
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datain_recvd : out std_logic;
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dataout : out data_word;
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dataout_valid : out std_logic;
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dataout_recvd : in std_logic;
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pkt_cntrl_in : in pkt_cntrl_word;
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pkt_cntrl_in_valid : in std_logic;
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pkt_cntrl_in_recvd : out std_logic;
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pkt_cntrl_out : out pkt_cntrl_word;
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pkt_cntrl_out_valid : out std_logic;
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pkt_cntrl_out_recvd : in std_logic;
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clk : in std_logic;
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rst : in std_logic
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);
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end ap_exerciser_vc;
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architecture Behavioral of ap_exerciser_vc is
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signal rst_i : std_logic;
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signal rst_counter : std_logic_vector(DELAY_START_COUNTER_WIDTH-1 downto 0);
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signal interval_counter : std_logic_vector(INTERVAL_COUNTER_WIDTH-1 downto 0);
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signal dataout_reg : std_logic_vector(NOCEM_DW-1 downto 0);
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signal pkt_cntrl_out_reg : pkt_cntrl_word;
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signal burst_counter : std_logic_vector(7 downto 0);
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signal datain_reg : data_word;
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signal pkt_cntrl_in_reg : pkt_cntrl_word;
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type stateType is (init_st,sending_st,getting_vc_st);
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signal state,nextState : stateType;
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-- determine the next free outgoing VC
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signal next_free_vc : std_logic_vector(NOCEM_NUM_VC-1 downto 0);
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signal vc_state : std_logic_Vector(NOCEM_NUM_VC-1 downto 0); -- 0: free, 1: allocated --
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signal vc_allocate : std_logic;
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signal free_this_vc : std_logic_vector(NOCEM_NUM_VC-1 downto 0);
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signal vc_mux_wr_reg : std_logic_vector(NOCEM_VC_ID_WIDTH-1 downto 0);
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-- data gathering signals
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signal next_vc_with_pkt,finished_pkt,eop_wr_sig,pkt_rdy : std_logic_vector(NOCEM_NUM_VC-1 downto 0);
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signal recv_idle : std_logic;
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-- arbcntrl out signals used for ORing together
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signal arb_sending_word,arb_receiving_word : arb_cntrl_word;
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signal allones_vcwidth : std_logic_vector(NOCEM_NUM_VC-1 downto 0);
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-- any debug signals
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signal debug_vc_mux_wr : std_logic_vector(NOCEM_VC_ID_WIDTH-1 downto 0);
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begin
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allones_vcwidth <= (others => '1');
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-- arbcntrl out signals used for ORing together
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arb_cntrl_out <= arb_sending_word or arb_receiving_word;
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rst_gen : process (clk,rst)
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begin
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if rst='1' then
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rst_i <= '1';
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rst_counter <= (others => '0');
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elsif clk'event and clk ='1' then
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rst_counter <= rst_counter+1;
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if rst_counter = DELAY_START_CYCLES then
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rst_i <= '0';
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end if;
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end if;
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end process;
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----------------------------------------------------------------------------------
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--------KEEPING TRACK OF OUTGOING VC STATES --------------------------------------
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----------------------------------------------------------------------------------
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gen_vc_status_uclkd : process (vc_state)
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begin
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end process;
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gen_vc_status_clkd : process (clk,rst)
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begin
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if rst='1' then
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--next_free_vc <= ('1',others => '0');
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vc_state <= (others => '0');
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free_this_vc <= (others => '0');
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next_free_vc <= (others => '0');
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elsif clk'event and clk='1' then
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l2: for I in NOCEM_NUM_VC-1 downto 0 loop
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if vc_state(I) = '0' then
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next_free_vc <= CONV_STD_LOGIC_VECTOR(2**I,NOCEM_NUM_VC);
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end if;
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end loop;
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if vc_state = allones_vcwidth then
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next_free_vc <= (others => '0');
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end if;
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free_this_vc <= arb_cntrl_in(NOCEM_ARB_CNTRL_VC_EOP_RD_HIX downto NOCEM_ARB_CNTRL_VC_EOP_RD_LIX);
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-- 0: free, 1: allocated --
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l1: for I in NOCEM_NUM_VC-1 downto 0 loop
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if vc_state(I) = '0' and next_free_vc(I) = '1' and vc_allocate = '1' then -- free going to allocated
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vc_state(I) <= '1';
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elsif vc_state(I) = '1' and free_this_vc(I) = '1' then -- allocated going to free
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vc_state(I) <= '0';
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end if;
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end loop;
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end if;
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end process;
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----------------------------------------------------------------------------------
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----------------------------------------------------------------------------------
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----------------------------------------------------------------------------------
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dataout_gen_clkd : process (clk,rst_i,nextState)
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begin
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if rst_i = '1' then
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state <= init_st;
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interval_counter <= (others => '0');
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dataout_reg <= (others => '0');
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vc_mux_wr_reg <= (others => '0');
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-- setup pkt_cntrl correctly
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pkt_cntrl_out_reg <= (others => '0');
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pkt_cntrl_out_reg(NOCEM_PKTCNTRL_DEST_ADDR_HIX downto NOCEM_PKTCNTRL_DEST_ADDR_LIX) <= addr_gen(INIT_DEST_ADDR,NOCEM_NUM_ROWS,NOCEM_NUM_COLS,NOCEM_AW);
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burst_counter <= (others => '0');
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elsif clk'event and clk='1' then
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state <= nextState;
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case state is
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when init_st =>
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interval_counter <= interval_counter+1;
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--dataout_reg <= (others => '0');
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-- pkt_cntrl_out_reg(NOCEM_PKTCNTRL_SOP_IX) <= '1';
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--
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-- if PKT_LENGTH = 1 then
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-- pkt_cntrl_out_reg(NOCEM_PKTCNTRL_EOP_IX) <= '1';
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-- else
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-- pkt_cntrl_out_reg(NOCEM_PKTCNTRL_EOP_IX) <= '0';
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-- end if;
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vc_mux_wr_reg <= (others => '0');
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burst_counter <= (others => '0');
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when getting_vc_st =>
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--pkt_cntrl_out_reg <= (others => '0');
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interval_counter <= (others => '0');
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vc_mux_wr_reg <= next_free_vc;
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when sending_st =>
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-- marking packets with src addrs...
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dataout_reg(NOCEM_DW-1 downto NOCEM_AW) <= dataout_reg(NOCEM_DW-1 downto NOCEM_AW) + 1;
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dataout_reg(NOCEM_AW-1 downto 0) <= addr_gen(MY_ADDR,NOCEM_NUM_ROWS,NOCEM_NUM_COLS,NOCEM_AW);
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-- handle the pkt_control reg
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-- increment the data inside
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if arb_grant = '1' and dataout_recvd = '1' then
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burst_counter <= burst_counter + 1;
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end if;
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if nextState = init_st then
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-- increment destination field (making sure it doesn't send a packet to myself)
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if pkt_cntrl_out_reg(NOCEM_PKTCNTRL_DEST_ADDR_HIX downto NOCEM_PKTCNTRL_DEST_ADDR_LIX)+1 = addr_gen(MY_ADDR,NOCEM_NUM_ROWS,NOCEM_NUM_COLS,NOCEM_AW) then
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pkt_cntrl_out_reg(NOCEM_PKTCNTRL_DEST_ADDR_HIX downto NOCEM_PKTCNTRL_DEST_ADDR_LIX) <= pkt_cntrl_out_reg(NOCEM_PKTCNTRL_DEST_ADDR_HIX downto NOCEM_PKTCNTRL_DEST_ADDR_LIX) + 2;
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else
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pkt_cntrl_out_reg(NOCEM_PKTCNTRL_DEST_ADDR_HIX downto NOCEM_PKTCNTRL_DEST_ADDR_LIX) <= pkt_cntrl_out_reg(NOCEM_PKTCNTRL_DEST_ADDR_HIX downto NOCEM_PKTCNTRL_DEST_ADDR_LIX) + 1;
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end if;
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end if;
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when others =>
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null;
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end case;
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end if;
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end process;
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dataout_gen_uclkd : process (next_free_vc, vc_mux_wr_reg,pkt_cntrl_out_reg, pkt_cntrl_out_recvd,state, interval_counter, dataout_reg, arb_grant, dataout_recvd, burst_counter)
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begin
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arb_req <= '0';
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arb_sending_word <= (others => '0');
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dataout <= (others => '0');
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dataout_valid <= '0';
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--nextState <= init_st;
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pkt_cntrl_out <= (others => '0');
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pkt_cntrl_out_valid <= '0';
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vc_allocate <= '0';
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case state is
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when init_st =>
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if interval_counter = CONV_STD_LOGIC_VECTOR(DATA_OUT_INTERVAL,INTERVAL_COUNTER_WIDTH) then
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nextState <= getting_vc_st;
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else
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nextState <= init_st;
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end if;
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when getting_vc_st =>
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if next_free_vc /= 0 then
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vc_allocate <= '1';
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nextState <= sending_st;
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else
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nextState <= getting_vc_st;
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end if;
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when sending_st =>
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arb_req <= '1';
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arb_sending_word(NOCEM_ARB_CNTRL_VC_MUX_WR_HIX downto NOCEM_ARB_CNTRL_VC_MUX_WR_LIX) <= vc_mux_wr_reg;
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dataout <= dataout_reg;
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dataout_valid <= '1';
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pkt_cntrl_out <= pkt_cntrl_out_reg;
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pkt_cntrl_out_valid <= '1';
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if burst_counter = 0 then
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pkt_cntrl_out(NOCEM_PKTCNTRL_SOP_IX) <= '1';
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end if;
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if burst_counter = PKT_LENGTH then
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pkt_cntrl_out(NOCEM_PKTCNTRL_EOP_IX) <= '1';
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nextState <= init_st;
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else
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nextState <= sending_st;
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end if;
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when others =>
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null;
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end case;
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end process;
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----------------------------------------------------
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----------------------------------------------------
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----------- DATAIN SIGNALLING -------------
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----------------------------------------------------
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----------------------------------------------------
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vc_datain_st_gen_clkd : process(clk,rst,arb_cntrl_in)
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338 |
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begin
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339 |
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eop_wr_sig <= arb_cntrl_in(NOCEM_ARB_CNTRL_VC_EOP_WR_HIX downto NOCEM_ARB_CNTRL_VC_EOP_WR_LIX);
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if rst='1' then
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pkt_rdy <= (others => '0');
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344 |
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next_vc_with_pkt <= (others => '0');
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345 |
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|
datain_reg <= (others => '0');
|
346 |
|
|
pkt_cntrl_in_reg <= (others => '0');
|
347 |
|
|
recv_idle <= '1';
|
348 |
|
|
elsif clk'event and clk='1' then
|
349 |
|
|
|
350 |
|
|
|
351 |
|
|
l1: for I in NOCEM_NUM_VC-1 downto 0 loop
|
352 |
|
|
|
353 |
|
|
-- is the pkt rdy for reading?
|
354 |
|
|
if eop_wr_sig(I) = '1' then
|
355 |
|
|
pkt_rdy(I) <= '1';
|
356 |
|
|
elsif finished_pkt(I) = '1' then
|
357 |
|
|
pkt_rdy(I) <= '0';
|
358 |
|
|
end if;
|
359 |
|
|
|
360 |
|
|
-- what is the next pkt to read from VCs?
|
361 |
|
|
if pkt_rdy(I) = '1' and recv_idle = '1' then
|
362 |
|
|
next_vc_with_pkt <= CONV_STD_LOGIC_VECTOR(2**I,NOCEM_NUM_VC);
|
363 |
|
|
recv_idle <= '0';
|
364 |
|
|
elsif finished_pkt /= 0 then
|
365 |
|
|
recv_idle <= '1';
|
366 |
|
|
end if;
|
367 |
|
|
|
368 |
|
|
end loop;
|
369 |
|
|
|
370 |
|
|
if pkt_rdy = 0 then
|
371 |
|
|
next_vc_with_pkt <= (others => '0');
|
372 |
|
|
end if;
|
373 |
|
|
|
374 |
|
|
|
375 |
|
|
end if;
|
376 |
|
|
|
377 |
|
|
end process;
|
378 |
|
|
|
379 |
|
|
|
380 |
|
|
|
381 |
|
|
datain_gather_uclkd : process (next_vc_with_pkt, pkt_cntrl_in,datain_valid,pkt_cntrl_in_valid)
|
382 |
|
|
begin
|
383 |
|
|
|
384 |
|
|
datain_recvd <= '0';
|
385 |
|
|
pkt_cntrl_in_recvd <= '0';
|
386 |
|
|
finished_pkt <= (others => '0');
|
387 |
|
|
arb_receiving_word <= (others => '0');
|
388 |
|
|
|
389 |
|
|
|
390 |
|
|
if next_vc_with_pkt /= 0 then
|
391 |
|
|
arb_receiving_word(NOCEM_ARB_CNTRL_VC_MUX_RD_HIX downto NOCEM_ARB_CNTRL_VC_MUX_RD_LIX) <= next_vc_with_pkt;
|
392 |
|
|
datain_recvd <= '1';
|
393 |
|
|
end if;
|
394 |
|
|
|
395 |
|
|
if next_vc_with_pkt /= 0 then
|
396 |
|
|
pkt_cntrl_in_recvd <= '1';
|
397 |
|
|
if pkt_cntrl_in(NOCEM_PKTCNTRL_EOP_IX) = '1' then
|
398 |
|
|
finished_pkt <= next_vc_with_pkt;
|
399 |
|
|
end if;
|
400 |
|
|
end if;
|
401 |
|
|
|
402 |
|
|
|
403 |
|
|
end process;
|
404 |
|
|
|
405 |
|
|
|
406 |
|
|
|
407 |
|
|
debug_gen : process (arb_sending_word)
|
408 |
|
|
begin
|
409 |
|
|
|
410 |
|
|
debug_vc_mux_wr <= arb_sending_word(NOCEM_ARB_CNTRL_VC_MUX_WR_HIX downto NOCEM_ARB_CNTRL_VC_MUX_WR_LIX);
|
411 |
|
|
|
412 |
|
|
end process;
|
413 |
|
|
|
414 |
|
|
|
415 |
|
|
|
416 |
|
|
end Behavioral;
|