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[/] [nocmodel/] [trunk/] [nocmodel/] [basicmodels/] [intercon_model.py] - Blame information for rev 4

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1 4 dargor 
#!/usr/bin/env python
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# -*- coding: utf-8 -*-
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#
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# Intercon models
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#  * Dual P2P Wishbone model
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#  * Single Bus Wishbone model
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#
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# Author:  Oscar Diaz
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# Version: 0.1
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# Date:    11-03-2011
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#
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# This code is free software; you can redistribute it and/or
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# modify it under the terms of the GNU Lesser General Public
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# License as published by the Free Software Foundation; either
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# version 2.1 of the License, or (at your option) any later version.
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#
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# This code is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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# Lesser General Public License for more details.
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#
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# You should have received a copy of the GNU Lesser General Public
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# License along with this library; if not, write to the
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# Free Software  Foundation, Inc., 59 Temple Place, Suite 330,
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# Boston, MA  02111-1307  USA
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#
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#
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# Changelog:
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#
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# 11-03-2011 : (OD) initial release
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#
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"""
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Basic Wishbone intercon models
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"""
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from nocmodel import *
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class dualwb_intercon(intercon):
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    """
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    Wishbone dual P2P intercon model
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    This intercon defines two bidirectional Wishbone P2P ports.
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    """
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    intercon_type = "dualwb"
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    complement = None
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    sideinfo = ""
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    def __init__(self, **kwargs):
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        intercon.__init__(self, **kwargs)
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        # attributes: data_width (default 32 bits)
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        if not hasattr(self, "data_width"):
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            setattr(self, "data_width", 32)
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        # addr_width (default 0, don't use address signal)
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        if not hasattr(self, "addr_width"):
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            setattr(self, "addr_width", 0)
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        self.intercon_type = "dualwb"
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#        self.complement = None
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#        self.sideinfo = ""
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        # build the intercon structure
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        # Common signals
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        #self.signals["rst_i"]
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        #self.signals["clk_i"]
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        # Master part
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        # discard m_dat_i, m_we_o, m_sel_o, m_rty_i, m_lock_o
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        # optional m_adr_o
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        self.signals["m_dat_o"] = {"width": self.data_width, "direction": "out", "signal_obj": None, "description": "Master data output"}
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        if self.addr_width > 0:
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            self.signals["m_adr_o"] = {"width": self.addr_width, "direction": "out", "signal_obj": None, "description": "Master address output"}
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        self.signals["m_stb_o"] = {"width": 1, "direction": "out", "signal_obj": None, "description": "Master strobe"}
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        self.signals["m_cyc_o"] = {"width": 1, "direction": "out", "signal_obj": None, "description": "Master cycle"}
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        self.signals["m_lflit_o"] = {"width": 1, "direction": "out", "signal_obj": None, "description": "Master last flit flag"}
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        self.signals["m_ack_i"] = {"width": 1, "direction": "in", "signal_obj": None, "description": "Master acknowledge"}
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        self.signals["m_stall_i"] = {"width": 1, "direction": "in", "signal_obj": None, "description": "Master stall"}
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        self.signals["m_err_i"] = {"width": 1, "direction": "in", "signal_obj": None, "description": "Master error"}
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        # Slave part
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        # discard s_adr_i, s_dat_o, s_we_i, s_sel_i, s_rty_o, s_lock_i
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        self.signals["s_dat_i"] = {"width": self.data_width, "direction": "in", "signal_obj": None, "description": "Slave data input"}
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        if self.addr_width > 0:
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            self.signals["s_adr_i"] = {"width": self.addr_width, "direction": "in", "signal_obj": None, "description": "Slave address input"}
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        self.signals["s_stb_i"] = {"width": 1, "direction": "in", "signal_obj": None, "description": "Slave strobe"}
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        self.signals["s_cyc_i"] = {"width": 1, "direction": "in", "signal_obj": None, "description": "Slave cycle"}
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        self.signals["s_lflit_i"] = {"width": 1, "direction": "in", "signal_obj": None, "description": "Slave last flit flag"}
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        self.signals["s_ack_o"] = {"width": 1, "direction": "out", "signal_obj": None, "description": "Slave acknowledge"}
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        self.signals["s_stall_o"] = {"width": 1, "direction": "out", "signal_obj": None, "description": "Slave stall"}
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        self.signals["s_err_o"] = {"width": 1, "direction": "out", "signal_obj": None, "description": "Slave error"}
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    def get_complement_signal(self, signalname):
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        """
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        Get the signal name that should be connected to this signal when
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        connecting two intercon.
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        Arguments:
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        * signalname: signal name of this intercon
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        Return: a string with the name of a signal from a complementary intercon.
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        """
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        if signalname not in self.signals:
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            raise KeyError("Signal '%s' not found" % signalname)
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        mchange = {"m": "s", "s": "m"}
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        dchange = {"i": "o", "o": "i"}
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        return mchange[signalname[0]] + signalname[1:-1] + dchange[signalname[-1]]
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110 
class slavewb_intercon():
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    pass
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class masterwb_intercon(intercon):
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    """
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    Wishbone single bus master intercon model
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    This intercon defines a simple master Wishbone bus.
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    """
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    intercon_type = "masterwb"
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    complement = slavewb_intercon
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    sideinfo = "master"
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123 
    def __init__(self, **kwargs):
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        intercon.__init__(self, **kwargs)
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        # attributes: data_width (default 32 bits)
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        if not hasattr(self, "data_width"):
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            setattr(self, "data_width", 32)
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        # addr_width (default 16 bits)
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        if not hasattr(self, "addr_width"):
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            setattr(self, "addr_width", 16)
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        self.intercon_type = "masterwb"
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#        self.complement = slavewb_intercon
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#        self.sideinfo = "master"
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137 
        # build the intercon structure
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        self.signals["rst_i"] = {"width": 1, "direction": "in", "signal_obj": None, "description": "Reset input"}
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        self.signals["clk_i"] = {"width": 1, "direction": "in", "signal_obj": None, "description": "Clock input"}
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        # discard m_sel_o, m_rty_i, m_lock_o
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        self.signals["m_adr_o"] = {"width": self.addr_width, "direction": "out", "signal_obj": None, "description": "Master address output"}
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        self.signals["m_dat_i"] = {"width": self.data_width, "direction": "in", "signal_obj": None, "description": "Master data input"}
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        self.signals["m_dat_o"] = {"width": self.data_width, "direction": "out", "signal_obj": None, "description": "Master data output"}
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        self.signals["m_we_o"] = {"width": 1, "direction": "out", "signal_obj": None, "description": "Master write enable"}
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        self.signals["m_stb_o"] = {"width": 1, "direction": "out", "signal_obj": None, "description": "Master strobe"}
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        self.signals["m_cyc_o"] = {"width": 1, "direction": "out", "signal_obj": None, "description": "Master cycle"}
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        self.signals["m_ack_i"] = {"width": 1, "direction": "in", "signal_obj": None, "description": "Master acknowledge"}
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        self.signals["m_stall_i"] = {"width": 1, "direction": "in", "signal_obj": None, "description": "Master stall"}
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        self.signals["m_err_i"] = {"width": 1, "direction": "in", "signal_obj": None, "description": "Master error"}
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        self.signals["m_irq_i"] = {"width": 1, "direction": "in", "signal_obj": None, "description": "Master IRQ"}
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153 
    def get_complement_signal(self, signalname):
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        """
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        Get the signal name that should be connected to this signal when
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        connecting two intercon.
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158 
        Arguments:
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        * signalname: signal name of this intercon
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161 
        Return: a string with the name of a signal from a complementary intercon.
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        """
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        if signalname not in self.signals:
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            raise KeyError("Signal '%s' not found" % signalname)
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        mchange = {"m": "s", "s": "m"}
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        dchange = {"i": "o", "o": "i"}
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        if signalname == "rst_i" or signalname == "clk_i":
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            # special signals. Return None
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            return None
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        else:
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            return mchange[signalname[0]] + signalname[1:-1] + dchange[signalname[-1]]
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class slavewb_intercon(intercon):
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    """
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    Wishbone single bus slave intercon model
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    This intercon defines a simple slave Wishbone bus.
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    """
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    intercon_type = "slavewb"
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    complement = masterwb_intercon
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    sideinfo = "slave"
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183 
    def __init__(self, **kwargs):
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        intercon.__init__(self, **kwargs)
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        # attributes: data_width (default 32 bits)
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        if not hasattr(self, "data_width"):
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            setattr(self, "data_width", 32)
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        # addr_width (default 16 bits)
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        if not hasattr(self, "addr_width"):
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            setattr(self, "addr_width", 16)
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        self.intercon_type = "slavewb"
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#        self.complement = masterwb_intercon
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#        self.sideinfo = "slave"
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197 
        # build the intercon structure
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        self.signals["rst_i"] = {"width": 1, "direction": "in", "signal_obj": None, "description": "Reset input"}
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        self.signals["clk_i"] = {"width": 1, "direction": "in", "signal_obj": None, "description": "Clock input"}
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        # discard s_sel_o, s_rty_i, s_lock_o
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        self.signals["s_adr_i"] = {"width": self.addr_width, "direction": "in", "signal_obj": None, "description": "Slave address output"}
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        self.signals["s_dat_o"] = {"width": self.data_width, "direction": "out", "signal_obj": None, "description": "Slave data input"}
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        self.signals["s_dat_i"] = {"width": self.data_width, "direction": "in", "signal_obj": None, "description": "Slave data output"}
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        self.signals["s_we_i"] = {"width": 1, "direction": "in", "signal_obj": None, "description": "Slave write enable"}
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        self.signals["s_stb_i"] = {"width": 1, "direction": "in", "signal_obj": None, "description": "Slave strobe"}
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        self.signals["s_cyc_i"] = {"width": 1, "direction": "in", "signal_obj": None, "description": "Slave cycle"}
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        self.signals["s_ack_o"] = {"width": 1, "direction": "out", "signal_obj": None, "description": "Slave acknowledge"}
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        self.signals["s_stall_o"] = {"width": 1, "direction": "out", "signal_obj": None, "description": "Slave stall"}
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        self.signals["s_err_o"] = {"width": 1, "direction": "out", "signal_obj": None, "description": "Slave error"}
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        self.signals["s_irq_o"] = {"width": 1, "direction": "out", "signal_obj": None, "description": "Slave IRQ"}
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    def get_complement_signal(self, signalname):
214 
        """
215 
        Get the signal name that should be connected to this signal when
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        connecting two intercon.
217 
 
218 
        Arguments:
219 
        * signalname: signal name of this intercon
220 
 
221 
        Return: a string with the name of a signal from a complementary intercon.
222 
        """
223 
        if signalname not in self.signals:
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            raise KeyError("Signal '%s' not found" % signalname)
225 
        mchange = {"m": "s", "s": "m"}
226 
        dchange = {"i": "o", "o": "i"}
227 
        if signalname == "rst_i" or signalname == "clk_i":
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            # special signals. Return None
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            return None
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        else:
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            return mchange[signalname[0]] + signalname[1:-1] + dchange[signalname[-1]]

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