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eexuke |
//--------------------------------------------------------------------------------------------------
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// Design : nova
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// Author(s) : Ke Xu
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// Email : eexuke@yahoo.com
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// File : nC_decoding.v
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// Generated : May 18, 2005
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// Copyright (C) 2008 Ke Xu
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//-------------------------------------------------------------------------------------------------
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// Description
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// Devive the number of none-zero coeff during nC decoding for TotalCoeff & TrailingOnes LUT
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//-------------------------------------------------------------------------------------------------
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// synopsys translate_off
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`include "timescale.v"
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// synopsys translate_on
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`include "nova_defines.v"
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module nC_decoding (clk,reset_n,gclk_end_of_MB_DEC,
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cavlc_decoder_state,residual_state,slice_data_state,
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mb_num_h,mb_num_v,i8x8,i4x4,i4x4_CbCr,CodedBlockPatternLuma,CodedBlockPatternChroma,
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LumaLevel_mbAddrB_dout,ChromaLevel_Cb_mbAddrB_dout,ChromaLevel_Cr_mbAddrB_dout,
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end_of_one_residual_block,TotalCoeff,
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nC,
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Luma_8x8_AllZeroCoeff_mbAddrA,LumaLevel_mbAddrA,
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LumaLevel_CurrMb0,LumaLevel_CurrMb1,LumaLevel_CurrMb2,LumaLevel_CurrMb3,
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LumaLevel_mbAddrB_cs_n,LumaLevel_mbAddrB_wr_n,LumaLevel_mbAddrB_rd_addr,
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LumaLevel_mbAddrB_wr_addr,LumaLevel_mbAddrB_din,
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ChromaLevel_Cb_mbAddrB_cs_n,ChromaLevel_Cb_mbAddrB_wr_n,ChromaLevel_Cb_mbAddrB_rd_addr,
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ChromaLevel_Cb_mbAddrB_wr_addr,ChromaLevel_Cb_mbAddrB_din,
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ChromaLevel_Cr_mbAddrB_cs_n,ChromaLevel_Cr_mbAddrB_wr_n,ChromaLevel_Cr_mbAddrB_rd_addr,
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ChromaLevel_Cr_mbAddrB_wr_addr,ChromaLevel_Cr_mbAddrB_din);
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input clk,reset_n;
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input gclk_end_of_MB_DEC;
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input [3:0] cavlc_decoder_state;
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input [3:0] residual_state;
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input [3:0] slice_data_state;
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input [3:0] mb_num_h;
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input [3:0] mb_num_v;
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input [1:0] i8x8,i4x4;
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input [1:0] i4x4_CbCr;
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input [3:0] CodedBlockPatternLuma;
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input [1:0] CodedBlockPatternChroma;
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input [19:0] LumaLevel_mbAddrB_dout;
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input [9:0] ChromaLevel_Cb_mbAddrB_dout,ChromaLevel_Cr_mbAddrB_dout;
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input end_of_one_residual_block;
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input [4:0] TotalCoeff;
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output [4:0] nC;
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output [1:0] Luma_8x8_AllZeroCoeff_mbAddrA;
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output [19:0] LumaLevel_mbAddrA;
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output [19:0] LumaLevel_CurrMb0,LumaLevel_CurrMb1,LumaLevel_CurrMb2,LumaLevel_CurrMb3;
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output LumaLevel_mbAddrB_cs_n,LumaLevel_mbAddrB_wr_n;
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output [3:0] LumaLevel_mbAddrB_rd_addr,LumaLevel_mbAddrB_wr_addr;
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output [19:0]LumaLevel_mbAddrB_din;
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output ChromaLevel_Cb_mbAddrB_cs_n,ChromaLevel_Cb_mbAddrB_wr_n;
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output [3:0] ChromaLevel_Cb_mbAddrB_rd_addr,ChromaLevel_Cb_mbAddrB_wr_addr;
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output [9:0] ChromaLevel_Cb_mbAddrB_din;
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output ChromaLevel_Cr_mbAddrB_cs_n,ChromaLevel_Cr_mbAddrB_wr_n;
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output [3:0] ChromaLevel_Cr_mbAddrB_rd_addr,ChromaLevel_Cr_mbAddrB_wr_addr;
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output [9:0] ChromaLevel_Cr_mbAddrB_din;
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reg [4:0] nC;
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reg LumaLevel_mbAddrB_cs_n,LumaLevel_mbAddrB_wr_n;
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reg [3:0] LumaLevel_mbAddrB_rd_addr,LumaLevel_mbAddrB_wr_addr;
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reg [19:0]LumaLevel_mbAddrB_din;
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reg ChromaLevel_Cb_mbAddrB_cs_n,ChromaLevel_Cb_mbAddrB_wr_n;
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reg [3:0] ChromaLevel_Cb_mbAddrB_rd_addr,ChromaLevel_Cb_mbAddrB_wr_addr;
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reg [9:0] ChromaLevel_Cb_mbAddrB_din;
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reg ChromaLevel_Cr_mbAddrB_cs_n,ChromaLevel_Cr_mbAddrB_wr_n;
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reg [3:0] ChromaLevel_Cr_mbAddrB_rd_addr,ChromaLevel_Cr_mbAddrB_wr_addr;
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reg [9:0] ChromaLevel_Cr_mbAddrB_din;
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reg nA_availability,nB_availability;
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reg nA_availability_reg,nB_availability_reg;
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reg [4:0] nA,nB;
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reg [19:0] LumaLevel_mbAddrA;
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reg [19:0] LumaLevel_CurrMb0,LumaLevel_CurrMb1,LumaLevel_CurrMb2,LumaLevel_CurrMb3;
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reg [19:0] ChromaLevel_Cb_CurrMb;
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reg [9:0] ChromaLevel_Cb_mbAddrA;
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reg [19:0] ChromaLevel_Cr_CurrMb;
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reg [9:0] ChromaLevel_Cr_mbAddrA;
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reg [1:0] Luma_8x8_AllZeroCoeff_mbAddrA;
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reg [0:21] Luma_8x8_AllZeroCoeff_mbAddrB_reg;
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reg [0:1] Luma_8x8_AllZeroCoeff_mbAddrB;
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reg Chroma_8x8_AllZeroCoeff_mbAddrA;
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reg [10:0] Chroma_8x8_AllZeroCoeff_mbAddrB_reg;
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reg Chroma_8x8_AllZeroCoeff_mbAddrB;
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always @ (mb_num_h or Luma_8x8_AllZeroCoeff_mbAddrB_reg)
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case (mb_num_h)
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1 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[2:3];
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2 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[4:5];
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3 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[6:7];
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4 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[8:9];
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5 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[10:11];
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6 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[12:13];
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7 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[14:15];
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8 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[16:17];
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9 :Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[18:19];
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10:Luma_8x8_AllZeroCoeff_mbAddrB <= Luma_8x8_AllZeroCoeff_mbAddrB_reg[20:21];
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default:Luma_8x8_AllZeroCoeff_mbAddrB <= 0;
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endcase
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always @ (mb_num_h or Chroma_8x8_AllZeroCoeff_mbAddrB_reg)
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case (mb_num_h)
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1 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[1];
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2 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[2];
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3 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[3];
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4 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[4];
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5 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[5];
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6 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[6];
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7 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[7];
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8 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[8];
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9 :Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[9];
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10:Chroma_8x8_AllZeroCoeff_mbAddrB <= Chroma_8x8_AllZeroCoeff_mbAddrB_reg[10];
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default:Chroma_8x8_AllZeroCoeff_mbAddrB <= 0;
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endcase
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//----------------------------
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//Update 8x8_AllZero registers
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//----------------------------
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always @ (posedge gclk_end_of_MB_DEC or negedge reset_n)
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if (reset_n == 0)
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Luma_8x8_AllZeroCoeff_mbAddrA <= 0;
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else if (slice_data_state == `skip_run_duration)
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Luma_8x8_AllZeroCoeff_mbAddrA <= 0;
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else //update 8x8_AllZero reg when finished one MB residual parsing
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begin
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Luma_8x8_AllZeroCoeff_mbAddrA[0] <= (CodedBlockPatternLuma[1] == 0)? 1'b0:1'b1;
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Luma_8x8_AllZeroCoeff_mbAddrA[1] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
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end
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always @ (posedge gclk_end_of_MB_DEC or negedge reset_n)
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if (reset_n == 0)
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Luma_8x8_AllZeroCoeff_mbAddrB_reg <= 0;
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else if (slice_data_state == `skip_run_duration)
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case (mb_num_h)
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1 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[2:3] <= 0;
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2 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[4:5] <= 0;
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3 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[6:7] <= 0;
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4 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[8:9] <= 0;
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5 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[10:11] <= 0;
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6 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[12:13] <= 0;
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7 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[14:15] <= 0;
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8 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[16:17] <= 0;
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9 :Luma_8x8_AllZeroCoeff_mbAddrB_reg[18:19] <= 0;
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10:Luma_8x8_AllZeroCoeff_mbAddrB_reg[20:21] <= 0;
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endcase
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else //update 8x8_AllZero reg when finished one MB residual parsing
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case (mb_num_h)
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0:
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begin
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Luma_8x8_AllZeroCoeff_mbAddrB_reg [0] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
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Luma_8x8_AllZeroCoeff_mbAddrB_reg [1] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
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end
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1:
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begin
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Luma_8x8_AllZeroCoeff_mbAddrB_reg [2] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
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Luma_8x8_AllZeroCoeff_mbAddrB_reg [3] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
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end
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2:
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begin
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Luma_8x8_AllZeroCoeff_mbAddrB_reg [4] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
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Luma_8x8_AllZeroCoeff_mbAddrB_reg [5] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
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end
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3:
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begin
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Luma_8x8_AllZeroCoeff_mbAddrB_reg [6] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
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Luma_8x8_AllZeroCoeff_mbAddrB_reg [7] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
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end
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4:
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begin
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Luma_8x8_AllZeroCoeff_mbAddrB_reg [8] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
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Luma_8x8_AllZeroCoeff_mbAddrB_reg [9] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
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end
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5:
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begin
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Luma_8x8_AllZeroCoeff_mbAddrB_reg [10] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
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Luma_8x8_AllZeroCoeff_mbAddrB_reg [11] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
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end
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6:
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begin
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Luma_8x8_AllZeroCoeff_mbAddrB_reg [12] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
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Luma_8x8_AllZeroCoeff_mbAddrB_reg [13] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
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end
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7:
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begin
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Luma_8x8_AllZeroCoeff_mbAddrB_reg [14] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
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Luma_8x8_AllZeroCoeff_mbAddrB_reg [15] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
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end
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8:
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begin
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Luma_8x8_AllZeroCoeff_mbAddrB_reg [16] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
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Luma_8x8_AllZeroCoeff_mbAddrB_reg [17] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
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end
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9:
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begin
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Luma_8x8_AllZeroCoeff_mbAddrB_reg [18] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
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Luma_8x8_AllZeroCoeff_mbAddrB_reg [19] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
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end
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10:
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begin
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Luma_8x8_AllZeroCoeff_mbAddrB_reg [20] <= (CodedBlockPatternLuma[2] == 0)? 1'b0:1'b1;
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Luma_8x8_AllZeroCoeff_mbAddrB_reg [21] <= (CodedBlockPatternLuma[3] == 0)? 1'b0:1'b1;
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end
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endcase
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always @ (posedge gclk_end_of_MB_DEC or negedge reset_n)
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if (reset_n == 0)
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Chroma_8x8_AllZeroCoeff_mbAddrA <= 0;
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else if (slice_data_state == `skip_run_duration)
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Chroma_8x8_AllZeroCoeff_mbAddrA <= 0;
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else //update 8x8_AllZero reg when finished one MB residual parsing
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Chroma_8x8_AllZeroCoeff_mbAddrA <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
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always @ (posedge gclk_end_of_MB_DEC or negedge reset_n)
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if (reset_n == 0)
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Chroma_8x8_AllZeroCoeff_mbAddrB_reg <= 0;
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else if (slice_data_state == `skip_run_duration)
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case (mb_num_h)
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1 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[1] <= 0;
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2 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[2] <= 0;
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3 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[3] <= 0;
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4 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[4] <= 0;
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5 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[5] <= 0;
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6 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[6] <= 0;
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7 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[7] <= 0;
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8 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[8] <= 0;
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9 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[9] <= 0;
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10:Chroma_8x8_AllZeroCoeff_mbAddrB_reg[10] <= 0;
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endcase
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else if (mb_num_v != 8)
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case (mb_num_h)
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|
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1 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[1] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
237 |
|
|
2 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[2] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
238 |
|
|
3 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[3] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
239 |
|
|
4 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[4] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
240 |
|
|
5 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[5] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
241 |
|
|
6 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[6] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
242 |
|
|
7 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[7] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
243 |
|
|
8 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[8] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
244 |
|
|
9 :Chroma_8x8_AllZeroCoeff_mbAddrB_reg[9] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
245 |
|
|
10:Chroma_8x8_AllZeroCoeff_mbAddrB_reg[10] <= (CodedBlockPatternChroma != 2 )? 1'b0:1'b1;
|
246 |
|
|
endcase
|
247 |
|
|
//-------------------
|
248 |
|
|
//nA_availability
|
249 |
|
|
//-------------------
|
250 |
|
|
always @ (posedge clk)
|
251 |
|
|
if (reset_n == 0)
|
252 |
|
|
nA_availability_reg <= 0;
|
253 |
|
|
else if (cavlc_decoder_state == `nAnB_decoding_s)
|
254 |
|
|
nA_availability_reg <= nA_availability;
|
255 |
|
|
always @ (reset_n or cavlc_decoder_state or residual_state or mb_num_h or i8x8 or i4x4 or i4x4_CbCr or nA_availability_reg)
|
256 |
|
|
if (reset_n == 1'b0)
|
257 |
|
|
nA_availability <= 1'b0;
|
258 |
|
|
else if (cavlc_decoder_state == `nAnB_decoding_s)
|
259 |
|
|
case (residual_state)
|
260 |
|
|
//luma
|
261 |
|
|
`Intra16x16DCLevel_s:nA_availability <= (mb_num_h == 0)? 1'b0:1'b1;
|
262 |
|
|
`Intra16x16ACLevel_s,`LumaLevel_s:
|
263 |
|
|
if ((i8x8 == 0 || i8x8 == 2) && (i4x4 == 0 || i4x4 == 2))
|
264 |
|
|
nA_availability <= (mb_num_h == 0)? 1'b0:1'b1;
|
265 |
|
|
else
|
266 |
|
|
nA_availability <= 1'b1;
|
267 |
|
|
//chroma
|
268 |
|
|
`ChromaACLevel_Cb_s,`ChromaACLevel_Cr_s:
|
269 |
|
|
nA_availability <= (mb_num_h == 0 && i4x4_CbCr[0] == 0)? 1'b0:1'b1;
|
270 |
|
|
default:nA_availability <= 1'b0;
|
271 |
|
|
endcase
|
272 |
|
|
else
|
273 |
|
|
nA_availability <= nA_availability_reg;
|
274 |
|
|
//-------------------
|
275 |
|
|
//nB_availability
|
276 |
|
|
//-------------------
|
277 |
|
|
always @ (posedge clk)
|
278 |
|
|
if (reset_n == 0)
|
279 |
|
|
nB_availability_reg <= 0;
|
280 |
|
|
else if (cavlc_decoder_state == `nAnB_decoding_s)
|
281 |
|
|
nB_availability_reg <= nB_availability;
|
282 |
|
|
always @ (reset_n or cavlc_decoder_state or residual_state or mb_num_v or i8x8 or i4x4 or i4x4_CbCr
|
283 |
|
|
or nB_availability_reg)
|
284 |
|
|
if (reset_n == 1'b0)
|
285 |
|
|
nB_availability <= 1'b0;
|
286 |
|
|
else if (cavlc_decoder_state == `nAnB_decoding_s)
|
287 |
|
|
case (residual_state)
|
288 |
|
|
//luma
|
289 |
|
|
`Intra16x16DCLevel_s:nB_availability <= (mb_num_v == 0)? 1'b0:1'b1;
|
290 |
|
|
`Intra16x16ACLevel_s,`LumaLevel_s:
|
291 |
|
|
if ((i8x8 == 0 || i8x8 == 1) && (i4x4 == 0 || i4x4 == 1))
|
292 |
|
|
nB_availability <= (mb_num_v == 0)? 1'b0:1'b1;
|
293 |
|
|
else
|
294 |
|
|
nB_availability <= 1'b1;
|
295 |
|
|
//chroma
|
296 |
|
|
`ChromaACLevel_Cb_s,`ChromaACLevel_Cr_s:
|
297 |
|
|
nB_availability <= (mb_num_v == 0 && i4x4_CbCr[1] == 0)? 1'b0:1'b1;
|
298 |
|
|
default:nB_availability <= 1'b0;
|
299 |
|
|
endcase
|
300 |
|
|
else
|
301 |
|
|
nB_availability <= nB_availability_reg;
|
302 |
|
|
//------------
|
303 |
|
|
//Derive nA
|
304 |
|
|
//------------
|
305 |
|
|
always @ (posedge clk)
|
306 |
|
|
if (reset_n == 0)
|
307 |
|
|
nA <= 0;
|
308 |
|
|
else if (cavlc_decoder_state == `nAnB_decoding_s && nA_availability == 1)
|
309 |
|
|
case (residual_state)
|
310 |
|
|
//luma
|
311 |
|
|
`Intra16x16DCLevel_s:nA <= (Luma_8x8_AllZeroCoeff_mbAddrA[0] == 0)? 0:LumaLevel_mbAddrA[4:0];
|
312 |
|
|
`Intra16x16ACLevel_s,`LumaLevel_s:
|
313 |
|
|
case (i8x8)
|
314 |
|
|
0:
|
315 |
|
|
case (i4x4)
|
316 |
|
|
0:nA <= (Luma_8x8_AllZeroCoeff_mbAddrA[0] == 0)? 0:LumaLevel_mbAddrA[4:0];
|
317 |
|
|
1:nA <= LumaLevel_CurrMb0[4:0];
|
318 |
|
|
2:nA <= (Luma_8x8_AllZeroCoeff_mbAddrA[0] == 0)? 0:LumaLevel_mbAddrA[9:5];
|
319 |
|
|
3:nA <= LumaLevel_CurrMb0[14:10];
|
320 |
|
|
endcase
|
321 |
|
|
1:
|
322 |
|
|
case (i4x4)
|
323 |
|
|
0:nA <= (CodedBlockPatternLuma[0] == 0)? 0:LumaLevel_CurrMb0[9:5];
|
324 |
|
|
1:nA <= LumaLevel_CurrMb1[4:0];
|
325 |
|
|
2:nA <= (CodedBlockPatternLuma[0] == 0)? 0:LumaLevel_CurrMb0[19:15];
|
326 |
|
|
3:nA <= LumaLevel_CurrMb1[14:10];
|
327 |
|
|
endcase
|
328 |
|
|
2:
|
329 |
|
|
case (i4x4)
|
330 |
|
|
0:nA <= (Luma_8x8_AllZeroCoeff_mbAddrA[1] == 0)? 0:LumaLevel_mbAddrA[14:10];
|
331 |
|
|
1:nA <= LumaLevel_CurrMb2[4:0];
|
332 |
|
|
2:nA <= (Luma_8x8_AllZeroCoeff_mbAddrA[1] == 0)? 0:LumaLevel_mbAddrA[19:15];
|
333 |
|
|
3:nA <= LumaLevel_CurrMb2[14:10];
|
334 |
|
|
endcase
|
335 |
|
|
3:
|
336 |
|
|
case (i4x4)
|
337 |
|
|
0:nA <= (CodedBlockPatternLuma[2] == 0)? 0:LumaLevel_CurrMb2[9:5];
|
338 |
|
|
1:nA <= LumaLevel_CurrMb3[4:0];
|
339 |
|
|
2:nA <= (CodedBlockPatternLuma[2] == 0)? 0:LumaLevel_CurrMb2[19:15];
|
340 |
|
|
3:nA <= LumaLevel_CurrMb3[14:10];
|
341 |
|
|
endcase
|
342 |
|
|
endcase
|
343 |
|
|
//chroma
|
344 |
|
|
`ChromaACLevel_Cb_s:
|
345 |
|
|
case (i4x4_CbCr)
|
346 |
|
|
2'b00:nA <= (Chroma_8x8_AllZeroCoeff_mbAddrA == 0)? 0:ChromaLevel_Cb_mbAddrA[4:0];
|
347 |
|
|
2'b10:nA <= (Chroma_8x8_AllZeroCoeff_mbAddrA == 0)? 0:ChromaLevel_Cb_mbAddrA[9:5];
|
348 |
|
|
2'b01:nA <= (CodedBlockPatternChroma != 2)? 0:ChromaLevel_Cb_CurrMb[4:0];
|
349 |
|
|
2'b11:nA <= (CodedBlockPatternChroma != 2)? 0:ChromaLevel_Cb_CurrMb[14:10];
|
350 |
|
|
endcase
|
351 |
|
|
`ChromaACLevel_Cr_s:
|
352 |
|
|
case (i4x4_CbCr)
|
353 |
|
|
2'b00:nA <= (Chroma_8x8_AllZeroCoeff_mbAddrA == 0)? 0:ChromaLevel_Cr_mbAddrA[4:0];
|
354 |
|
|
2'b10:nA <= (Chroma_8x8_AllZeroCoeff_mbAddrA == 0)? 0:ChromaLevel_Cr_mbAddrA[9:5];
|
355 |
|
|
2'b01:nA <= (CodedBlockPatternChroma != 2)? 0:ChromaLevel_Cr_CurrMb[4:0];
|
356 |
|
|
2'b11:nA <= (CodedBlockPatternChroma != 2)? 0:ChromaLevel_Cr_CurrMb[14:10];
|
357 |
|
|
endcase
|
358 |
|
|
endcase
|
359 |
|
|
else if (cavlc_decoder_state == `nAnB_decoding_s && nA_availability == 0)
|
360 |
|
|
nA <= 0;
|
361 |
|
|
//------------
|
362 |
|
|
//Derive nB
|
363 |
|
|
//------------
|
364 |
|
|
always @ (posedge clk)
|
365 |
|
|
if (reset_n == 0)
|
366 |
|
|
nB <= 0;
|
367 |
|
|
else if (cavlc_decoder_state == `nAnB_decoding_s && nB_availability == 1)
|
368 |
|
|
case (residual_state)
|
369 |
|
|
`Intra16x16DCLevel_s:
|
370 |
|
|
nB <= (Luma_8x8_AllZeroCoeff_mbAddrB[0] == 0)? 0:LumaLevel_mbAddrB_dout[19:15];
|
371 |
|
|
`Intra16x16ACLevel_s,`LumaLevel_s:
|
372 |
|
|
case (i8x8)
|
373 |
|
|
0:
|
374 |
|
|
case (i4x4)
|
375 |
|
|
0:nB <= (Luma_8x8_AllZeroCoeff_mbAddrB[0] == 0)? 0:LumaLevel_mbAddrB_dout[19:15];
|
376 |
|
|
1:nB <= (Luma_8x8_AllZeroCoeff_mbAddrB[0] == 0)? 0:LumaLevel_mbAddrB_dout[14:10];
|
377 |
|
|
2:nB <= LumaLevel_CurrMb0[4:0];
|
378 |
|
|
3:nB <= LumaLevel_CurrMb0[9:5];
|
379 |
|
|
endcase
|
380 |
|
|
1:
|
381 |
|
|
case (i4x4)
|
382 |
|
|
0:nB <= (Luma_8x8_AllZeroCoeff_mbAddrB[1] == 0)? 0:LumaLevel_mbAddrB_dout[9:5];
|
383 |
|
|
1:nB <= (Luma_8x8_AllZeroCoeff_mbAddrB[1] == 0)? 0:LumaLevel_mbAddrB_dout[4:0];
|
384 |
|
|
2:nB <= LumaLevel_CurrMb1[4:0];
|
385 |
|
|
3:nB <= LumaLevel_CurrMb1[9:5];
|
386 |
|
|
endcase
|
387 |
|
|
2:
|
388 |
|
|
case (i4x4)
|
389 |
|
|
0:nB <= (CodedBlockPatternLuma[0] == 0)? 0:LumaLevel_CurrMb0[14:10];
|
390 |
|
|
1:nB <= (CodedBlockPatternLuma[0] == 0)? 0:LumaLevel_CurrMb0[19:15];
|
391 |
|
|
2:nB <= LumaLevel_CurrMb2[4:0];
|
392 |
|
|
3:nB <= LumaLevel_CurrMb2[9:5];
|
393 |
|
|
endcase
|
394 |
|
|
3:
|
395 |
|
|
case (i4x4)
|
396 |
|
|
0:nB <= (CodedBlockPatternLuma[1] == 0)? 0:LumaLevel_CurrMb1[14:10];
|
397 |
|
|
1:nB <= (CodedBlockPatternLuma[1] == 0)? 0:LumaLevel_CurrMb1[19:15];
|
398 |
|
|
2:nB <= LumaLevel_CurrMb3[4:0];
|
399 |
|
|
3:nB <= LumaLevel_CurrMb3[9:5];
|
400 |
|
|
endcase
|
401 |
|
|
endcase
|
402 |
|
|
`ChromaACLevel_Cb_s:
|
403 |
|
|
case (i4x4_CbCr)
|
404 |
|
|
0:nB <= (Chroma_8x8_AllZeroCoeff_mbAddrB == 0)? 0:ChromaLevel_Cb_mbAddrB_dout[9:5];
|
405 |
|
|
1:nB <= (Chroma_8x8_AllZeroCoeff_mbAddrB == 0)? 0:ChromaLevel_Cb_mbAddrB_dout[4:0];
|
406 |
|
|
2:nB <= ChromaLevel_Cb_CurrMb[4:0];
|
407 |
|
|
3:nB <= ChromaLevel_Cb_CurrMb[9:5];
|
408 |
|
|
endcase
|
409 |
|
|
`ChromaACLevel_Cr_s:
|
410 |
|
|
case (i4x4_CbCr)
|
411 |
|
|
0:nB <= (Chroma_8x8_AllZeroCoeff_mbAddrB == 0)? 0:ChromaLevel_Cr_mbAddrB_dout[9:5];
|
412 |
|
|
1:nB <= (Chroma_8x8_AllZeroCoeff_mbAddrB == 0)? 0:ChromaLevel_Cr_mbAddrB_dout[4:0];
|
413 |
|
|
2:nB <= ChromaLevel_Cr_CurrMb[4:0];
|
414 |
|
|
3:nB <= ChromaLevel_Cr_CurrMb[9:5];
|
415 |
|
|
endcase
|
416 |
|
|
default: nB <= 0;
|
417 |
|
|
endcase
|
418 |
|
|
else if (cavlc_decoder_state == `nAnB_decoding_s && nB_availability == 0)
|
419 |
|
|
nB <= 0;
|
420 |
|
|
//------------
|
421 |
|
|
//Derive nC
|
422 |
|
|
//------------
|
423 |
|
|
always @ (posedge clk)
|
424 |
|
|
if (reset_n == 0)
|
425 |
|
|
nC <= 0;
|
426 |
|
|
else if (cavlc_decoder_state == `nC_decoding_s)
|
427 |
|
|
begin
|
428 |
|
|
if (residual_state == `ChromaDCLevel_Cb_s || residual_state == `ChromaDCLevel_Cr_s)
|
429 |
|
|
nC <= 5'b11111;
|
430 |
|
|
else if (nA_availability == 1 && nB_availability == 1)
|
431 |
|
|
nC <= (nA + nB + 1) >> 1;
|
432 |
|
|
else
|
433 |
|
|
nC <= nA + nB;
|
434 |
|
|
end
|
435 |
|
|
//-----------------------
|
436 |
|
|
//LumaLevel_CurrMb write
|
437 |
|
|
//-----------------------
|
438 |
|
|
always @ (posedge clk)
|
439 |
|
|
if (reset_n == 0)
|
440 |
|
|
begin
|
441 |
|
|
LumaLevel_CurrMb0 <= 0; LumaLevel_CurrMb1 <= 0;
|
442 |
|
|
LumaLevel_CurrMb2 <= 0; LumaLevel_CurrMb3 <= 0;
|
443 |
|
|
end
|
444 |
|
|
else if (end_of_one_residual_block == 1 && (residual_state == `Intra16x16ACLevel_s ||
|
445 |
|
|
residual_state == `LumaLevel_s))
|
446 |
|
|
case (i8x8)
|
447 |
|
|
0:
|
448 |
|
|
case (i4x4)
|
449 |
|
|
0:LumaLevel_CurrMb0[4:0] <= TotalCoeff;
|
450 |
|
|
1:LumaLevel_CurrMb0[9:5] <= TotalCoeff;
|
451 |
|
|
2:LumaLevel_CurrMb0[14:10] <= TotalCoeff;
|
452 |
|
|
3:LumaLevel_CurrMb0[19:15] <= TotalCoeff;
|
453 |
|
|
endcase
|
454 |
|
|
1:
|
455 |
|
|
case (i4x4)
|
456 |
|
|
0:LumaLevel_CurrMb1[4:0] <= TotalCoeff;
|
457 |
|
|
1:LumaLevel_CurrMb1[9:5] <= TotalCoeff;
|
458 |
|
|
2:LumaLevel_CurrMb1[14:10] <= TotalCoeff;
|
459 |
|
|
3:LumaLevel_CurrMb1[19:15] <= TotalCoeff;
|
460 |
|
|
endcase
|
461 |
|
|
2:
|
462 |
|
|
case (i4x4)
|
463 |
|
|
0:LumaLevel_CurrMb2[4:0] <= TotalCoeff;
|
464 |
|
|
1:LumaLevel_CurrMb2[9:5] <= TotalCoeff;
|
465 |
|
|
2:LumaLevel_CurrMb2[14:10] <= TotalCoeff;
|
466 |
|
|
3:LumaLevel_CurrMb2[19:15] <= TotalCoeff;
|
467 |
|
|
endcase
|
468 |
|
|
3:
|
469 |
|
|
case (i4x4)
|
470 |
|
|
0:LumaLevel_CurrMb3[4:0] <= TotalCoeff;
|
471 |
|
|
1:LumaLevel_CurrMb3[9:5] <= TotalCoeff;
|
472 |
|
|
2:LumaLevel_CurrMb3[14:10] <= TotalCoeff;
|
473 |
|
|
3:LumaLevel_CurrMb3[19:15] <= TotalCoeff;
|
474 |
|
|
endcase
|
475 |
|
|
endcase
|
476 |
|
|
//---------------------------
|
477 |
|
|
//ChromaLevel_Cb_CurrMb write
|
478 |
|
|
//---------------------------
|
479 |
|
|
always @ (posedge clk)
|
480 |
|
|
if (reset_n == 0)
|
481 |
|
|
ChromaLevel_Cb_CurrMb <= 0;
|
482 |
|
|
else if (end_of_one_residual_block == 1 && residual_state == `ChromaACLevel_Cb_s)
|
483 |
|
|
case (i4x4_CbCr)
|
484 |
|
|
0:ChromaLevel_Cb_CurrMb[4:0] <= TotalCoeff;
|
485 |
|
|
1:ChromaLevel_Cb_CurrMb[9:5] <= TotalCoeff;
|
486 |
|
|
2:ChromaLevel_Cb_CurrMb[14:10] <= TotalCoeff;
|
487 |
|
|
3:ChromaLevel_Cb_CurrMb[19:15] <= TotalCoeff;
|
488 |
|
|
endcase
|
489 |
|
|
//---------------------------
|
490 |
|
|
//ChromaLevel_Cr_CurrMb write
|
491 |
|
|
//---------------------------
|
492 |
|
|
always @ (posedge clk)
|
493 |
|
|
if (reset_n == 0)
|
494 |
|
|
ChromaLevel_Cr_CurrMb <= 0;
|
495 |
|
|
else if (end_of_one_residual_block == 1 && residual_state == `ChromaACLevel_Cr_s)
|
496 |
|
|
case (i4x4_CbCr)
|
497 |
|
|
0:ChromaLevel_Cr_CurrMb[4:0] <= TotalCoeff;
|
498 |
|
|
1:ChromaLevel_Cr_CurrMb[9:5] <= TotalCoeff;
|
499 |
|
|
2:ChromaLevel_Cr_CurrMb[14:10] <= TotalCoeff;
|
500 |
|
|
3:ChromaLevel_Cr_CurrMb[19:15] <= TotalCoeff;
|
501 |
|
|
endcase
|
502 |
|
|
//-----------------------
|
503 |
|
|
//LumaLevel_mbAddrA write
|
504 |
|
|
//-----------------------
|
505 |
|
|
always @ (posedge clk)
|
506 |
|
|
if (reset_n == 0)
|
507 |
|
|
LumaLevel_mbAddrA <= 0;
|
508 |
|
|
else if (end_of_one_residual_block == 1 && (residual_state == `Intra16x16ACLevel_s || residual_state == `LumaLevel_s) && mb_num_h != 10)
|
509 |
|
|
case (i8x8)
|
510 |
|
|
1:
|
511 |
|
|
case (i4x4)
|
512 |
|
|
1:LumaLevel_mbAddrA[4:0] <= TotalCoeff;
|
513 |
|
|
3:LumaLevel_mbAddrA[9:5] <= TotalCoeff;
|
514 |
|
|
endcase
|
515 |
|
|
3:
|
516 |
|
|
case (i4x4)
|
517 |
|
|
1:LumaLevel_mbAddrA[14:10] <= TotalCoeff;
|
518 |
|
|
3:LumaLevel_mbAddrA[19:15] <= TotalCoeff;
|
519 |
|
|
endcase
|
520 |
|
|
endcase
|
521 |
|
|
//----------------------------
|
522 |
|
|
//ChromaLevel_Cb_mbAddrA write
|
523 |
|
|
//----------------------------
|
524 |
|
|
always @ (posedge clk)
|
525 |
|
|
if (reset_n == 0)
|
526 |
|
|
ChromaLevel_Cb_mbAddrA <= 0;
|
527 |
|
|
else if (end_of_one_residual_block == 1 && residual_state == `ChromaACLevel_Cb_s && mb_num_h != 10)
|
528 |
|
|
begin
|
529 |
|
|
if (i4x4_CbCr == 1)
|
530 |
|
|
ChromaLevel_Cb_mbAddrA[4:0] <= TotalCoeff;
|
531 |
|
|
if (i4x4_CbCr == 3)
|
532 |
|
|
ChromaLevel_Cb_mbAddrA[9:5] <= TotalCoeff;
|
533 |
|
|
end
|
534 |
|
|
//----------------------------
|
535 |
|
|
//ChromaLevel_Cr_mbAddrA write
|
536 |
|
|
//----------------------------
|
537 |
|
|
always @ (posedge clk)
|
538 |
|
|
if (reset_n == 0)
|
539 |
|
|
ChromaLevel_Cr_mbAddrA <= 0;
|
540 |
|
|
else if (end_of_one_residual_block == 1 && residual_state == `ChromaACLevel_Cr_s && mb_num_h != 10)
|
541 |
|
|
begin
|
542 |
|
|
if (i4x4_CbCr == 1)
|
543 |
|
|
ChromaLevel_Cr_mbAddrA[4:0] <= TotalCoeff;
|
544 |
|
|
if (i4x4_CbCr == 3)
|
545 |
|
|
ChromaLevel_Cr_mbAddrA[9:5] <= TotalCoeff;
|
546 |
|
|
end
|
547 |
|
|
//------------------------------
|
548 |
|
|
//LumaLevel_mbAddrB read & write
|
549 |
|
|
//------------------------------
|
550 |
|
|
always @ (reset_n or cavlc_decoder_state or residual_state or nB_availability or
|
551 |
|
|
Luma_8x8_AllZeroCoeff_mbAddrB or i8x8 or i4x4 or end_of_one_residual_block or
|
552 |
|
|
mb_num_v or mb_num_h or CodedBlockPatternLuma or LumaLevel_CurrMb2 or LumaLevel_CurrMb3 or TotalCoeff)
|
553 |
|
|
if (reset_n == 0)
|
554 |
|
|
begin
|
555 |
|
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
556 |
|
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
557 |
|
|
LumaLevel_mbAddrB_din <= 0;
|
558 |
|
|
end
|
559 |
|
|
//--read--
|
560 |
|
|
else if (cavlc_decoder_state == `nAnB_decoding_s && nB_availability == 1) //read
|
561 |
|
|
case (residual_state)
|
562 |
|
|
`Intra16x16DCLevel_s:
|
563 |
|
|
if (Luma_8x8_AllZeroCoeff_mbAddrB == 0)
|
564 |
|
|
begin
|
565 |
|
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
566 |
|
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
567 |
|
|
LumaLevel_mbAddrB_din <= 0;
|
568 |
|
|
end
|
569 |
|
|
else
|
570 |
|
|
begin
|
571 |
|
|
LumaLevel_mbAddrB_cs_n <= 0; LumaLevel_mbAddrB_wr_n <= 1;
|
572 |
|
|
LumaLevel_mbAddrB_rd_addr <= mb_num_h; LumaLevel_mbAddrB_wr_addr <= 0;
|
573 |
|
|
LumaLevel_mbAddrB_din <= 0;
|
574 |
|
|
end
|
575 |
|
|
`Intra16x16ACLevel_s,`LumaLevel_s:
|
576 |
|
|
case (i8x8)
|
577 |
|
|
0:
|
578 |
|
|
if (Luma_8x8_AllZeroCoeff_mbAddrB[0] == 0)
|
579 |
|
|
begin
|
580 |
|
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
581 |
|
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
582 |
|
|
LumaLevel_mbAddrB_din <= 0;
|
583 |
|
|
end
|
584 |
|
|
else
|
585 |
|
|
begin
|
586 |
|
|
LumaLevel_mbAddrB_cs_n <= 0; LumaLevel_mbAddrB_wr_n <= 1;
|
587 |
|
|
LumaLevel_mbAddrB_rd_addr <= mb_num_h; LumaLevel_mbAddrB_wr_addr <= 0;
|
588 |
|
|
LumaLevel_mbAddrB_din <= 0;
|
589 |
|
|
end
|
590 |
|
|
1:
|
591 |
|
|
if (Luma_8x8_AllZeroCoeff_mbAddrB[1] == 0)
|
592 |
|
|
begin
|
593 |
|
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
594 |
|
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
595 |
|
|
LumaLevel_mbAddrB_din <= 0;
|
596 |
|
|
end
|
597 |
|
|
else
|
598 |
|
|
begin
|
599 |
|
|
LumaLevel_mbAddrB_cs_n <= 0; LumaLevel_mbAddrB_wr_n <= 1;
|
600 |
|
|
LumaLevel_mbAddrB_rd_addr <= mb_num_h; LumaLevel_mbAddrB_wr_addr <= 0;
|
601 |
|
|
LumaLevel_mbAddrB_din <= 0;
|
602 |
|
|
end
|
603 |
|
|
default:
|
604 |
|
|
begin
|
605 |
|
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
606 |
|
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
607 |
|
|
LumaLevel_mbAddrB_din <= 0;
|
608 |
|
|
end
|
609 |
|
|
endcase
|
610 |
|
|
default:
|
611 |
|
|
begin
|
612 |
|
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
613 |
|
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
614 |
|
|
LumaLevel_mbAddrB_din <= 0;
|
615 |
|
|
end
|
616 |
|
|
endcase
|
617 |
|
|
//--write--
|
618 |
|
|
else if ((residual_state == `Intra16x16ACLevel_s || residual_state == `LumaLevel_s) && end_of_one_residual_block == 1 && mb_num_v != 8)
|
619 |
|
|
case (CodedBlockPatternLuma[3:2])
|
620 |
|
|
2'b00:
|
621 |
|
|
begin
|
622 |
|
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
623 |
|
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
624 |
|
|
LumaLevel_mbAddrB_din <= 0;
|
625 |
|
|
end
|
626 |
|
|
2'b10,2'b11:
|
627 |
|
|
if (i8x8 == 3 && i4x4 == 3)
|
628 |
|
|
begin
|
629 |
|
|
LumaLevel_mbAddrB_cs_n <= 0; LumaLevel_mbAddrB_wr_n <= 0;
|
630 |
|
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= mb_num_h;
|
631 |
|
|
LumaLevel_mbAddrB_din <= (CodedBlockPatternLuma[3:2] == 2'b10)?
|
632 |
|
|
{10'b0, LumaLevel_CurrMb3[14:10],TotalCoeff}:
|
633 |
|
|
{LumaLevel_CurrMb2[14:10],LumaLevel_CurrMb2[19:15],LumaLevel_CurrMb3[14:10],TotalCoeff};
|
634 |
|
|
end
|
635 |
|
|
else
|
636 |
|
|
begin
|
637 |
|
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
638 |
|
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
639 |
|
|
LumaLevel_mbAddrB_din <= 0;
|
640 |
|
|
end
|
641 |
|
|
2'b01:
|
642 |
|
|
if (i8x8 == 2 && i4x4 == 3)
|
643 |
|
|
begin
|
644 |
|
|
LumaLevel_mbAddrB_cs_n <= 0; LumaLevel_mbAddrB_wr_n <= 0;
|
645 |
|
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= mb_num_h;
|
646 |
|
|
LumaLevel_mbAddrB_din <= {LumaLevel_CurrMb2[14:10],TotalCoeff,10'b0};
|
647 |
|
|
end
|
648 |
|
|
else
|
649 |
|
|
begin
|
650 |
|
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
651 |
|
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
652 |
|
|
LumaLevel_mbAddrB_din <= 0;
|
653 |
|
|
end
|
654 |
|
|
endcase
|
655 |
|
|
else
|
656 |
|
|
begin
|
657 |
|
|
LumaLevel_mbAddrB_cs_n <= 1; LumaLevel_mbAddrB_wr_n <= 1;
|
658 |
|
|
LumaLevel_mbAddrB_rd_addr <= 0; LumaLevel_mbAddrB_wr_addr <= 0;
|
659 |
|
|
LumaLevel_mbAddrB_din <= 0;
|
660 |
|
|
end
|
661 |
|
|
//-----------------------------------
|
662 |
|
|
//ChromaLevel_Cb_mbAddrB read & write
|
663 |
|
|
//-----------------------------------
|
664 |
|
|
always @ (reset_n or cavlc_decoder_state or residual_state or nB_availability or i4x4_CbCr or ChromaLevel_Cb_CurrMb
|
665 |
|
|
or Chroma_8x8_AllZeroCoeff_mbAddrB or mb_num_h or mb_num_v or TotalCoeff or end_of_one_residual_block)
|
666 |
|
|
if (reset_n == 0)
|
667 |
|
|
begin
|
668 |
|
|
ChromaLevel_Cb_mbAddrB_cs_n <= 1; ChromaLevel_Cb_mbAddrB_wr_n <= 1;
|
669 |
|
|
ChromaLevel_Cb_mbAddrB_rd_addr <= 0; ChromaLevel_Cb_mbAddrB_wr_addr <= 0;
|
670 |
|
|
ChromaLevel_Cb_mbAddrB_din <= 0;
|
671 |
|
|
end
|
672 |
|
|
//--read--
|
673 |
|
|
else if (cavlc_decoder_state == `nAnB_decoding_s && nB_availability == 1 &&
|
674 |
|
|
residual_state == `ChromaACLevel_Cb_s)
|
675 |
|
|
begin
|
676 |
|
|
if (i4x4_CbCr[1] == 0 && Chroma_8x8_AllZeroCoeff_mbAddrB == 1)
|
677 |
|
|
begin
|
678 |
|
|
ChromaLevel_Cb_mbAddrB_cs_n <= 0; ChromaLevel_Cb_mbAddrB_wr_n <= 1;
|
679 |
|
|
ChromaLevel_Cb_mbAddrB_rd_addr <= mb_num_h; ChromaLevel_Cb_mbAddrB_wr_addr <= 0;
|
680 |
|
|
ChromaLevel_Cb_mbAddrB_din <= 0;
|
681 |
|
|
end
|
682 |
|
|
else
|
683 |
|
|
begin
|
684 |
|
|
ChromaLevel_Cb_mbAddrB_cs_n <= 1; ChromaLevel_Cb_mbAddrB_wr_n <= 1;
|
685 |
|
|
ChromaLevel_Cb_mbAddrB_rd_addr <= 0; ChromaLevel_Cb_mbAddrB_wr_addr <= 0;
|
686 |
|
|
ChromaLevel_Cb_mbAddrB_din <= 0;
|
687 |
|
|
end
|
688 |
|
|
end
|
689 |
|
|
//--write--
|
690 |
|
|
else if (residual_state == `ChromaACLevel_Cb_s && end_of_one_residual_block == 1 && mb_num_v != 8)
|
691 |
|
|
begin
|
692 |
|
|
if (i4x4_CbCr == 3)
|
693 |
|
|
begin
|
694 |
|
|
ChromaLevel_Cb_mbAddrB_cs_n <= 0; ChromaLevel_Cb_mbAddrB_wr_n <= 0;
|
695 |
|
|
ChromaLevel_Cb_mbAddrB_rd_addr <= 0; ChromaLevel_Cb_mbAddrB_wr_addr <= mb_num_h;
|
696 |
|
|
ChromaLevel_Cb_mbAddrB_din <= {ChromaLevel_Cb_CurrMb[14:10],TotalCoeff};
|
697 |
|
|
end
|
698 |
|
|
else
|
699 |
|
|
begin
|
700 |
|
|
ChromaLevel_Cb_mbAddrB_cs_n <= 1; ChromaLevel_Cb_mbAddrB_wr_n <= 1;
|
701 |
|
|
ChromaLevel_Cb_mbAddrB_rd_addr <= 0; ChromaLevel_Cb_mbAddrB_wr_addr <= 0;
|
702 |
|
|
ChromaLevel_Cb_mbAddrB_din <= 0;
|
703 |
|
|
end
|
704 |
|
|
end
|
705 |
|
|
else
|
706 |
|
|
begin
|
707 |
|
|
ChromaLevel_Cb_mbAddrB_cs_n <= 1; ChromaLevel_Cb_mbAddrB_wr_n <= 1;
|
708 |
|
|
ChromaLevel_Cb_mbAddrB_rd_addr <= 0; ChromaLevel_Cb_mbAddrB_wr_addr <= 0;
|
709 |
|
|
ChromaLevel_Cb_mbAddrB_din <= 0;
|
710 |
|
|
end
|
711 |
|
|
//-----------------------------------
|
712 |
|
|
//ChromaLevel_Cr_mbAddrB read & write
|
713 |
|
|
//-----------------------------------
|
714 |
|
|
always @ (reset_n or cavlc_decoder_state or residual_state or nB_availability or i4x4_CbCr
|
715 |
|
|
or ChromaLevel_Cr_CurrMb or Chroma_8x8_AllZeroCoeff_mbAddrB or mb_num_h or mb_num_v or TotalCoeff
|
716 |
|
|
or end_of_one_residual_block)
|
717 |
|
|
if (reset_n == 0)
|
718 |
|
|
begin
|
719 |
|
|
ChromaLevel_Cr_mbAddrB_cs_n <= 1; ChromaLevel_Cr_mbAddrB_wr_n <= 1;
|
720 |
|
|
ChromaLevel_Cr_mbAddrB_rd_addr <= 0; ChromaLevel_Cr_mbAddrB_wr_addr <= 0;
|
721 |
|
|
ChromaLevel_Cr_mbAddrB_din <= 0;
|
722 |
|
|
end
|
723 |
|
|
//--read--
|
724 |
|
|
else if (cavlc_decoder_state == `nAnB_decoding_s && nB_availability == 1 && residual_state == `ChromaACLevel_Cr_s) //read
|
725 |
|
|
begin
|
726 |
|
|
if (i4x4_CbCr[1] == 0 && Chroma_8x8_AllZeroCoeff_mbAddrB == 1)
|
727 |
|
|
begin
|
728 |
|
|
ChromaLevel_Cr_mbAddrB_cs_n <= 0; ChromaLevel_Cr_mbAddrB_wr_n <= 1;
|
729 |
|
|
ChromaLevel_Cr_mbAddrB_rd_addr <= mb_num_h; ChromaLevel_Cr_mbAddrB_wr_addr <= 0;
|
730 |
|
|
ChromaLevel_Cr_mbAddrB_din <= 0;
|
731 |
|
|
end
|
732 |
|
|
else
|
733 |
|
|
begin
|
734 |
|
|
ChromaLevel_Cr_mbAddrB_cs_n <= 1; ChromaLevel_Cr_mbAddrB_wr_n <= 1;
|
735 |
|
|
ChromaLevel_Cr_mbAddrB_rd_addr <= 0; ChromaLevel_Cr_mbAddrB_wr_addr <= 0;
|
736 |
|
|
ChromaLevel_Cr_mbAddrB_din <= 0;
|
737 |
|
|
end
|
738 |
|
|
end
|
739 |
|
|
//--write--
|
740 |
|
|
else if (residual_state == `ChromaACLevel_Cr_s && end_of_one_residual_block == 1 && mb_num_v != 8)
|
741 |
|
|
begin
|
742 |
|
|
if (i4x4_CbCr == 3)
|
743 |
|
|
begin
|
744 |
|
|
ChromaLevel_Cr_mbAddrB_cs_n <= 0; ChromaLevel_Cr_mbAddrB_wr_n <= 0;
|
745 |
|
|
ChromaLevel_Cr_mbAddrB_rd_addr <= 0; ChromaLevel_Cr_mbAddrB_wr_addr <= mb_num_h;
|
746 |
|
|
ChromaLevel_Cr_mbAddrB_din <= {ChromaLevel_Cr_CurrMb[14:10],TotalCoeff};
|
747 |
|
|
end
|
748 |
|
|
else
|
749 |
|
|
begin
|
750 |
|
|
ChromaLevel_Cr_mbAddrB_cs_n <= 1; ChromaLevel_Cr_mbAddrB_wr_n <= 1;
|
751 |
|
|
ChromaLevel_Cr_mbAddrB_rd_addr <= 0; ChromaLevel_Cr_mbAddrB_wr_addr <= 0;
|
752 |
|
|
ChromaLevel_Cr_mbAddrB_din <= 0;
|
753 |
|
|
end
|
754 |
|
|
end
|
755 |
|
|
else
|
756 |
|
|
begin
|
757 |
|
|
ChromaLevel_Cr_mbAddrB_cs_n <= 1; ChromaLevel_Cr_mbAddrB_wr_n <= 1;
|
758 |
|
|
ChromaLevel_Cr_mbAddrB_rd_addr <= 0; ChromaLevel_Cr_mbAddrB_wr_addr <= 0;
|
759 |
|
|
ChromaLevel_Cr_mbAddrB_din <= 0;
|
760 |
|
|
end
|
761 |
|
|
endmodule
|