OpenCores
URL https://opencores.org/ocsvn/numbert_sort_device/numbert_sort_device/trunk

Subversion Repositories numbert_sort_device

[/] [numbert_sort_device/] [trunk/] [boards/] [DE0/] [DE0_VGA.sdc] - Blame information for rev 2

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 leshabiruk
#**************************************************************
2
# This .sdc file is created by Terasic Tool.
3
# Users are recommended to modify this file to match users logic.
4
#**************************************************************
5
 
6
#**************************************************************
7
# Create Clock
8
#**************************************************************
9
create_clock -period 20 [get_ports CLOCK_50]
10
create_clock -period 20 [get_ports CLOCK2_50]
11
create_clock -period 20 [get_ports CLOCK3_50]
12
 
13
#**************************************************************
14
# Create Generated Clock
15
#**************************************************************
16
derive_pll_clocks
17
 
18
 
19
 
20
#**************************************************************
21
# Set Clock Latency
22
#**************************************************************
23
 
24
 
25
 
26
#**************************************************************
27
# Set Clock Uncertainty
28
#**************************************************************
29
derive_clock_uncertainty
30
 
31
 
32
 
33
#**************************************************************
34
# Set Input Delay
35
#**************************************************************
36
 
37
 
38
 
39
#**************************************************************
40
# Set Output Delay
41
#**************************************************************
42
 
43
 
44
 
45
#**************************************************************
46
# Set Clock Groups
47
#**************************************************************
48
 
49
 
50
 
51
#**************************************************************
52
# Set False Path
53
#**************************************************************
54
 
55
 
56
 
57
#**************************************************************
58
# Set Multicycle Path
59
#**************************************************************
60
 
61
 
62
 
63
#**************************************************************
64
# Set Maximum Delay
65
#**************************************************************
66
 
67
 
68
 
69
#**************************************************************
70
# Set Minimum Delay
71
#**************************************************************
72
 
73
 
74
 
75
#**************************************************************
76
# Set Input Transition
77
#**************************************************************
78
 
79
 
80
 
81
#**************************************************************
82
# Set Load
83
#**************************************************************
84
 
85
 
86
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.