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leshabiruk |
// --------------------------------------------------------------------
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// Copyright (c) 2009 by Terasic Technologies Inc.
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// --------------------------------------------------------------------
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//
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// Permission:
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//
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// Terasic grants permission to use and modify this code for use
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// in synthesis for all Terasic Development Boards and Altera Development
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// Kits made by Terasic. Other use of this code, including the selling
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// ,duplication, or modification of any portion is strictly prohibited.
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//
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// Disclaimer:
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//
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// This VHDL/Verilog or C/C++ source code is intended as a design reference
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// which illustrates how these types of functions can be implemented.
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// It is the user's responsibility to verify their design for
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// consistency and functionality through the use of formal
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// verification methods. Terasic provides no warranty regarding the use
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// or functionality of this code.
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//
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// --------------------------------------------------------------------
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//
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// Terasic Technologies Inc
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// 356 Fu-Shin E. Rd Sec. 1. JhuBei City,
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// HsinChu County, Taiwan
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// 302
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//
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// web: http://www.terasic.com/
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// email: support@terasic.com
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//
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// --------------------------------------------------------------------
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//
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// Major Functions: DE0 VGA
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//
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// --------------------------------------------------------------------
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//
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// Revision History :
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// --------------------------------------------------------------------
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// Ver :| Author :| Mod. Date :| Changes Made:
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// --------------------------------------------------------------------
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module DE0_VGA
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(
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//////////////////// Clock Input ////////////////////
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CLOCK_50, // 50 MHz
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CLOCK_50_2, // 50 MHz
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//////////////////// Push Button ////////////////////
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BUTTON, // Pushbutton[2:0]
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//////////////////// DPDT Switch ////////////////////
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SW, // Toggle Switch[9:0]
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//////////////////// 7-SEG Dispaly ////////////////////
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HEX0_D, // Seven Segment Digit 0
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HEX0_DP, // Seven Segment Digit DP 0
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HEX1_D, // Seven Segment Digit 1
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HEX1_DP, // Seven Segment Digit DP 1
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HEX2_D, // Seven Segment Digit 2
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HEX2_DP, // Seven Segment Digit DP 2
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HEX3_D, // Seven Segment Digit 3
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HEX3_DP, // Seven Segment Digit DP 3
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//////////////////////// LED ////////////////////////
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LEDG, // LED Green[9:0]
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//////////////////////// UART ////////////////////////
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UART_TXD, // UART Transmitter
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UART_RXD, // UART Receiver
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UART_CTS, // UART Clear To Send
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UART_RTS, // UART Request To Send
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///////////////////// SDRAM Interface ////////////////
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DRAM_DQ, // SDRAM Data bus 16 Bits
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DRAM_ADDR, // SDRAM Address bus 13 Bits
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DRAM_LDQM, // SDRAM Low-byte Data Mask
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DRAM_UDQM, // SDRAM High-byte Data Mask
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DRAM_WE_N, // SDRAM Write Enable
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DRAM_CAS_N, // SDRAM Column Address Strobe
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DRAM_RAS_N, // SDRAM Row Address Strobe
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DRAM_CS_N, // SDRAM Chip Select
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DRAM_BA_0, // SDRAM Bank Address 0
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DRAM_BA_1, // SDRAM Bank Address 1
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DRAM_CLK, // SDRAM Clock
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DRAM_CKE, // SDRAM Clock Enable
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//////////////////// Flash Interface ////////////////
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FL_DQ, // FLASH Data bus 15 Bits
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FL_DQ15_AM1, // FLASH Data bus Bit 15 or Address A-1
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FL_ADDR, // FLASH Address bus 22 Bits
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FL_WE_N, // FLASH Write Enable
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FL_RST_N, // FLASH Reset
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FL_OE_N, // FLASH Output Enable
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FL_CE_N, // FLASH Chip Enable
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FL_WP_N, // FLASH Hardware Write Protect
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FL_BYTE_N, // FLASH Selects 8/16-bit mode
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FL_RY, // FLASH Ready/Busy
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//////////////////// LCD Module 16X2 ////////////////
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LCD_BLON, // LCD Back Light ON/OFF
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LCD_RW, // LCD Read/Write Select, 0 = Write, 1 = Read
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LCD_EN, // LCD Enable
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LCD_RS, // LCD Command/Data Select, 0 = Command, 1 = Data
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LCD_DATA, // LCD Data bus 8 bits
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//////////////////// SD_Card Interface ////////////////
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SD_DAT0, // SD Card Data 0
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SD_DAT3, // SD Card Data 3
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SD_CMD, // SD Card Command Signal
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SD_CLK, // SD Card Clock
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SD_WP_N, // SD Card Write Protect
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//////////////////// PS2 ////////////////////////////
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PS2_KBDAT, // PS2 Keyboard Data
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PS2_KBCLK, // PS2 Keyboard Clock
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PS2_MSDAT, // PS2 Mouse Data
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PS2_MSCLK, // PS2 Mouse Clock
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//////////////////// VGA ////////////////////////////
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VGA_HS, // VGA H_SYNC
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VGA_VS, // VGA V_SYNC
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VGA_R, // VGA Red[3:0]
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VGA_G, // VGA Green[3:0]
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VGA_B, // VGA Blue[3:0]
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//////////////////// GPIO ////////////////////////////
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GPIO0_CLKIN, // GPIO Connection 0 Clock In Bus
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GPIO0_CLKOUT, // GPIO Connection 0 Clock Out Bus
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GPIO0_D, // GPIO Connection 0 Data Bus
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GPIO1_CLKIN, // GPIO Connection 1 Clock In Bus
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GPIO1_CLKOUT, // GPIO Connection 1 Clock Out Bus
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GPIO1_D // GPIO Connection 1 Data Bus
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);
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parameter R_SZ= 128;
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//////////////////////// Clock Input ////////////////////////
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input CLOCK_50; // 50 MHz
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input CLOCK_50_2; // 50 MHz
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//////////////////////// Push Button ////////////////////////
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input [2:0] BUTTON; // Pushbutton[2:0]
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//////////////////////// DPDT Switch ////////////////////////
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input [9:0] SW; // Toggle Switch[9:0]
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//////////////////////// 7-SEG Dispaly ////////////////////////
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output [6:0] HEX0_D; // Seven Segment Digit 0
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output HEX0_DP; // Seven Segment Digit DP 0
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output [6:0] HEX1_D; // Seven Segment Digit 1
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output HEX1_DP; // Seven Segment Digit DP 1
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output [6:0] HEX2_D; // Seven Segment Digit 2
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output HEX2_DP; // Seven Segment Digit DP 2
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output [6:0] HEX3_D; // Seven Segment Digit 3
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output HEX3_DP; // Seven Segment Digit DP 3
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//////////////////////////// LED ////////////////////////////
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output [9:0] LEDG; // LED Green[9:0]
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//////////////////////////// UART ////////////////////////////
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output UART_TXD; // UART Transmitter
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input UART_RXD; // UART Receiver
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output UART_CTS; // UART Clear To Send
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input UART_RTS; // UART Request To Send
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/////////////////////// SDRAM Interface ////////////////////////
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inout [15:0] DRAM_DQ; // SDRAM Data bus 16 Bits
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output [12:0] DRAM_ADDR; // SDRAM Address bus 13 Bits
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output DRAM_LDQM; // SDRAM Low-byte Data Mask
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output DRAM_UDQM; // SDRAM High-byte Data Mask
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output DRAM_WE_N; // SDRAM Write Enable
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output DRAM_CAS_N; // SDRAM Column Address Strobe
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output DRAM_RAS_N; // SDRAM Row Address Strobe
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output DRAM_CS_N; // SDRAM Chip Select
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output DRAM_BA_0; // SDRAM Bank Address 0
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output DRAM_BA_1; // SDRAM Bank Address 1
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output DRAM_CLK; // SDRAM Clock
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output DRAM_CKE; // SDRAM Clock Enable
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//////////////////////// Flash Interface ////////////////////////
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inout [14:0] FL_DQ; // FLASH Data bus 15 Bits
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inout FL_DQ15_AM1; // FLASH Data bus Bit 15 or Address A-1
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output [21:0] FL_ADDR; // FLASH Address bus 22 Bits
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output FL_WE_N; // FLASH Write Enable
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output FL_RST_N; // FLASH Reset
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output FL_OE_N; // FLASH Output Enable
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output FL_CE_N; // FLASH Chip Enable
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output FL_WP_N; // FLASH Hardware Write Protect
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output FL_BYTE_N; // FLASH Selects 8/16-bit mode
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input FL_RY; // FLASH Ready/Busy
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//////////////////// LCD Module 16X2 ////////////////////////////
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inout [7:0] LCD_DATA; // LCD Data bus 8 bits
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output LCD_BLON; // LCD Back Light ON/OFF
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output LCD_RW; // LCD Read/Write Select, 0 = Write, 1 = Read
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output LCD_EN; // LCD Enable
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output LCD_RS; // LCD Command/Data Select, 0 = Command, 1 = Data
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//////////////////// SD Card Interface ////////////////////////
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inout SD_DAT0; // SD Card Data 0
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inout SD_DAT3; // SD Card Data 3
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inout SD_CMD; // SD Card Command Signal
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output SD_CLK; // SD Card Clock
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input SD_WP_N; // SD Card Write Protect
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//////////////////////// PS2 ////////////////////////////////
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inout PS2_KBDAT; // PS2 Keyboard Data
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inout PS2_KBCLK; // PS2 Keyboard Clock
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inout PS2_MSDAT; // PS2 Mouse Data
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inout PS2_MSCLK; // PS2 Mouse Clock
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//////////////////////// VGA ////////////////////////////
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output VGA_HS; // VGA H_SYNC
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output VGA_VS; // VGA V_SYNC
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output [3:0] VGA_R; // VGA Red[3:0]
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output [3:0] VGA_G; // VGA Green[3:0]
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output [3:0] VGA_B; // VGA Blue[3:0]
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//////////////////////// GPIO ////////////////////////////////
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input [1:0] GPIO0_CLKIN; // GPIO Connection 0 Clock In Bus
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output [1:0] GPIO0_CLKOUT; // GPIO Connection 0 Clock Out Bus
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inout [31:0] GPIO0_D; // GPIO Connection 0 Data Bus
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input [1:0] GPIO1_CLKIN; // GPIO Connection 1 Clock In Bus
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output [1:0] GPIO1_CLKOUT; // GPIO Connection 1 Clock Out Bus
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inout [31:0] GPIO1_D; // GPIO Connection 1 Data Bus
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//=======================================================
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// REG/WIRE declarations
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//=======================================================
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// All inout port turn to tri-state
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assign DRAM_DQ = 16'hzzzz;
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assign FL_DQ = 16'hzzzz;
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assign LCD_DATA = 8'hzz;
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assign SD_DAT0 = 1'hz;
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assign SD_DAT3 = 1'hz;
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assign SD_CMD = 1'hz;
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assign PS2_KBDAT = 1'hz;
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assign PS2_KBCLK = 1'hz;
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assign PS2_MSDAT = 1'hz;
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assign PS2_MSCLK = 1'hz;
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assign GPIO0_D = 32'hzzzzzzzz;
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assign GPIO1_D = 32'hzzzzzzzz;
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//assign HEX0_D = 7'h7F;
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assign HEX0_DP = ~seg_first;
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//assign HEX1_D = 7'h7F;
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assign HEX1_DP = ~seg_first;
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//assign HEX2_D = 7'h7F;
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assign HEX2_DP = ~seg_first;
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//assign HEX3_D = 7'h7F;
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assign HEX3_DP = ~seg_first;
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assign LEDG = 10'h000;
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//////////////////////// VGA ////////////////////////////
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wire VGA_CTRL_CLK;
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wire [11:0] mVGA_X;
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wire [11:0] mVGA_Y;
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wire [9:0] mVGA_R;
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wire [9:0] mVGA_G;
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wire [9:0] mVGA_B;
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wire [9:0] sVGA_R;
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wire [9:0] sVGA_G;
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wire [9:0] sVGA_B;
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assign VGA_R = sVGA_R[7:4];
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assign VGA_G = sVGA_G[7:4];
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assign VGA_B = sVGA_B[7:4];
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//=======================================================
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// Structural coding
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//=======================================================
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//////////////////////// VGA ////////////////////////////
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VGA_CLK u1_1240x1024
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( .inclk0(CLOCK_50),
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.c0(VGA_CTRL_CLK)
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);
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defparam u1_1240x1024.PLL_MUL= 54;
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defparam u1_1240x1024.PLL_DIV= 25;
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VGA_Ctrl u2_1240x1024
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( // Host Side
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.oCurrent_X(mVGA_X),
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.oCurrent_Y(mVGA_Y),
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.iRed(mVGA_R),
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.iGreen(mVGA_G),
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.iBlue(mVGA_B),
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// VGA Side
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.oVGA_R(sVGA_R),
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.oVGA_G(sVGA_G),
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.oVGA_B(sVGA_B),
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.oVGA_HS(VGA_HS),
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.oVGA_VS(VGA_VS),
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.oVGA_SYNC(),
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.oVGA_BLANK(),
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.oVGA_CLOCK(),
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// Control Signal
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.iCLK(VGA_CTRL_CLK),
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.iRST_N(BUTTON[0]),
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.les_btn(BUTTON[1])
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);
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defparam u2_1240x1024.H_FRONT = 48;
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defparam u2_1240x1024.H_SYNC = 112;
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defparam u2_1240x1024.H_BACK = 248;
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defparam u2_1240x1024.H_ACT = 1280;
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defparam u2_1240x1024.V_FRONT = 1;
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defparam u2_1240x1024.V_SYNC = 3;
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defparam u2_1240x1024.V_BACK = 38;
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defparam u2_1240x1024.V_ACT = 1024;
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wire [63:0] dbg_val;
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VGA_Pattern #( R_SZ ) u3
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( // Read Out Side
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.oRed(mVGA_R),
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.oGreen(mVGA_G),
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.oBlue(mVGA_B),
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.iVGA_X(mVGA_X),
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.iVGA_Y(mVGA_Y),
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.iVGA_CLK(VGA_CTRL_CLK),
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// Control Signals
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.iRST_n(BUTTON[0]),
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.iColor_SW(SW),
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.endFrame(VGA_VS),
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.dbg_val(dbg_val)
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);
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wire [15:0] indicated_part;
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wire seg_first;
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dbg_7seg dbg_num
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( .val( dbg_val ),
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.show_next(BUTTON[1]),
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.part( indicated_part ),
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.is_first( seg_first ) );
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SEG7_LUT_4 u0
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( .oSEG0(HEX0_D),
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.oSEG1(HEX1_D),
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.oSEG2(HEX2_D),
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.oSEG3(HEX3_D),
|
324 |
|
|
.iDIG( indicated_part )
|
325 |
|
|
);
|
326 |
|
|
|
327 |
|
|
|
328 |
|
|
endmodule
|