OpenCores
URL https://opencores.org/ocsvn/nysa_sata/nysa_sata/trunk

Subversion Repositories nysa_sata

[/] [nysa_sata/] [trunk/] [sim/] [faux_sata_hd.v] - Blame information for rev 5

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 cospan
//faux_sata_hd.v
2
/*
3
Distributed under the MIT license.
4
Copyright (c) 2011 Dave McCoy (dave.mccoy@cospandesign.com)
5
 
6
Permission is hereby granted, free of charge, to any person obtaining a copy of
7
this software and associated documentation files (the "Software"), to deal in
8
the Software without restriction, including without limitation the rights to
9
use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
10
of the Software, and to permit persons to whom the Software is furnished to do
11
so, subject to the following conditions:
12
 
13
The above copyright notice and this permission notice shall be included in all
14
copies or substantial portions of the Software.
15
 
16
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22
SOFTWARE.
23
*/
24
 
25
`include "sata_defines.v"
26
 
27
module faux_sata_hd (
28
//Inputs/Outputs
29
input               rst,              //reset
30
input               clk,
31
 
32
//Data Interface
33
output      [31:0]  tx_dout,
34 3 cospan
output      [3:0]   tx_is_k,
35 2 cospan
output              tx_set_elec_idle,
36
output              rx_byte_is_aligned,
37
 
38
input       [31:0]  rx_din,
39 3 cospan
input       [3:0]   rx_is_k,
40 2 cospan
input               rx_is_elec_idle,
41
 
42
input               comm_reset_detect,
43
input               comm_wake_detect,
44
 
45
output              tx_comm_reset,
46
output              tx_comm_wake,
47
 
48
output              hd_ready,
49
output              phy_ready,
50
 
51
 
52
//Debug
53
output      [3:0]   oob_state,
54
output      [3:0]   cl_state,
55
 
56
//Link Layer
57
input               dbg_ll_write_start,
58
output              dbg_ll_write_strobe,
59
output              dbg_ll_write_finished,
60
input       [31:0]  dbg_ll_write_data,
61
input       [31:0]  dbg_ll_write_size,
62
input               dbg_ll_write_hold,
63
input               dbg_ll_write_abort,
64
output              dbg_ll_xmit_error,
65
 
66
output              dbg_ll_read_start,
67
output              dbg_ll_read_strobe,
68
output      [31:0]  dbg_ll_read_data,
69
input               dbg_ll_read_ready,
70
output              dbg_ll_read_finished,
71
output              dbg_ll_remote_abort,
72
 
73
input               dbg_data_scrambler_en,
74
 
75
input               dbg_hold,
76
 
77
 
78
//Transport Layer Debug
79
input               dbg_t_en,
80
 
81
//Trasport Layer Control/Status
82
output              dbg_tl_ready,
83
input               dbg_send_reg_stb,
84
input               dbg_send_dma_act_stb,
85
input               dbg_send_data_stb,
86
input               dbg_send_pio_stb,
87
input               dbg_send_dev_bits_stb,
88
 
89
output              dbg_remote_abort,
90
output              dbg_xmit_error,
91
output              dbg_read_crc_fail,
92
 
93
output              dbg_h2d_reg_stb,
94
output              dbg_h2d_data_stb,
95
 
96
output               dbg_pio_request,
97
input       [15:0]  dbg_pio_transfer_count,
98
input               dbg_pio_direction,
99
input       [7:0]   dbg_pio_e_status,
100
 
101
//FIS Structure
102
output      [7:0]   dbg_h2d_command,
103
output      [15:0]  dbg_h2d_features,
104
output              dbg_h2d_cmd_bit,
105
output      [3:0]   dbg_h2d_port_mult,
106
output      [7:0]   dbg_h2d_control,
107
output      [7:0]   dbg_h2d_device,
108
output      [47:0]  dbg_h2d_lba,
109
output      [15:0]  dbg_h2d_sector_count,
110
 
111
input               dbg_d2h_interrupt,
112
input               dbg_d2h_notification,
113
input       [7:0]   dbg_d2h_status,
114
input       [7:0]   dbg_d2h_error,
115
input       [3:0]   dbg_d2h_port_mult,
116
input       [7:0]   dbg_d2h_device,
117
input       [47:0]  dbg_d2h_lba,
118
input       [15:0]  dbg_d2h_sector_count,
119
 
120
//command layer data interface
121
output              dbg_cl_if_strobe,
122
input       [31:0]  dbg_cl_if_data,
123
input               dbg_cl_if_ready,
124
output              dbg_cl_if_activate,
125
input       [23:0]  dbg_cl_if_size,
126
 
127
output              dbg_cl_of_strobe,
128
output      [31:0]  dbg_cl_of_data,
129
input       [1:0]   dbg_cl_of_ready,
130
output      [1:0]   dbg_cl_of_activate,
131
input       [23:0]  dbg_cl_of_size,
132
 
133
output              command_layer_ready,
134
 
135
output              hd_read_from_host,
136
output      [31:0]  hd_data_from_host,
137
 
138
output              hd_write_to_host,
139
input       [31:0]  hd_data_to_host
140
 
141
);
142
 
143
//Parameters
144
//Registers/Wires
145
wire        [31:0]  phy_tx_dout;
146 3 cospan
wire                phy_tx_is_k;
147 2 cospan
 
148
wire        [31:0]  sll_tx_dout;
149 3 cospan
wire                sll_tx_is_k;
150 2 cospan
 
151
wire                ll_ready;
152
wire                ll_write_start;
153
wire                ll_write_finished;
154
wire                ll_write_strobe;
155
wire        [31:0]  ll_write_data;
156
wire        [31:0]  ll_write_size;
157
wire                ll_write_hold;
158
wire                ll_write_abort;
159
 
160
wire                ll_read_start;
161
wire                ll_read_strobe;
162
wire        [31:0]  ll_read_data;
163
wire                ll_remote_abort;
164
wire                ll_read_ready;
165
wire                ll_read_finished;
166
wire                ll_read_crc_ok;
167
 
168
wire                data_scrambler_en;
169
 
170
 
171
//Command Layer
172
wire                cl_send_reg_stb;
173
wire                cl_send_dma_act_stb;
174
wire                cl_send_data_stb;
175
wire                cl_send_pio_stb;
176
wire                cl_send_dev_bits_stb;
177
 
178
wire        [15:0]  cl_pio_transfer_count;
179
wire                cl_pio_direction;
180
wire        [7:0]   cl_pio_e_status;
181
 
182
wire                cl_d2h_interrupt;
183
wire                cl_d2h_notification;
184
wire        [7:0]   cl_d2h_status;
185
wire        [7:0]   cl_d2h_error;
186
wire        [3:0]   cl_d2h_port_mult;
187
wire        [7:0]   cl_d2h_device;
188
wire        [47:0]  cl_d2h_lba;
189
wire        [15:0]  cl_d2h_sector_count;
190
 
191
 
192
 
193
//Trasport Layer Control/Status
194
wire                transport_layer_ready;
195
wire                send_reg_stb;
196
wire                send_dma_act_stb;
197
wire                send_data_stb;
198
wire                send_pio_stb;
199
wire                send_dev_bits_stb;
200
 
201
 
202
wire                remote_abort;
203
wire                xmit_error;
204
wire                read_crc_fail;
205
 
206
wire                h2d_reg_stb;
207
wire                h2d_data_stb;
208
 
209
wire                pio_request;
210
wire        [15:0]  pio_transfer_count;
211
wire                pio_direction;
212
wire        [7:0]   pio_e_status;
213
 
214
wire        [31:0]  if_data;
215
wire                if_ready;
216
wire        [23:0]  if_size;
217
 
218
wire        [1:0]   of_ready;
219
wire        [23:0]  of_size;
220
 
221
//Host to Device Registers
222
wire        [7:0]   h2d_command;
223
wire        [15:0]  h2d_features;
224
wire                h2d_cmd_bit;
225
wire        [7:0]   h2d_control;
226
wire        [3:0]   h2d_port_mult;
227
wire        [7:0]   h2d_device;
228
wire        [47:0]  h2d_lba;
229
wire        [15:0]  h2d_sector_count;
230
 
231
//Device to Host Registers
232
wire                d2h_interrupt;
233
wire                d2h_notification;
234
wire        [3:0]   d2h_port_mult;
235
wire        [7:0]   d2h_device;
236
wire        [47:0]  d2h_lba;
237
wire        [15:0]  d2h_sector_count;
238
wire        [7:0]   d2h_status;
239
wire        [7:0]   d2h_error;
240
 
241
//DMA Specific Control
242
 
243
//Data Control
244
wire                cl_if_ready;
245
wire                cl_if_activate;
246
wire        [23:0]  cl_if_size;
247
 
248
wire                cl_if_strobe;
249
wire        [31:0]  cl_if_data;
250
 
251
wire        [1:0]   cl_of_ready;
252
wire        [1:0]   cl_of_activate;
253
wire                cl_of_strobe;
254
wire        [31:0]  cl_of_data;
255
wire        [23:0]  cl_of_size;
256
 
257
 
258
//Link Layer Interface
259
wire                t_write_start;
260
wire                t_write_strobe;
261
wire                t_write_finished;
262
wire        [31:0]  t_write_data;
263
wire        [31:0]  t_write_size;
264
wire                t_write_hold;
265
wire                t_write_abort;
266
wire                t_xmit_error;
267
 
268
wire                t_read_start;
269
wire                t_read_ready;
270
wire        [31:0]  t_read_data;
271
wire                t_read_strobe;
272
wire                t_read_finished;
273
wire                t_read_crc_ok;
274
wire                t_remote_abort;
275
 
276
//Sub Modules
277
faux_sata_hd_phy hd_phy(
278
  .rst                  (rst                    ),
279
  .clk                  (clk                    ),
280
 
281
  //incomming/output data
282
  .tx_dout              (phy_tx_dout            ),
283 3 cospan
  .tx_is_k              (phy_tx_is_k            ),
284 2 cospan
  .tx_set_elec_idle     (tx_set_elec_idle       ),
285
 
286
  .rx_din               (rx_din                 ),
287 3 cospan
  .rx_is_k              (rx_is_k                ),
288 2 cospan
  .rx_is_elec_idle      (rx_is_elec_idle        ),
289
  .rx_byte_is_aligned   (rx_byte_is_aligned     ),
290
 
291
  .comm_reset_detect    (comm_reset_detect      ),
292
  .comm_wake_detect     (comm_wake_detect       ),
293
 
294
  .tx_comm_reset        (tx_comm_reset          ),
295
  .tx_comm_wake         (tx_comm_wake           ),
296
 
297
  //Status
298
  .lax_state            (oob_state              ),
299
  .phy_ready            (phy_ready              ),
300
  .hd_ready             (hd_ready               )
301
);
302
 
303
sata_link_layer fsll (
304
  .rst                  (rst || !hd_ready       ),
305
  .clk                  (clk                    ),
306 3 cospan
  .prim_scrambler_en    (1'b1                   ),
307 2 cospan
  .data_scrambler_en    (data_scrambler_en      ),
308
 
309
  .link_layer_ready     (ll_ready               ),
310 3 cospan
  .sync_escape          (1'b0                   ),
311 2 cospan
  .hold                 (dbg_hold               ),
312
 
313
  //Transport Layer Interface
314
  .write_start          (ll_write_start         ),
315
  .write_strobe         (ll_write_strobe        ),
316
  .write_data           (ll_write_data          ),
317
  .write_size           (ll_write_size          ),
318
  .write_hold           (ll_write_hold          ),
319
  .write_finished       (ll_write_finished      ),
320
  .write_abort          (ll_write_abort         ),
321
  .xmit_error           (t_xmit_error           ),
322
 
323
  .read_strobe          (ll_read_strobe         ),
324
  .read_data            (ll_read_data           ),
325
  .read_ready           (ll_read_ready          ),
326
  .read_start           (ll_read_start          ),
327
  .read_finished        (ll_read_finished       ),
328
  .read_crc_ok          (ll_read_crc_ok         ),
329
  .remote_abort         (ll_remote_abort        ),
330
 
331
  //Phy Layer
332
  .phy_ready            (phy_ready              ),
333
  .platform_ready       (hd_ready               ),
334
  .tx_dout              (sll_tx_dout            ),
335 3 cospan
  .tx_is_k              (sll_tx_is_k            ),
336 2 cospan
 
337
  .rx_din               (rx_din                 ),
338 3 cospan
  .rx_is_k              (rx_is_k                ),
339
  .is_device            (1'b1                   )
340 2 cospan
);
341
 
342
faux_sata_hd_transport  ftl (
343
  .rst                  (rst || !hd_ready       ),
344
  .clk                  (clk                    ),
345
 
346
  //Trasport Layer Control/Status
347
  .transport_layer_ready(transport_layer_ready  ),
348
  .send_reg_stb         (send_reg_stb           ),
349
  .send_dma_act_stb     (send_dma_act_stb       ),
350
  .send_data_stb        (send_data_stb          ),
351
  .send_pio_stb         (send_pio_stb           ),
352
  .send_dev_bits_stb    (send_dev_bits_stb      ),
353
 
354
  .remote_abort         (remote_abort           ),
355
  .xmit_error           (xmit_error             ),
356
  .read_crc_fail        (read_crc_fail          ),
357
 
358
  .h2d_reg_stb          (h2d_reg_stb            ),
359
  .h2d_data_stb         (h2d_data_stb           ),
360
 
361
  .pio_request          (pio_request            ),
362
  .pio_transfer_count   (pio_transfer_count     ),
363
  .pio_direction        (pio_direction          ),
364
  .pio_e_status         (pio_e_status           ),
365
 
366
  //FIS Structure
367
  .h2d_command          (h2d_command            ),
368
  .h2d_features         (h2d_features           ),
369
  .h2d_cmd_bit          (h2d_cmd_bit            ),
370
  .h2d_port_mult        (h2d_port_mult          ),
371
  .h2d_control          (h2d_control            ),
372
  .h2d_device           (h2d_device             ),
373
  .h2d_lba              (h2d_lba                ),
374
  .h2d_sector_count     (h2d_sector_count       ),
375
 
376
  .d2h_interrupt        (d2h_interrupt          ),
377
  .d2h_notification     (d2h_notification       ),
378
  .d2h_status           (d2h_status             ),
379
  .d2h_error            (d2h_error              ),
380
  .d2h_port_mult        (d2h_port_mult          ),
381
  .d2h_device           (d2h_device             ),
382
  .d2h_lba              (d2h_lba                ),
383
  .d2h_sector_count     (d2h_sector_count       ),
384
 
385
  //command layer data interface
386
  .cl_if_strobe         (cl_if_strobe           ),
387
  .cl_if_data           (cl_if_data             ),
388
  .cl_if_ready          (cl_if_ready            ),
389
  .cl_if_activate       (cl_if_activate         ),
390
  .cl_if_size           (cl_if_size             ),
391
 
392
  .cl_of_strobe         (cl_of_strobe           ),
393
  .cl_of_data           (cl_of_data             ),
394
  .cl_of_ready          (cl_of_ready            ),
395
  .cl_of_activate       (cl_of_activate         ),
396
  .cl_of_size           (cl_of_size             ),
397
 
398
  //Link Layer Interface
399
  .link_layer_ready     (ll_ready               ),
400
 
401
  .ll_write_start       (t_write_start          ),
402
  .ll_write_strobe      (t_write_strobe         ),
403
  .ll_write_finished    (t_write_finished       ),
404
  .ll_write_data        (t_write_data           ),
405
  .ll_write_size        (t_write_size           ),
406
  .ll_write_hold        (t_write_hold           ),
407
  .ll_write_abort       (t_write_abort          ),
408
  .ll_xmit_error        (t_xmit_error           ),
409
 
410
  .ll_read_start        (t_read_start           ),
411
  .ll_read_ready        (t_read_ready           ),
412
  .ll_read_data         (t_read_data            ),
413
  .ll_read_strobe       (t_read_strobe          ),
414
  .ll_read_finished     (t_read_finished        ),
415
  .ll_read_crc_ok       (t_read_crc_ok          ),
416
  .ll_remote_abort      (t_remote_abort         )
417
 
418
 
419
);
420
 
421
faux_hd_command_layer fcl(
422 3 cospan
  .rst                  (rst || !hd_ready       ),
423 2 cospan
  .clk                  (clk                    ),
424
 
425
  .command_layer_ready  (command_layer_ready    ),
426
 
427
  .hd_read_from_host    (hd_read_from_host      ),
428
  .hd_data_from_host    (hd_data_from_host      ),
429
 
430
  .hd_write_to_host     (hd_write_to_host       ),
431
  .hd_data_to_host      (hd_data_to_host        ),
432
 
433
 
434
  .transport_layer_ready(transport_layer_ready  ),
435
  .send_reg_stb         (cl_send_reg_stb        ),
436
  .send_dma_act_stb     (cl_send_dma_act_stb    ),
437
  .send_data_stb        (cl_send_data_stb       ),
438
  .send_pio_stb         (cl_send_pio_stb        ),
439
  .send_dev_bits_stb    (cl_send_dev_bits_stb   ),
440
 
441
  .remote_abort         (remote_abort           ),
442
  .xmit_error           (xmit_error             ),
443
  .read_crc_fail        (read_crc_fail          ),
444
 
445
  .h2d_reg_stb          (h2d_reg_stb            ),
446
  .h2d_data_stb         (h2d_data_stb           ),
447
 
448
  .pio_request          (pio_request            ),
449
  .pio_transfer_count   (cl_pio_transfer_count  ),
450
  .pio_direction        (cl_pio_direction       ),
451
  .pio_e_status         (cl_pio_e_status        ),
452
 
453
  //FIS Structure
454
  .h2d_command          (h2d_command            ),
455
  .h2d_features         (h2d_features           ),
456
  .h2d_cmd_bit          (h2d_cmd_bit            ),
457
  .h2d_port_mult        (h2d_port_mult          ),
458
  .h2d_control          (h2d_control            ),
459
  .h2d_device           (h2d_device             ),
460
  .h2d_lba              (h2d_lba                ),
461
  .h2d_sector_count     (h2d_sector_count       ),
462
 
463
  .d2h_interrupt        (cl_d2h_interrupt       ),
464
  .d2h_notification     (cl_d2h_notification    ),
465
  .d2h_status           (cl_d2h_status          ),
466
  .d2h_error            (cl_d2h_error           ),
467
  .d2h_port_mult        (cl_d2h_port_mult       ),
468
  .d2h_device           (cl_d2h_device          ),
469
  .d2h_lba              (cl_d2h_lba             ),
470
  .d2h_sector_count     (cl_d2h_sector_count    ),
471
 
472
  //command layer data interface
473
  .cl_if_strobe         (cl_if_strobe           ),
474
  .cl_if_data           (if_data                ),
475
  .cl_if_ready          (if_ready               ),
476
  .cl_if_activate       (cl_if_activate         ),
477
  .cl_if_size           (if_size                ),
478
 
479
  .cl_of_strobe         (cl_of_strobe           ),
480
  .cl_of_data           (cl_of_data             ),
481
  .cl_of_ready          (of_ready               ),
482
  .cl_of_activate       (cl_of_activate         ),
483
  .cl_of_size           (of_size                ),
484
  .cl_state             (cl_state               )
485
 
486
);
487
 
488
assign                  tx_dout         = !phy_ready ? phy_tx_dout : sll_tx_dout;
489 3 cospan
assign                  tx_is_k[3:1]     =  3'b000;
490
assign                  tx_is_k[0]       = !phy_ready ? phy_tx_is_k  : sll_tx_is_k;
491 2 cospan
 
492
 
493
//Debug
494
//assign                ll_write_start        = (dbg_ll_en) ? dbg_ll_write_start  : t_write_start;
495
//assign                ll_write_data         = (dbg_ll_en) ? dbg_ll_write_data   : t_write_data;
496
//assign                ll_write_hold         = (dbg_ll_en) ? dbg_ll_write_hold   : t_write_hold;
497
//assign                ll_write_size         = (dbg_ll_en) ? dbg_ll_write_size   : t_write_size;
498
//assign                ll_write_abort        = (dbg_ll_en) ? dbg_ll_write_abort  : t_write_abort;
499
//assign                data_scrambler_en     = (dbg_ll_en) ? dbg_data_scrambler_en : 1;
500
//
501
//assign                ll_read_ready         = (dbg_ll_en) ? dbg_ll_read_ready   : t_read_ready;
502
//
503
assign                ll_write_start        = t_write_start;
504
assign                ll_write_data         = t_write_data;
505
assign                ll_write_hold         = t_write_hold;
506
assign                ll_write_size         = t_write_size;
507
assign                ll_write_abort        = t_write_abort;
508
assign                data_scrambler_en     = 1;
509
 
510
assign                ll_read_ready         = t_read_ready;
511
 
512
 
513
assign                dbg_ll_write_strobe   = ll_write_strobe;
514
assign                dbg_ll_write_finished = ll_write_finished;
515
assign                dbg_ll_xmit_error     = xmit_error;
516
 
517
assign                dbg_ll_read_strobe    = ll_read_strobe;
518
assign                dbg_ll_read_start     = ll_read_start;
519
assign                dbg_ll_read_finished  = ll_read_finished;
520
assign                dbg_ll_read_data      = ll_read_data;
521
assign                dbg_ll_remote_abort   = ll_remote_abort;
522
 
523
 
524
 
525
//Transport Layer Debug Signals
526
assign                dbg_tl_ready          = transport_layer_ready;
527
 
528
assign                t_read_strobe         = ll_read_strobe;
529
assign                t_read_start          = ll_read_start;
530
assign                t_read_finished       = ll_read_finished;
531
assign                t_read_data           = ll_read_data;
532
assign                t_remote_abort        = ll_remote_abort;
533
assign                t_read_crc_ok         = ll_read_crc_ok;
534
assign                t_write_strobe        = ll_write_strobe;
535
assign                t_write_finished      = ll_write_finished;
536
 
537
assign                send_reg_stb          = (dbg_t_en)  ? dbg_send_reg_stb        : cl_send_reg_stb;
538
assign                send_dma_act_stb      = (dbg_t_en)  ? dbg_send_dma_act_stb    : cl_send_dma_act_stb;
539
assign                send_data_stb         = (dbg_t_en)  ? dbg_send_data_stb       : cl_send_data_stb;
540
assign                send_pio_stb          = (dbg_t_en)  ? dbg_send_pio_stb        : cl_send_pio_stb;
541
assign                send_dev_bits_stb     = (dbg_t_en)  ? dbg_send_dev_bits_stb   : cl_send_dev_bits_stb;
542
 
543
 
544
assign                dbg_pio_request       = pio_request;
545
assign                pio_transfer_count    = (dbg_t_en)  ? dbg_pio_transfer_count  : cl_pio_transfer_count;
546
assign                pio_direction         = (dbg_t_en)  ? dbg_pio_direction       : cl_pio_direction;
547
assign                pio_e_status          = (dbg_t_en)  ? dbg_pio_e_status        : cl_pio_e_status;
548
 
549
 
550
assign                d2h_interrupt         = (dbg_t_en)  ? dbg_d2h_interrupt       : cl_d2h_interrupt;
551
assign                d2h_notification      = (dbg_t_en)  ? dbg_d2h_notification    : cl_d2h_notification;
552
assign                d2h_status            = (dbg_t_en)  ? dbg_d2h_status          : cl_d2h_status;
553
assign                d2h_error             = (dbg_t_en)  ? dbg_d2h_error           : cl_d2h_error;
554
assign                d2h_port_mult         = (dbg_t_en)  ? dbg_d2h_port_mult       : cl_d2h_port_mult;
555
assign                d2h_device            = (dbg_t_en)  ? dbg_d2h_device          : cl_d2h_device;
556
assign                d2h_lba               = (dbg_t_en)  ? dbg_d2h_lba             : cl_d2h_lba;
557
assign                d2h_sector_count      = (dbg_t_en)  ? dbg_d2h_sector_count    : cl_d2h_sector_count;
558
 
559
 
560
assign                cl_if_data            = (dbg_t_en)  ? dbg_cl_if_data          : if_data;
561
assign                cl_if_ready           = (dbg_t_en)  ? dbg_cl_if_ready         : if_ready;
562
assign                cl_if_size            = (dbg_t_en)  ? dbg_cl_if_size          : if_size;
563
assign                cl_of_ready           = (dbg_t_en)  ? dbg_cl_of_ready         : of_ready;
564
assign                cl_of_size            = (dbg_t_en)  ? dbg_cl_of_size          : of_size;
565
 
566
assign                dbg_remote_abort      = remote_abort;
567
assign                dbg_xmit_error        = xmit_error;
568
assign                dbg_read_crc_fail     = read_crc_fail;
569
 
570
assign                dbg_h2d_reg_stb       = h2d_reg_stb;
571
assign                dbg_h2d_data_stb      = h2d_data_stb;
572
 
573
assign                dbg_h2d_command       = h2d_command;
574
assign                dbg_h2d_features      = h2d_features;
575
assign                dbg_h2d_cmd_bit       = h2d_cmd_bit;
576
assign                dbg_h2d_port_mult     = h2d_port_mult;
577
assign                dbg_h2d_control       = h2d_control;
578
assign                dbg_h2d_device        = h2d_device;
579
assign                dbg_h2d_lba           = h2d_lba;
580
assign                dbg_h2d_sector_count  = h2d_sector_count;
581
 
582
 
583
endmodule

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.