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/////////////////////////////////////////////////////////////////////
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//// ////
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//// OpenCores54 DSP, ALU defines ////
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//// ////
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//// Author: Richard Herveille ////
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//// richard@asics.ws ////
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//// www.asics.ws ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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//// ////
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//// Copyright (C) 2002 Richard Herveille ////
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//// richard@asics.ws ////
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//// ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer.////
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//// ////
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//// THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY ////
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//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED ////
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//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS ////
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//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR ////
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//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, ////
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//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ////
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//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE ////
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//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR ////
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//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ////
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//// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ////
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//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT ////
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//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ////
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//// POSSIBILITY OF SUCH DAMAGE. ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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// CVS Log
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//
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// $Id: oc54_alu_defines.v,v 1.1.1.1 2002-04-10 09:34:40 rherveille Exp $
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//
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// $Date: 2002-04-10 09:34:40 $
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// $Revision: 1.1.1.1 $
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// $Author: rherveille $
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// $Locker: $
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// $State: Exp $
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//
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// Change History:
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// $Log: not supported by cvs2svn $
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//
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// Encoding: bit[6] always zero
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// bit[5:4] instuction type
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// - 00: (dual) arithmetic
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// - 01: logical (incl. shift)
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// - 10: bit-test & compare
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// - 11: reserved
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// Leonardo-Spectrum seems to like the additional zero bit[6] in
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// the encoding scheme. It produces the smallest and fastest code
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// like this. (Why ???)
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//
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//
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// arithmetic instructions
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//
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`define ABS 7'b000_0000
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`define NEG 7'b000_0001
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`define ADD 7'b000_0010
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`define SUB 7'b000_0011
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`define MAX 7'b000_0100
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`define SUBC 7'b000_0101
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//
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// dual arithmetic instructions
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//
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`define DADD 7'b000_1000
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`define DSUB 7'b000_1100
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`define DRSUB 7'b000_1101
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`define DSUBADD 7'b000_1110
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`define DADDSUB 7'b000_1001
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//
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// logical instructions
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//
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`define NOT 7'b001_0000
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`define AND 7'b001_0001
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`define OR 7'b001_0010
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`define XOR 7'b001_0011
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//
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// shift instructions
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//
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`define ROL 7'b001_0100
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`define ROLTC 7'b001_0101
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`define ROR 7'b001_0110
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`define SHFT_CMP 7'b001_0111
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//
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// bit test instructions
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//
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`define BITF 7'b010_0000
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`define BTST 7'b010_0001
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`define CMP_EQ 7'b010_0100
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`define CMP_LT 7'b010_0101
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`define CMP_GT 7'b010_0110
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`define CMP_NEQ 7'b010_0111
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//
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// condition codes for CMP-test
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//
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`define EQ 2'b00
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`define LT 2'b01
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`define GT 2'b10
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`define NEQ 2'b11
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