OpenCores
URL https://opencores.org/ocsvn/opb_onewire/opb_onewire/trunk

Subversion Repositories opb_onewire

[/] [opb_onewire/] [trunk/] [s3e_onewire_master_v1_00_a/] [devl/] [projnav/] [s3e_onewire_master.cli] - Blame information for rev 4

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 madscienti
NewProject(D:/custom_pulse_generator/standalone_pulse_generator/pcores/s3e_onewire_master_v1_00_a/devl/projnav/s3e_onewire_master.ise)
2
SetProperty(Device Family, virtex2p)
3
SetProperty(Device, xc2vp7)
4
SetProperty(Package, fg456)
5
SetProperty(Speed Grade, -6)
6
SetProperty(Top-Level Module Type, HDL)
7
SetProperty(Synthesis Tool, XST (VHDL/Verilog))
8
SetProperty(Simulator, Modelsim-SE Mixed)
9
SetPreference(PathType, Absolute)
10
AddLibrary(s3e_onewire_master_v1_00_a, D:/custom_pulse_generator/standalone_pulse_generator/pcores, TRUE)
11
AddSource(D:/custom_pulse_generator/standalone_pulse_generator/pcores/s3e_onewire_master_v1_00_a/hdl/vhdl/s3e_onewire_master.vhd, VHDL Module)
12
MoveToLibrary(D:/custom_pulse_generator/standalone_pulse_generator/pcores/s3e_onewire_master_v1_00_a/hdl/vhdl/s3e_onewire_master.vhd, s3e_onewire_master_v1_00_a)
13
AddSource(D:/custom_pulse_generator/standalone_pulse_generator/pcores/s3e_onewire_master_v1_00_a/hdl/verilog/user_logic.v, Verilog Module)
14
AddLibrary(proc_common_v2_00_a, D:/EDK/hw/XilinxProcessorIPLib/pcores, TRUE)
15
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/proc_common_pkg.vhd, VHDL Module)
16
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/proc_common_pkg.vhd, proc_common_v2_00_a)
17
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/family.vhd, VHDL Module)
18
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/family.vhd, proc_common_v2_00_a)
19
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/or_muxcy.vhd, VHDL Module)
20
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/or_muxcy.vhd, proc_common_v2_00_a)
21
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/or_gate.vhd, VHDL Module)
22
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/or_gate.vhd, proc_common_v2_00_a)
23
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/counter_bit.vhd, VHDL Module)
24
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/counter_bit.vhd, proc_common_v2_00_a)
25
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/counter.vhd, VHDL Module)
26
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/counter.vhd, proc_common_v2_00_a)
27
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/inferred_lut4.vhd, VHDL Module)
28
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/inferred_lut4.vhd, proc_common_v2_00_a)
29
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/srl_fifo2.vhd, VHDL Module)
30
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/srl_fifo2.vhd, proc_common_v2_00_a)
31
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pf_counter_bit.vhd, VHDL Module)
32
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pf_counter_bit.vhd, proc_common_v2_00_a)
33
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pf_counter.vhd, VHDL Module)
34
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pf_counter.vhd, proc_common_v2_00_a)
35
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pf_counter_top.vhd, VHDL Module)
36
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pf_counter_top.vhd, proc_common_v2_00_a)
37
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pf_occ_counter.vhd, VHDL Module)
38
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pf_occ_counter.vhd, proc_common_v2_00_a)
39
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pf_occ_counter_top.vhd, VHDL Module)
40
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pf_occ_counter_top.vhd, proc_common_v2_00_a)
41
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pf_adder_bit.vhd, VHDL Module)
42
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pf_adder_bit.vhd, proc_common_v2_00_a)
43
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pf_adder.vhd, VHDL Module)
44
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pf_adder.vhd, proc_common_v2_00_a)
45
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pf_dpram_select.vhd, VHDL Module)
46
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pf_dpram_select.vhd, proc_common_v2_00_a)
47
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/srl16_fifo.vhd, VHDL Module)
48
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/srl16_fifo.vhd, proc_common_v2_00_a)
49
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pselect.vhd, VHDL Module)
50
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/pselect.vhd, proc_common_v2_00_a)
51
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/valid_be.vhd, VHDL Module)
52
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/valid_be.vhd, proc_common_v2_00_a)
53
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/ld_arith_reg.vhd, VHDL Module)
54
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/ld_arith_reg.vhd, proc_common_v2_00_a)
55
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/mux_onehot.vhd, VHDL Module)
56
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/mux_onehot.vhd, proc_common_v2_00_a)
57
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/down_counter.vhd, VHDL Module)
58
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/down_counter.vhd, proc_common_v2_00_a)
59
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/ipif_pkg.vhd, VHDL Module)
60
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/ipif_pkg.vhd, proc_common_v2_00_a)
61
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/ipif_steer.vhd, VHDL Module)
62
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/ipif_steer.vhd, proc_common_v2_00_a)
63
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/direct_path_cntr_ai.vhd, VHDL Module)
64
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/proc_common_v2_00_a/hdl/vhdl/direct_path_cntr_ai.vhd, proc_common_v2_00_a)
65
AddLibrary(interrupt_control_v1_00_a, D:/EDK/hw/XilinxProcessorIPLib/pcores, TRUE)
66
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/interrupt_control_v1_00_a/hdl/vhdl/interrupt_control.vhd, VHDL Module)
67
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/interrupt_control_v1_00_a/hdl/vhdl/interrupt_control.vhd, interrupt_control_v1_00_a)
68
AddLibrary(wrpfifo_v1_01_b, D:/EDK/hw/XilinxProcessorIPLib/pcores, TRUE)
69
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/wrpfifo_v1_01_b/hdl/vhdl/pf_dly1_mux.vhd, VHDL Module)
70
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/wrpfifo_v1_01_b/hdl/vhdl/pf_dly1_mux.vhd, wrpfifo_v1_01_b)
71
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/wrpfifo_v1_01_b/hdl/vhdl/ipif_control_wr.vhd, VHDL Module)
72
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/wrpfifo_v1_01_b/hdl/vhdl/ipif_control_wr.vhd, wrpfifo_v1_01_b)
73
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/wrpfifo_v1_01_b/hdl/vhdl/wrpfifo_dp_cntl.vhd, VHDL Module)
74
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/wrpfifo_v1_01_b/hdl/vhdl/wrpfifo_dp_cntl.vhd, wrpfifo_v1_01_b)
75
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/wrpfifo_v1_01_b/hdl/vhdl/wrpfifo_top.vhd, VHDL Module)
76
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/wrpfifo_v1_01_b/hdl/vhdl/wrpfifo_top.vhd, wrpfifo_v1_01_b)
77
AddLibrary(rdpfifo_v1_01_b, D:/EDK/hw/XilinxProcessorIPLib/pcores, TRUE)
78
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/rdpfifo_v1_01_b/hdl/vhdl/ipif_control_rd.vhd, VHDL Module)
79
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/rdpfifo_v1_01_b/hdl/vhdl/ipif_control_rd.vhd, rdpfifo_v1_01_b)
80
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/rdpfifo_v1_01_b/hdl/vhdl/rdpfifo_dp_cntl.vhd, VHDL Module)
81
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/rdpfifo_v1_01_b/hdl/vhdl/rdpfifo_dp_cntl.vhd, rdpfifo_v1_01_b)
82
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/rdpfifo_v1_01_b/hdl/vhdl/rdpfifo_top.vhd, VHDL Module)
83
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/rdpfifo_v1_01_b/hdl/vhdl/rdpfifo_top.vhd, rdpfifo_v1_01_b)
84
AddLibrary(opb_ipif_v3_01_c, D:/EDK/hw/XilinxProcessorIPLib/pcores, TRUE)
85
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/opb_ipif_v3_01_c/hdl/vhdl/reset_mir.vhd, VHDL Module)
86
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/opb_ipif_v3_01_c/hdl/vhdl/reset_mir.vhd, opb_ipif_v3_01_c)
87
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/opb_ipif_v3_01_c/hdl/vhdl/brst_addr_cntr.vhd, VHDL Module)
88
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/opb_ipif_v3_01_c/hdl/vhdl/brst_addr_cntr.vhd, opb_ipif_v3_01_c)
89
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/opb_ipif_v3_01_c/hdl/vhdl/opb_flex_addr_cntr.vhd, VHDL Module)
90
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/opb_ipif_v3_01_c/hdl/vhdl/opb_flex_addr_cntr.vhd, opb_ipif_v3_01_c)
91
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/opb_ipif_v3_01_c/hdl/vhdl/brst_addr_cntr_reg.vhd, VHDL Module)
92
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/opb_ipif_v3_01_c/hdl/vhdl/brst_addr_cntr_reg.vhd, opb_ipif_v3_01_c)
93
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/opb_ipif_v3_01_c/hdl/vhdl/opb_be_gen.vhd, VHDL Module)
94
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/opb_ipif_v3_01_c/hdl/vhdl/opb_be_gen.vhd, opb_ipif_v3_01_c)
95
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/opb_ipif_v3_01_c/hdl/vhdl/srl_fifo3.vhd, VHDL Module)
96
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/opb_ipif_v3_01_c/hdl/vhdl/srl_fifo3.vhd, opb_ipif_v3_01_c)
97
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/opb_ipif_v3_01_c/hdl/vhdl/write_buffer.vhd, VHDL Module)
98
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/opb_ipif_v3_01_c/hdl/vhdl/write_buffer.vhd, opb_ipif_v3_01_c)
99
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/opb_ipif_v3_01_c/hdl/vhdl/opb_bam.vhd, VHDL Module)
100
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/opb_ipif_v3_01_c/hdl/vhdl/opb_bam.vhd, opb_ipif_v3_01_c)
101
AddSource(D:/EDK/hw/XilinxProcessorIPLib/pcores/opb_ipif_v3_01_c/hdl/vhdl/opb_ipif.vhd, VHDL Module)
102
MoveToLibrary(D:/EDK/hw/XilinxProcessorIPLib/pcores/opb_ipif_v3_01_c/hdl/vhdl/opb_ipif.vhd, opb_ipif_v3_01_c)
103
CloseProject()

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.