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Subversion Repositories opb_onewire

[/] [opb_onewire/] [trunk/] [s3e_onewire_master_v1_00_a/] [read_write_functions.txt] - Blame information for rev 4

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Line No. Rev Author Line
1 2 madscienti
 void OneWireReset (void) {
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        volatile int x;
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        // Reset the 1-wire bus
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        WriteREG (XPAR_S3E_ONEWIRE_MASTER_0_BASEADDR,USER,0x8,0x3);             // Send the opcode for a bus reset
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        WriteREG (XPAR_S3E_ONEWIRE_MASTER_0_BASEADDR,USER,0xC,0x1);             // Execute!
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        // Wait a little while...
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        x=0;
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        while (x < 25000) {
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                x++;
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        }
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 }
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 void OneWireWrite (unsigned char data) {
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        volatile int x;
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        volatile unsigned char ReadBUF;
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        // Send skip ROM command
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        WriteREG (XPAR_S3E_ONEWIRE_MASTER_0_BASEADDR,USER,0x8,0x1);             // Send the opcode for a write
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        WriteREG (XPAR_S3E_ONEWIRE_MASTER_0_BASEADDR,USER,0x4,data);            // Send the data for a write
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        WriteREG (XPAR_S3E_ONEWIRE_MASTER_0_BASEADDR,USER,0xC,0x1);             // Execute!
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        // Wait a little while...
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        x=0;
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        while (x < 5000) {
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                x++;
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        }
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 }
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 unsigned char OneWireRead (void) {
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        volatile int x;
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        volatile unsigned char ReadBUF;
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        // Read a byte
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        WriteREG (XPAR_S3E_ONEWIRE_MASTER_0_BASEADDR,USER,0x8,0x2);             // Send the opcode for a read
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        WriteREG (XPAR_S3E_ONEWIRE_MASTER_0_BASEADDR,USER,0xC,0x1);             // Execute!
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        // Wait a little while...
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        x=0;
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        while (x < 5000) {
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                x++;
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        }
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        ReadBUF = ReadREG(XPAR_S3E_ONEWIRE_MASTER_0_BASEADDR,USER,0x0); // Read the data
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        return ReadBUF;
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 }

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