Subversion Repositories open8_urisc

-- VHDL Units :  Open8_cfg

-- Description:  Contains an example Open8_cfg file

--

-- Revision History

-- Author          Date     Change

------------------ -------- ---------------------------------------------------

-- Seth Henry      10/21/20 Design Start

library ieee;

  use ieee.std_logic_1164.all;

  use ieee.std_logic_unsigned.all;

  use ieee.std_logic_arith.all;

library work;

  use work.open8_pkg.all;

package open8_cfg is

  -- Internal Clock Frequency

  constant Clock_Frequency          : real      := 120000000.0;

    -- Open8 CPU Options

  constant Allow_Stack_Address_Move : boolean   := TRUE;

  constant Enable_Auto_Increment    : boolean   := TRUE;

  constant BRK_Implements_WAI       : boolean   := TRUE;

  constant Enable_NMI               : boolean   := TRUE;

  constant Sequential_Interrupts    : boolean   := TRUE;

  constant RTI_Ignores_GP_Flags     : boolean   := TRUE;

  constant Supervisor_Mode          : boolean   := TRUE;

  constant Unsigned_Index_Offsets   : boolean   := TRUE;

  constant Rotate_Ignores_Carry     : boolean   := TRUE;

  constant Default_Int_Mask         : DATA_TYPE := x"00";

  -- System Memory Map

  constant RAM_Address              : ADDRESS_TYPE := x"0000";  -- System RAM

  constant WPR_Address              : ADDRESS_TYPE := x"1000";  -- Write Protect Mask

  constant WQL_Address              : ADDRESS_TYPE := x"1100";  -- Write Qual Register

  constant INT_Address              : ADDRESS_TYPE := x"1200";  -- Interrupt Manager

  constant ROM_Address              : ADDRESS_TYPE := x"8000";  -- Application ROM

  constant ISR_Start_Addr           : ADDRESS_TYPE := x"FFF0";  -- ISR vector table

  -- RAM size is used to calculate the initial stack pointer, which is set at

  --  the top of the RAM region.

  constant RAM_Size                 : integer   := 4096;

  constant RAM_Write_Protect        : boolean   := TRUE;

  -- CPU Interrupt assignments - Note that interrupt 0 is the NMI (non-maskable)

  --  also, because these are handled by the CPU, they are in priority order

  --  from 0 (highest) to 7 (lowest).

  constant CPU_INT_RAM              : integer range 0 to OPEN8_DATA_WIDTH - 1 := 0;

  constant CPU_INT_PIT              : integer range 0 to OPEN8_DATA_WIDTH - 1 := 1;

  constant CPU_INT_EXT              : integer range 0 to OPEN8_DATA_WIDTH - 1 := 2;

  -- I/O Interrupt assignments (Not technically required, as software will overwrite

  --  this during initialization)

  constant Default_IO_Int_Mask      : ADDRESS_TYPE := x"0000";

  -- Set this to the number of readable modules in the design, as it sets the

  --  number of ports on the read aggregator function.

  constant NUM_READ_BUSES           : integer := 4;

  -- Read Data Bus aggregator and bus assignments.

  --  Note that the ordering isn't important, only that each device has a

  --   unique number less than NUM_READ_BUSES.

  constant RDB_RAM                  : integer range 0 to NUM_READ_BUSES - 1   :=  0;

  constant RDB_WQL                  : integer range 0 to NUM_READ_BUSES - 1   :=  1;

  constant RDB_INT                  : integer range 0 to NUM_READ_BUSES - 1   :=  2;

  constant RDB_ROM                  : integer range 0 to NUM_READ_BUSES - 1   :=  3;

  -- System configuration calculations - no adjustable parameters below this point

  type OPEN8_BUS_ARRAY is array(0 to NUM_READ_BUSES - 1) of DATA_TYPE;

  constant INIT_READ_BUS            : OPEN8_BUS_ARRAY := (others => OPEN8_NULLBUS);

  function merge_buses (x : in OPEN8_BUS_ARRAY) return DATA_TYPE;

  -- Compute the stack start address based on the RAM size

  constant RAM_Vector_Size          : integer := ceil_log2(RAM_Size - 1);

  constant RAM_End_Addr             : std_logic_vector(RAM_Vector_Size - 1 downto 0)

                                     := (others => '1');

  constant Stack_Start_Addr         : ADDRESS_TYPE := RAM_Address + RAM_End_Addr;

end package;

package body open8_cfg is

  function merge_buses (x : in OPEN8_BUS_ARRAY) return DATA_TYPE is

    variable i               : integer   := 0;

    variable retval          : DATA_TYPE := x"00";

  begin

    retval                   := x"00";

    for i in 0 to NUM_READ_BUSES - 1 loop

      retval                 := retval or x(i);

    end loop;

    return retval;

  end function;

end package body;