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[/] [open8_urisc/] [trunk/] [VHDL/] [Open8_pkg.vhd] - Blame information for rev 200

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1 185 jshamlet
-- Copyright (c)2006,2011,2012,2013,2015,2020 Jeremy Seth Henry
2 181 jshamlet
-- All rights reserved.
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--
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-- Redistribution and use in source and binary forms, with or without
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-- modification, are permitted provided that the following conditions are met:
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--     * Redistributions of source code must retain the above copyright
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--       notice, this list of conditions and the following disclaimer.
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--     * Redistributions in binary form must reproduce the above copyright
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--       notice, this list of conditions and the following disclaimer in the
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--       documentation and/or other materials provided with the distribution,
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--       where applicable (as part of a user interface, debugging port, etc.)
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--
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-- THIS SOFTWARE IS PROVIDED BY JEREMY SETH HENRY ``AS IS'' AND ANY
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-- EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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-- WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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-- DISCLAIMED. IN NO EVENT SHALL JEREMY SETH HENRY BE LIABLE FOR ANY
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-- DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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-- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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-- ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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-- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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-- SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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-- VHDL Units :  Open8_pkg
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-- Description:  Contains constant definitions for the Open8 processor
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-- Revision History
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-- Author          Date     Change
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------------------ -------- ---------------------------------------------------
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-- Seth Henry      07/22/06 Design Start
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-- Seth Henry      02/03/12 Updated generics to match current model
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-- Seth Henry      10/29/15 Migrated type/constant definitions to this file
32 185 jshamlet
-- Seth Henry      03/09/20 Created new ALU/SP opcodes for handling new RSP
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-- Seth Henry      03/12/20 Rationalized the naming of the CPU flags to match
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--                           the assembler names. Also removed superfluous
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--                           signals in the ALU and PC records.
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-- Seth Henry      03/17/20 Added new subtype and constants for external
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--                           GP flags.
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-- Seth Henry      03/18/20 Added the ceil_log2 function, since it is used in
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--                           memory sizing calculations.
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_arith.all;
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45
package Open8_pkg is
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47
-------------------------------------------------------------------------------
48
-- External constants and type declarations
49
--
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-- These subtypes can be used with external peripherals to simplify
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--  connection to the core.
52
-------------------------------------------------------------------------------
53
 
54
  -- These must never be changed, as the core requires them to be these static
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  --  values for proper operation. These are ONLY defined here to allow user
56 185 jshamlet
  --  code to dynamically configure itself to match the Open8 core.
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58
  constant OPEN8_ADDR_WIDTH  : integer := 16; -- DON'T EVEN CONTEMPLATE
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  constant OPEN8_DATA_WIDTH  : integer := 8;  -- CHANGING THESE!
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61
  subtype ADDRESS_TYPE is std_logic_vector(OPEN8_ADDR_WIDTH - 1 downto 0);
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  subtype DATA_TYPE    is std_logic_vector(OPEN8_DATA_WIDTH - 1 downto 0);
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  -- Note: INTERRUPT_BUNDLE must be exactly the same width as DATA_TYPE
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  subtype INTERRUPT_BUNDLE is DATA_TYPE;
65
 
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  subtype EXT_GP_FLAGS is std_logic_vector(3 downto 0);
67
 
68
  constant EXT_GP4           : integer := 0;
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  constant EXT_GP5           : integer := 1;
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  constant EXT_GP6           : integer := 2;
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  constant EXT_GP7           : integer := 3;
72
 
73 191 jshamlet
  constant OPEN8_NULLBUS     : DATA_TYPE := x"00";
74
 
75 181 jshamlet
  -- Component declaration
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  --  (assumes a 1K RAM at 0x0000 and ROM at the top of the memory map)
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  component o8_cpu is
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  generic(
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    Program_Start_Addr       : ADDRESS_TYPE := x"8000";
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    ISR_Start_Addr           : ADDRESS_TYPE := x"FFF0";
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    Stack_Start_Addr         : ADDRESS_TYPE := x"03FF";
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    Allow_Stack_Address_Move : boolean      := false;
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    Stack_Xfer_Flag          : integer      := 4;
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    Enable_Auto_Increment    : boolean      := false;
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    BRK_Implements_WAI       : boolean      := false;
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    Enable_NMI               : boolean      := true;
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    RTI_Ignores_GP_Flags     : boolean      := false;
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    Default_Interrupt_Mask   : DATA_TYPE    := x"FF";
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    Reset_Level              : std_logic    := '0' );
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  port(
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    Clock                    : in  std_logic;
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    Reset                    : in  std_logic;
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    CPU_Halt                 : in  std_logic;
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    Interrupts               : in  INTERRUPT_BUNDLE;
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    GP_Flags                 : out EXT_GP_FLAGS;
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    Address                  : out ADDRESS_TYPE;
97
    Rd_Data                  : in  DATA_TYPE;
98
    Rd_Enable                : out std_logic;
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    Wr_Data                  : out DATA_TYPE;
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    Wr_Enable                : out std_logic );
101
  end component;
102
 
103 189 jshamlet
  -- This function is used to calculate RAM parameters, but is generally
104
  --  useful for making things more generic.
105
  function ceil_log2 (x : in natural) return natural;
106
 
107 181 jshamlet
-------------------------------------------------------------------------------
108
-- Internal constants and type declarations.
109
--
110
-- These are only used in the actual model, and aren't generally useful for
111
--  external application.
112
-------------------------------------------------------------------------------
113
 
114
  subtype OPCODE_TYPE  is std_logic_vector(4 downto 0);
115
  subtype SUBOP_TYPE   is std_logic_vector(2 downto 0);
116
 
117
  -- All opcodes should be identical to the opcode used by the assembler
118
  -- In this case, they match the original V8/ARC uRISC ISA
119
  constant OP_INC            : OPCODE_TYPE := "00000";
120
  constant OP_ADC            : OPCODE_TYPE := "00001";
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  constant OP_TX0            : OPCODE_TYPE := "00010";
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  constant OP_OR             : OPCODE_TYPE := "00011";
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  constant OP_AND            : OPCODE_TYPE := "00100";
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  constant OP_XOR            : OPCODE_TYPE := "00101";
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  constant OP_ROL            : OPCODE_TYPE := "00110";
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  constant OP_ROR            : OPCODE_TYPE := "00111";
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  constant OP_DEC            : OPCODE_TYPE := "01000";
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  constant OP_SBC            : OPCODE_TYPE := "01001";
129
  constant OP_ADD            : OPCODE_TYPE := "01010";
130
  constant OP_STP            : OPCODE_TYPE := "01011";
131
  constant OP_BTT            : OPCODE_TYPE := "01100";
132
  constant OP_CLP            : OPCODE_TYPE := "01101";
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  constant OP_T0X            : OPCODE_TYPE := "01110";
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  constant OP_CMP            : OPCODE_TYPE := "01111";
135
  constant OP_PSH            : OPCODE_TYPE := "10000";
136
  constant OP_POP            : OPCODE_TYPE := "10001";
137
  constant OP_BR0            : OPCODE_TYPE := "10010";
138
  constant OP_BR1            : OPCODE_TYPE := "10011";
139
  constant OP_DBNZ           : OPCODE_TYPE := "10100"; -- USR
140
  constant OP_INT            : OPCODE_TYPE := "10101";
141
  constant OP_MUL            : OPCODE_TYPE := "10110"; -- USR2
142
  constant OP_STK            : OPCODE_TYPE := "10111";
143
  constant OP_UPP            : OPCODE_TYPE := "11000";
144
  constant OP_STA            : OPCODE_TYPE := "11001";
145
  constant OP_STX            : OPCODE_TYPE := "11010";
146
  constant OP_STO            : OPCODE_TYPE := "11011";
147
  constant OP_LDI            : OPCODE_TYPE := "11100";
148
  constant OP_LDA            : OPCODE_TYPE := "11101";
149
  constant OP_LDX            : OPCODE_TYPE := "11110";
150
  constant OP_LDO            : OPCODE_TYPE := "11111";
151
 
152
  -- OP_STK uses the lower 3 bits to further refine the instruction by
153 186 jshamlet
  --  repurposing the source register field. These "sub opcodes" take
154
  --  the place of the register select for the OP_STK opcode
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  constant SOP_RSP           : SUBOP_TYPE := "000";
156
  constant SOP_RTS           : SUBOP_TYPE := "001";
157
  constant SOP_RTI           : SUBOP_TYPE := "010";
158
  constant SOP_BRK           : SUBOP_TYPE := "011";
159
  constant SOP_JMP           : SUBOP_TYPE := "100";
160
  constant SOP_SMSK          : SUBOP_TYPE := "101";
161
  constant SOP_GMSK          : SUBOP_TYPE := "110";
162
  constant SOP_JSR           : SUBOP_TYPE := "111";
163
 
164
  type CPU_STATES is (
165
      -- Instruction fetch & Decode
166 187 jshamlet
    IPF_C0, IPF_C1, IPF_C2, IDC_C0,
167 181 jshamlet
    -- Branching
168
    BRN_C1, DBNZ_C1, JMP_C1, JMP_C2,
169
    -- Loads
170 185 jshamlet
    LDA_C1, LDA_C2, LDA_C3, LDA_C4, LDI_C1,
171
    LDO_C1, LDX_C1, LDX_C2, LDX_C3, LDX_C4,
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    -- Stores
173
    STA_C1, STA_C2, STA_C3, STO_C1, STO_C2, STX_C1, STX_C2,
174
    -- 2-cycle math
175
    MUL_C1, UPP_C1,
176
    -- Stack
177
    PSH_C1, POP_C1, POP_C2, POP_C3, POP_C4,
178
    -- Subroutines & Interrupts
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    WAI_Cx, WAH_Cx, BRK_C1,
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    ISR_C1, ISR_C2, ISR_C3, JSR_C1, JSR_C2,
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    RTS_C1, RTS_C2, RTS_C3, RTS_C4, RTS_C5, RTI_C6
182
     );
183 181 jshamlet
 
184
  type CACHE_MODES is (CACHE_IDLE, CACHE_INSTR, CACHE_OPER1, CACHE_OPER2,
185
                       CACHE_PREFETCH );
186
 
187 185 jshamlet
  type PC_MODES is ( PC_INCR, PC_LOAD );
188 181 jshamlet
 
189
  type PC_CTRL_TYPE is record
190
    Oper                     : PC_MODES;
191
    Offset                   : DATA_TYPE;
192
  end record;
193
 
194 185 jshamlet
  -- These are fixed constant offsets to the program counter logic, which is
195
  --  always either incrementing or loading.
196
  constant PC_NEXT           : DATA_TYPE := x"03";
197
  constant PC_IDLE           : DATA_TYPE := x"02";
198
  constant PC_REV1           : DATA_TYPE := x"01";
199
  constant PC_REV2           : DATA_TYPE := x"00";
200
  constant PC_REV3           : DATA_TYPE := x"FF";
201
 
202 181 jshamlet
  type SP_MODES is ( SP_IDLE, SP_CLR, SP_SET, SP_POP, SP_PUSH );
203
 
204
  type SP_CTRL_TYPE is record
205
    Oper                     : SP_MODES;
206
  end record;
207
 
208
  type DP_MODES is ( DATA_BUS_IDLE, DATA_RD_MEM,
209
                     DATA_WR_REG, DATA_WR_FLAG, DATA_WR_PC );
210
 
211
  type DATA_CTRL_TYPE is record
212
    Src                      : DP_MODES;
213
    Reg                      : SUBOP_TYPE;
214
  end record;
215
 
216 182 jshamlet
  constant PC_LSB            : SUBOP_TYPE := "000";
217
  constant PC_MSB            : SUBOP_TYPE := "001";
218
 
219 181 jshamlet
  type INT_CTRL_TYPE is record
220
    Mask_Set                 : std_logic;
221
    Soft_Ints                : INTERRUPT_BUNDLE;
222
    Incr_ISR                 : std_logic;
223
  end record;
224
 
225 185 jshamlet
  -- Most of the ALU instructions are the same as their Opcode equivalents,
226
  --  with exceptions for IDLE, UPP2, RFLG, RSP, and GMSK, which perform
227
  --  internal operations not otherwise exposed by the instruction set.
228 181 jshamlet
  constant ALU_INC           : OPCODE_TYPE := "00000"; -- x"00"
229
  constant ALU_ADC           : OPCODE_TYPE := "00001"; -- x"01"
230
  constant ALU_TX0           : OPCODE_TYPE := "00010"; -- x"02"
231
  constant ALU_OR            : OPCODE_TYPE := "00011"; -- x"03"
232
  constant ALU_AND           : OPCODE_TYPE := "00100"; -- x"04"
233
  constant ALU_XOR           : OPCODE_TYPE := "00101"; -- x"05"
234
  constant ALU_ROL           : OPCODE_TYPE := "00110"; -- x"06"
235
  constant ALU_ROR           : OPCODE_TYPE := "00111"; -- x"07"
236
  constant ALU_DEC           : OPCODE_TYPE := "01000"; -- x"08"
237
  constant ALU_SBC           : OPCODE_TYPE := "01001"; -- x"09"
238
  constant ALU_ADD           : OPCODE_TYPE := "01010"; -- x"0A"
239
  constant ALU_STP           : OPCODE_TYPE := "01011"; -- x"0B"
240
  constant ALU_BTT           : OPCODE_TYPE := "01100"; -- x"0C"
241
  constant ALU_CLP           : OPCODE_TYPE := "01101"; -- x"0D"
242
  constant ALU_T0X           : OPCODE_TYPE := "01110"; -- x"0E"
243
  constant ALU_CMP           : OPCODE_TYPE := "01111"; -- x"0F"
244
  constant ALU_POP           : OPCODE_TYPE := "10001"; -- x"11"
245
  constant ALU_MUL           : OPCODE_TYPE := "10110"; -- x"16"
246
  constant ALU_UPP           : OPCODE_TYPE := "11000"; -- x"18"
247
  constant ALU_LDI           : OPCODE_TYPE := "11100"; -- x"1C"
248
 
249
  constant ALU_IDLE          : OPCODE_TYPE := "10000"; -- x"10"
250
  constant ALU_UPP2          : OPCODE_TYPE := "10010"; -- x"12"
251
  constant ALU_RFLG          : OPCODE_TYPE := "10011"; -- x"13"
252 185 jshamlet
  constant ALU_RSP           : OPCODE_TYPE := "10111"; -- x"17"
253
  constant ALU_GMSK          : OPCODE_TYPE := "11111"; -- x"1F"
254 181 jshamlet
 
255 185 jshamlet
  -- These should match the assembler's definitions for the flags
256
  constant PSR_Z             : integer := 0;
257
  constant PSR_C             : integer := 1;
258
  constant PSR_N             : integer := 2;
259
  constant PSR_I             : integer := 3;
260
  constant PSR_GP4           : integer := 4;
261 186 jshamlet
  constant PSR_GP5           : integer := 5;
262
  constant PSR_GP6           : integer := 6;
263
  constant PSR_GP7           : integer := 7;
264
 
265
  type ALU_CTRL_TYPE is record
266
    Oper                     : OPCODE_TYPE;
267
    Reg                      : SUBOP_TYPE;
268
  end record;
269
 
270
  constant ACCUM             : SUBOP_TYPE := "000";
271
 
272
  type REGFILE_TYPE is array (0 to 7) of DATA_TYPE;
273
 
274
  subtype FLAG_TYPE is DATA_TYPE;
275
 
276
end Open8_pkg;
277
 
278
package body Open8_pkg is
279 189 jshamlet
 
280
  -- The ceil_log2 function returns the minimum register width required to
281
  --  hold the supplied integer.
282
  function ceil_log2 (x : in natural) return natural is
283
    variable retval          : natural;
284
  begin
285
    retval                   := 1;
286
    while ((2**retval) - 1) < x loop
287
      retval                 := retval + 1;
288
    end loop;
289
    return retval;
290
  end ceil_log2;
291
 
292 186 jshamlet
end package body;

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