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[/] [open8_urisc/] [trunk/] [VHDL/] [Open8_pkg.vhd] - Blame information for rev 269

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-- Copyright (c)2006,2011,2012,2013,2015,2020 Jeremy Seth Henry
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-- All rights reserved.
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--
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-- Redistribution and use in source and binary forms, with or without
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-- modification, are permitted provided that the following conditions are met:
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--     * Redistributions of source code must retain the above copyright
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--       notice, this list of conditions and the following disclaimer.
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--     * Redistributions in binary form must reproduce the above copyright
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--       notice, this list of conditions and the following disclaimer in the
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--       documentation and/or other materials provided with the distribution,
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--       where applicable (as part of a user interface, debugging port, etc.)
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--
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-- THIS SOFTWARE IS PROVIDED BY JEREMY SETH HENRY ``AS IS'' AND ANY
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-- EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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-- WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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-- DISCLAIMED. IN NO EVENT SHALL JEREMY SETH HENRY BE LIABLE FOR ANY
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-- DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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-- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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-- ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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-- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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-- THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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24
-- VHDL Units :  Open8_pkg
25
-- Description:  Contains constant definitions for the Open8 processor
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--
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-- Revision History
28
-- Author          Date     Change
29
------------------ -------- ---------------------------------------------------
30
-- Seth Henry      07/22/06 Design Start
31
-- Seth Henry      02/03/12 Updated generics to match current model
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-- Seth Henry      10/29/15 Migrated type/constant definitions to this file
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-- Seth Henry      03/09/20 Created new ALU/SP opcodes for handling new RSP
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-- Seth Henry      03/12/20 Rationalized the naming of the CPU flags to match
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--                           the assembler names. Also removed superfluous
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--                           signals in the ALU and PC records.
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-- Seth Henry      03/17/20 Added new subtype and constants for external
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--                           GP flags.
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-- Seth Henry      03/18/20 Added the ceil_log2 function, since it is used in
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--                           memory sizing calculations.
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-- Seth Henry      04/09/20 Added the I bit to the exported flags for use in
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--                           memory protection schemes.
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-- Seth Henry      04/16/20 Added the OPEN8_BUS_TYPE record to simplify
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--                           peripheral connections.
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-- Seth Henry      10/21/20 Modified the write data path to use separate
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--                           enumerated states rather than reuse the .reg field
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--                           to improve performance.
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49
library ieee;
50
use ieee.std_logic_1164.all;
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use ieee.std_logic_arith.all;
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53
package Open8_pkg is
54
 
55
-------------------------------------------------------------------------------
56
-- External constants and type declarations
57
--
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-- These subtypes can be used with external peripherals to simplify
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--  connection to the core.
60
-------------------------------------------------------------------------------
61
 
62
  -- These must never be changed, as the core requires them to be these static
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  --  values for proper operation. These are ONLY defined here to allow user
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  --  code to dynamically configure itself to match the Open8 core.
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66
  constant OPEN8_ADDR_WIDTH  : integer := 16; -- DON'T EVEN CONTEMPLATE
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  constant OPEN8_DATA_WIDTH  : integer := 8;  -- CHANGING THESE!
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69
  subtype ADDRESS_TYPE is std_logic_vector(OPEN8_ADDR_WIDTH - 1 downto 0);
70
  subtype DATA_TYPE    is std_logic_vector(OPEN8_DATA_WIDTH - 1 downto 0);
71
  -- Note: INTERRUPT_BUNDLE must be exactly the same width as DATA_TYPE
72
  subtype INTERRUPT_BUNDLE is DATA_TYPE;
73
 
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  subtype EXT_GP_FLAGS is std_logic_vector(4 downto 0);
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  constant EXT_ISR           : integer := 0;
77
  constant EXT_GP4           : integer := 1;
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  constant EXT_GP5           : integer := 2;
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  constant EXT_GP6           : integer := 3;
80
  constant EXT_GP7           : integer := 4;
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  constant OPEN8_NULLBUS     : DATA_TYPE := x"00";
83
 
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  constant Reset_Level       : std_logic := '1';
85
 
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  type OPEN8_BUS_TYPE is record
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    Clock                    : std_logic;
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    Reset                    : std_logic;
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    uSec_Tick                : std_logic;
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    Address                  : ADDRESS_TYPE;
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    Wr_En                    : std_logic;
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    Wr_Data                  : DATA_TYPE;
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    Rd_En                    : std_logic;
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    GP_Flags                 : EXT_GP_FLAGS;
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  end record;
96
 
97 228 jshamlet
  constant INIT_OPEN8_BUS    : OPEN8_BUS_TYPE := (
98
                                 '0',           -- Clock
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                                 Reset_Level,   -- Reset
100
                                 '0',           -- uSec_Tick
101
                                 x"0000",       -- Address
102
                                 '0',           -- Wr_En
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                                 OPEN8_NULLBUS, -- Wr_Data
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                                 '0',           -- Rd_En
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                                 "00000"        -- GP_Flags
106
                               );
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108 181 jshamlet
  -- Component declaration
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  --  (assumes a 1K RAM at 0x0000 and ROM at the top of the memory map)
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  component o8_cpu is
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  generic(
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    Program_Start_Addr       : ADDRESS_TYPE := x"8000";
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    ISR_Start_Addr           : ADDRESS_TYPE := x"FFF0";
114
    Stack_Start_Addr         : ADDRESS_TYPE := x"03FF";
115
    Allow_Stack_Address_Move : boolean      := false;
116
    Stack_Xfer_Flag          : integer      := 4;
117
    Enable_Auto_Increment    : boolean      := false;
118
    BRK_Implements_WAI       : boolean      := false;
119
    Enable_NMI               : boolean      := true;
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    RTI_Ignores_GP_Flags     : boolean      := false;
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    Default_Interrupt_Mask   : DATA_TYPE    := x"FF";
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    Clock_Frequency          : real
123
  );
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  port(
125
    Clock                    : in  std_logic;
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    PLL_Locked               : in  std_logic;
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    Halt_Req                 : in  std_logic := '0';
128
    Halt_Ack                 : out std_logic;
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    Open8_Bus                : out OPEN8_BUS_TYPE;
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    Rd_Data                  : in  DATA_TYPE;
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    Interrupts               : in  INTERRUPT_BUNDLE := x"00"
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  );
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  end component;
134
 
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  -- This function is used to calculate RAM parameters, but is generally
136
  --  useful for making things more generic.
137
  function ceil_log2 (x : in natural) return natural;
138
 
139 181 jshamlet
-------------------------------------------------------------------------------
140
-- Internal constants and type declarations.
141
--
142
-- These are only used in the actual model, and aren't generally useful for
143
--  external application.
144
-------------------------------------------------------------------------------
145
 
146
  subtype OPCODE_TYPE  is std_logic_vector(4 downto 0);
147
  subtype SUBOP_TYPE   is std_logic_vector(2 downto 0);
148
 
149
  -- All opcodes should be identical to the opcode used by the assembler
150
  -- In this case, they match the original V8/ARC uRISC ISA
151
  constant OP_INC            : OPCODE_TYPE := "00000";
152
  constant OP_ADC            : OPCODE_TYPE := "00001";
153
  constant OP_TX0            : OPCODE_TYPE := "00010";
154
  constant OP_OR             : OPCODE_TYPE := "00011";
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  constant OP_AND            : OPCODE_TYPE := "00100";
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  constant OP_XOR            : OPCODE_TYPE := "00101";
157
  constant OP_ROL            : OPCODE_TYPE := "00110";
158
  constant OP_ROR            : OPCODE_TYPE := "00111";
159
  constant OP_DEC            : OPCODE_TYPE := "01000";
160
  constant OP_SBC            : OPCODE_TYPE := "01001";
161
  constant OP_ADD            : OPCODE_TYPE := "01010";
162
  constant OP_STP            : OPCODE_TYPE := "01011";
163
  constant OP_BTT            : OPCODE_TYPE := "01100";
164
  constant OP_CLP            : OPCODE_TYPE := "01101";
165
  constant OP_T0X            : OPCODE_TYPE := "01110";
166
  constant OP_CMP            : OPCODE_TYPE := "01111";
167
  constant OP_PSH            : OPCODE_TYPE := "10000";
168
  constant OP_POP            : OPCODE_TYPE := "10001";
169
  constant OP_BR0            : OPCODE_TYPE := "10010";
170
  constant OP_BR1            : OPCODE_TYPE := "10011";
171
  constant OP_DBNZ           : OPCODE_TYPE := "10100"; -- USR
172
  constant OP_INT            : OPCODE_TYPE := "10101";
173
  constant OP_MUL            : OPCODE_TYPE := "10110"; -- USR2
174
  constant OP_STK            : OPCODE_TYPE := "10111";
175
  constant OP_UPP            : OPCODE_TYPE := "11000";
176
  constant OP_STA            : OPCODE_TYPE := "11001";
177
  constant OP_STX            : OPCODE_TYPE := "11010";
178
  constant OP_STO            : OPCODE_TYPE := "11011";
179
  constant OP_LDI            : OPCODE_TYPE := "11100";
180
  constant OP_LDA            : OPCODE_TYPE := "11101";
181
  constant OP_LDX            : OPCODE_TYPE := "11110";
182
  constant OP_LDO            : OPCODE_TYPE := "11111";
183
 
184
  -- OP_STK uses the lower 3 bits to further refine the instruction by
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  --  repurposing the source register field. These "sub opcodes" take
186
  --  the place of the register select for the OP_STK opcode
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  constant SOP_RSP           : SUBOP_TYPE := "000";
188
  constant SOP_RTS           : SUBOP_TYPE := "001";
189
  constant SOP_RTI           : SUBOP_TYPE := "010";
190
  constant SOP_BRK           : SUBOP_TYPE := "011";
191
  constant SOP_JMP           : SUBOP_TYPE := "100";
192
  constant SOP_SMSK          : SUBOP_TYPE := "101";
193
  constant SOP_GMSK          : SUBOP_TYPE := "110";
194
  constant SOP_JSR           : SUBOP_TYPE := "111";
195
 
196
  type CPU_STATES is (
197
      -- Instruction fetch & Decode
198 187 jshamlet
    IPF_C0, IPF_C1, IPF_C2, IDC_C0,
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    -- Branching
200
    BRN_C1, DBNZ_C1, JMP_C1, JMP_C2,
201
    -- Loads
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    LDA_C1, LDA_C2, LDA_C3, LDA_C4, LDI_C1,
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    LDO_C1, LDO_C2, LDX_C1, LDX_C2, LDX_C3, LDX_C4,
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    -- Stores
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    STA_C1, STA_C2, STA_C3, STO_C1, STO_C2, STO_C3, STX_C1, STX_C2,
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    -- 2-cycle math
207
    MUL_C1, UPP_C1,
208
    -- Stack
209
    PSH_C1, POP_C1, POP_C2, POP_C3, POP_C4,
210
    -- Subroutines & Interrupts
211 187 jshamlet
    WAI_Cx, WAH_Cx, BRK_C1,
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    ISR_C1, ISR_C2, ISR_C3, JSR_C1, JSR_C2,
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    RTS_C1, RTS_C2, RTS_C3, RTS_C4, RTS_C5, RTI_C6
214
     );
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216
  type CACHE_MODES is (CACHE_IDLE, CACHE_INSTR, CACHE_OPER1, CACHE_OPER2,
217
                       CACHE_PREFETCH );
218
 
219 185 jshamlet
  type PC_MODES is ( PC_INCR, PC_LOAD );
220 181 jshamlet
 
221
  type PC_CTRL_TYPE is record
222
    Oper                     : PC_MODES;
223
    Offset                   : DATA_TYPE;
224
  end record;
225
 
226 185 jshamlet
  -- These are fixed constant offsets to the program counter logic, which is
227
  --  always either incrementing or loading.
228
  constant PC_NEXT           : DATA_TYPE := x"03";
229
  constant PC_IDLE           : DATA_TYPE := x"02";
230
  constant PC_REV1           : DATA_TYPE := x"01";
231
  constant PC_REV2           : DATA_TYPE := x"00";
232
  constant PC_REV3           : DATA_TYPE := x"FF";
233
 
234 181 jshamlet
  type SP_MODES is ( SP_IDLE, SP_CLR, SP_SET, SP_POP, SP_PUSH );
235
 
236
  type SP_CTRL_TYPE is record
237
    Oper                     : SP_MODES;
238
  end record;
239
 
240
  type DP_MODES is ( DATA_BUS_IDLE, DATA_RD_MEM,
241 269 jshamlet
                     DATA_WR_REG, DATA_WR_FLAG,
242
                     DATA_WR_PC_L, DATA_WR_PC_H );
243 181 jshamlet
 
244
  type DATA_CTRL_TYPE is record
245
    Src                      : DP_MODES;
246
    Reg                      : SUBOP_TYPE;
247
  end record;
248
 
249
  type INT_CTRL_TYPE is record
250
    Mask_Set                 : std_logic;
251
    Soft_Ints                : INTERRUPT_BUNDLE;
252
    Incr_ISR                 : std_logic;
253
  end record;
254
 
255 185 jshamlet
  -- Most of the ALU instructions are the same as their Opcode equivalents,
256
  --  with exceptions for IDLE, UPP2, RFLG, RSP, and GMSK, which perform
257
  --  internal operations not otherwise exposed by the instruction set.
258 181 jshamlet
  constant ALU_INC           : OPCODE_TYPE := "00000"; -- x"00"
259
  constant ALU_ADC           : OPCODE_TYPE := "00001"; -- x"01"
260
  constant ALU_TX0           : OPCODE_TYPE := "00010"; -- x"02"
261
  constant ALU_OR            : OPCODE_TYPE := "00011"; -- x"03"
262
  constant ALU_AND           : OPCODE_TYPE := "00100"; -- x"04"
263
  constant ALU_XOR           : OPCODE_TYPE := "00101"; -- x"05"
264
  constant ALU_ROL           : OPCODE_TYPE := "00110"; -- x"06"
265
  constant ALU_ROR           : OPCODE_TYPE := "00111"; -- x"07"
266
  constant ALU_DEC           : OPCODE_TYPE := "01000"; -- x"08"
267
  constant ALU_SBC           : OPCODE_TYPE := "01001"; -- x"09"
268
  constant ALU_ADD           : OPCODE_TYPE := "01010"; -- x"0A"
269
  constant ALU_STP           : OPCODE_TYPE := "01011"; -- x"0B"
270
  constant ALU_BTT           : OPCODE_TYPE := "01100"; -- x"0C"
271
  constant ALU_CLP           : OPCODE_TYPE := "01101"; -- x"0D"
272
  constant ALU_T0X           : OPCODE_TYPE := "01110"; -- x"0E"
273
  constant ALU_CMP           : OPCODE_TYPE := "01111"; -- x"0F"
274
  constant ALU_POP           : OPCODE_TYPE := "10001"; -- x"11"
275
  constant ALU_MUL           : OPCODE_TYPE := "10110"; -- x"16"
276
  constant ALU_UPP           : OPCODE_TYPE := "11000"; -- x"18"
277
  constant ALU_LDI           : OPCODE_TYPE := "11100"; -- x"1C"
278
 
279
  constant ALU_IDLE          : OPCODE_TYPE := "10000"; -- x"10"
280
  constant ALU_UPP2          : OPCODE_TYPE := "10010"; -- x"12"
281
  constant ALU_RFLG          : OPCODE_TYPE := "10011"; -- x"13"
282 185 jshamlet
  constant ALU_RSP           : OPCODE_TYPE := "10111"; -- x"17"
283
  constant ALU_GMSK          : OPCODE_TYPE := "11111"; -- x"1F"
284 181 jshamlet
 
285 185 jshamlet
  -- These should match the assembler's definitions for the flags
286
  constant PSR_Z             : integer := 0;
287
  constant PSR_C             : integer := 1;
288
  constant PSR_N             : integer := 2;
289
  constant PSR_I             : integer := 3;
290
  constant PSR_GP4           : integer := 4;
291 186 jshamlet
  constant PSR_GP5           : integer := 5;
292
  constant PSR_GP6           : integer := 6;
293
  constant PSR_GP7           : integer := 7;
294
 
295
  type ALU_CTRL_TYPE is record
296
    Oper                     : OPCODE_TYPE;
297
    Reg                      : SUBOP_TYPE;
298
  end record;
299
 
300
  constant ACCUM             : SUBOP_TYPE := "000";
301
 
302
  type REGFILE_TYPE is array (0 to 7) of DATA_TYPE;
303
 
304
  subtype FLAG_TYPE is DATA_TYPE;
305
 
306 227 jshamlet
end package;
307 186 jshamlet
 
308
package body Open8_pkg is
309 189 jshamlet
 
310
  -- The ceil_log2 function returns the minimum register width required to
311
  --  hold the supplied integer.
312
  function ceil_log2 (x : in natural) return natural is
313
    variable retval          : natural;
314
  begin
315
    retval                   := 1;
316
    while ((2**retval) - 1) < x loop
317
      retval                 := retval + 1;
318
    end loop;
319
    return retval;
320 227 jshamlet
  end function;
321 189 jshamlet
 
322 186 jshamlet
end package body;

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