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[/] [open8_urisc/] [trunk/] [VHDL/] [Open8_pkg.vhd] - Blame information for rev 279

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-- Copyright (c)2006,2011,2012,2013,2015,2020 Jeremy Seth Henry
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-- All rights reserved.
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--
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-- Redistribution and use in source and binary forms, with or without
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-- modification, are permitted provided that the following conditions are met:
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--     * Redistributions of source code must retain the above copyright
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--       notice, this list of conditions and the following disclaimer.
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--     * Redistributions in binary form must reproduce the above copyright
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--       notice, this list of conditions and the following disclaimer in the
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--       documentation and/or other materials provided with the distribution,
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--       where applicable (as part of a user interface, debugging port, etc.)
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--
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-- THIS SOFTWARE IS PROVIDED BY JEREMY SETH HENRY ``AS IS'' AND ANY
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-- EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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-- WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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-- DISCLAIMED. IN NO EVENT SHALL JEREMY SETH HENRY BE LIABLE FOR ANY
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-- DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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-- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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-- ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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-- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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-- THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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-- VHDL Units :  Open8_pkg
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-- Description:  Contains constant definitions for the Open8 processor
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--
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-- Revision History
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-- Author          Date     Change
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------------------ -------- ---------------------------------------------------
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-- Seth Henry      07/22/06 Design Start
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-- Seth Henry      02/03/12 Updated generics to match current model
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-- Seth Henry      10/29/15 Migrated type/constant definitions to this file
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-- Seth Henry      03/09/20 Created new ALU/SP opcodes for handling new RSP
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-- Seth Henry      03/12/20 Rationalized the naming of the CPU flags to match
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--                           the assembler names. Also removed superfluous
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--                           signals in the ALU and PC records.
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-- Seth Henry      03/17/20 Added new subtype and constants for external
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--                           GP flags.
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-- Seth Henry      03/18/20 Added the ceil_log2 function, since it is used in
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--                           memory sizing calculations.
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-- Seth Henry      04/09/20 Added the I bit to the exported flags for use in
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--                           memory protection schemes.
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-- Seth Henry      04/16/20 Added the OPEN8_BUS_TYPE record to simplify
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--                           peripheral connections.
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-- Seth Henry      10/21/20 Modified the write data path to use separate
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--                           enumerated states rather than reuse the .reg field
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--                           to improve performance.
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-- Seth Henry      10/23/20 Moved CPU internal constants to o8_cpu.vhd
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_arith.all;
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package Open8_pkg is
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-------------------------------------------------------------------------------
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-- External constants and type declarations
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--
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-- These subtypes can be used with external peripherals to simplify
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--  connection to the core.
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-------------------------------------------------------------------------------
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  -- These must never be changed, as the core requires them to be these static
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  --  values for proper operation. These are ONLY defined here to allow user
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  --  code to dynamically configure itself to match the Open8 core.
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  constant OPEN8_ADDR_WIDTH  : integer := 16; -- DON'T EVEN CONTEMPLATE
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  constant OPEN8_DATA_WIDTH  : integer := 8;  -- CHANGING THESE!
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  subtype ADDRESS_TYPE is std_logic_vector(OPEN8_ADDR_WIDTH - 1 downto 0);
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  subtype DATA_TYPE    is std_logic_vector(OPEN8_DATA_WIDTH - 1 downto 0);
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  -- Note: INTERRUPT_BUNDLE must be exactly the same width as DATA_TYPE
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  subtype INTERRUPT_BUNDLE is DATA_TYPE;
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  subtype EXT_GP_FLAGS is std_logic_vector(4 downto 0);
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  constant EXT_ISR           : integer := 0;
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  constant EXT_GP4           : integer := 1;
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  constant EXT_GP5           : integer := 2;
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  constant EXT_GP6           : integer := 3;
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  constant EXT_GP7           : integer := 4;
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  constant OPEN8_NULLBUS     : DATA_TYPE := x"00";
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  constant Reset_Level       : std_logic := '1';
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  type OPEN8_BUS_TYPE is record
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    Clock                    : std_logic;
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    Reset                    : std_logic;
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    uSec_Tick                : std_logic;
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    Address                  : ADDRESS_TYPE;
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    Wr_En                    : std_logic;
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    Wr_Data                  : DATA_TYPE;
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    Rd_En                    : std_logic;
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    GP_Flags                 : EXT_GP_FLAGS;
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  end record;
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  constant INIT_OPEN8_BUS    : OPEN8_BUS_TYPE := (
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                                 '0',           -- Clock
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                                 Reset_Level,   -- Reset
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                                 '0',           -- uSec_Tick
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                                 x"0000",       -- Address
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                                 '0',           -- Wr_En
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                                 OPEN8_NULLBUS, -- Wr_Data
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                                 '0',           -- Rd_En
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                                 "00000"        -- GP_Flags
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                               );
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  -- Component declaration
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  --  (assumes a 1K RAM at 0x0000 and ROM at the top of the memory map)
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  component o8_cpu is
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  generic(
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    Program_Start_Addr       : ADDRESS_TYPE := x"8000";
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    ISR_Start_Addr           : ADDRESS_TYPE := x"FFF0";
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    Stack_Start_Addr         : ADDRESS_TYPE := x"03FF";
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    Allow_Stack_Address_Move : boolean      := false;
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    Enable_Auto_Increment    : boolean      := false;
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    BRK_Implements_WAI       : boolean      := false;
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    Enable_NMI               : boolean      := true;
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    RTI_Ignores_GP_Flags     : boolean      := false;
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    Default_Interrupt_Mask   : DATA_TYPE    := x"FF";
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    Clock_Frequency          : real
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  );
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  port(
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    Clock                    : in  std_logic;
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    PLL_Locked               : in  std_logic;
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    Halt_Req                 : in  std_logic := '0';
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    Halt_Ack                 : out std_logic;
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    Open8_Bus                : out OPEN8_BUS_TYPE;
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    Rd_Data                  : in  DATA_TYPE;
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    Interrupts               : in  INTERRUPT_BUNDLE := x"00"
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  );
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  end component;
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  -- This function is used to calculate RAM parameters, but is generally
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  --  useful for making things more generic.
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  function ceil_log2 (x : in natural) return natural;
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end package;
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package body Open8_pkg is
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  -- The ceil_log2 function returns the minimum register width required to
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  --  hold the supplied integer.
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  function ceil_log2 (x : in natural) return natural is
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    variable retval          : natural;
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  begin
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    retval                   := 1;
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    while ((2**retval) - 1) < x loop
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      retval                 := retval + 1;
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    end loop;
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    return retval;
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  end function;
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end package body;

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