Subversion Repositories open8_urisc

-- Copyright (c)2006,2011,2012,2013,2015,2020 Jeremy Seth Henry

-- All rights reserved.

--

-- Redistribution and use in source and binary forms, with or without

-- modification, are permitted provided that the following conditions are met:

--     * Redistributions of source code must retain the above copyright

--       notice, this list of conditions and the following disclaimer.

--     * Redistributions in binary form must reproduce the above copyright

--       notice, this list of conditions and the following disclaimer in the

--       documentation and/or other materials provided with the distribution,

--       where applicable (as part of a user interface, debugging port, etc.)

--

-- THIS SOFTWARE IS PROVIDED BY JEREMY SETH HENRY ``AS IS'' AND ANY

-- EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

-- WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE

-- DISCLAIMED. IN NO EVENT SHALL JEREMY SETH HENRY BE LIABLE FOR ANY

-- DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

-- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

-- ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

-- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF

-- THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

-- VHDL Units :  Open8_pkg

-- Description:  Contains constant definitions for the Open8 processor

--

-- Revision History

-- Author          Date     Change

------------------ -------- ---------------------------------------------------

-- Seth Henry      07/22/06 Design Start

-- Seth Henry      02/03/12 Updated generics to match current model

-- Seth Henry      10/29/15 Migrated type/constant definitions to this file

-- Seth Henry      03/09/20 Created new ALU/SP opcodes for handling new RSP

-- Seth Henry      03/12/20 Rationalized the naming of the CPU flags to match

--                           the assembler names. Also removed superfluous

--                           signals in the ALU and PC records.

-- Seth Henry      03/17/20 Added new subtype and constants for external

--                           GP flags.

-- Seth Henry      03/18/20 Added the ceil_log2 function, since it is used in

--                           memory sizing calculations.

-- Seth Henry      04/09/20 Added the I bit to the exported flags for use in

--                           memory protection schemes.

-- Seth Henry      04/16/20 Added the OPEN8_BUS_TYPE record to simplify

--                           peripheral connections.

-- Seth Henry      10/21/20 Modified the write data path to use separate

--                           enumerated states rather than reuse the .reg field

--                           to improve performance.

-- Seth Henry      10/23/20 Moved CPU internal constants to o8_cpu.vhd

library ieee;

use ieee.std_logic_1164.all;

use ieee.std_logic_arith.all;

package Open8_pkg is

-------------------------------------------------------------------------------

-- External constants and type declarations

--

-- These subtypes can be used with external peripherals to simplify

--  connection to the core.

-------------------------------------------------------------------------------

  -- These must never be changed, as the core requires them to be these static

  --  values for proper operation. These are ONLY defined here to allow user

  --  code to dynamically configure itself to match the Open8 core.

  constant OPEN8_ADDR_WIDTH  : integer := 16; -- DON'T EVEN CONTEMPLATE

  constant OPEN8_DATA_WIDTH  : integer := 8;  -- CHANGING THESE!

  subtype ADDRESS_TYPE is std_logic_vector(OPEN8_ADDR_WIDTH - 1 downto 0);

  subtype DATA_TYPE    is std_logic_vector(OPEN8_DATA_WIDTH - 1 downto 0);

  -- Note: INTERRUPT_BUNDLE must be exactly the same width as DATA_TYPE

  subtype INTERRUPT_BUNDLE is DATA_TYPE;

  subtype EXT_GP_FLAGS is std_logic_vector(4 downto 0);

  constant EXT_ISR           : integer := 0;

  constant EXT_GP4           : integer := 1;

  constant EXT_GP5           : integer := 2;

  constant EXT_GP6           : integer := 3;

  constant EXT_GP7           : integer := 4;

  constant OPEN8_NULLBUS     : DATA_TYPE := x"00";

  constant Reset_Level       : std_logic := '1';

  type OPEN8_BUS_TYPE is record

    Clock                    : std_logic;

    Reset                    : std_logic;

    uSec_Tick                : std_logic;

    Address                  : ADDRESS_TYPE;

    Wr_En                    : std_logic;

    Wr_Data                  : DATA_TYPE;

    Rd_En                    : std_logic;

    GP_Flags                 : EXT_GP_FLAGS;

  end record;

  constant INIT_OPEN8_BUS    : OPEN8_BUS_TYPE := (

                                 '0',           -- Clock

                                 Reset_Level,   -- Reset

                                 '0',           -- uSec_Tick

                                 x"0000",       -- Address

                                 '0',           -- Wr_En

                                 OPEN8_NULLBUS, -- Wr_Data

                                 '0',           -- Rd_En

                                 "00000"        -- GP_Flags

                               );

  -- Component declaration

  --  (assumes a 1K RAM at 0x0000 and ROM at the top of the memory map)

  component o8_cpu is

  generic(

    Program_Start_Addr       : ADDRESS_TYPE := x"8000";

    ISR_Start_Addr           : ADDRESS_TYPE := x"FFF0";

    Stack_Start_Addr         : ADDRESS_TYPE := x"03FF";

    Allow_Stack_Address_Move : boolean      := false;

    Enable_Auto_Increment    : boolean      := false;

    BRK_Implements_WAI       : boolean      := false;

    Enable_NMI               : boolean      := true;

    RTI_Ignores_GP_Flags     : boolean      := false;

    Default_Interrupt_Mask   : DATA_TYPE    := x"FF";

    Clock_Frequency          : real

  );

  port(

    Clock                    : in  std_logic;

    PLL_Locked               : in  std_logic;

    Halt_Req                 : in  std_logic := '0';

    Halt_Ack                 : out std_logic;

    Open8_Bus                : out OPEN8_BUS_TYPE;

    Rd_Data                  : in  DATA_TYPE;

    Interrupts               : in  INTERRUPT_BUNDLE := x"00"

  );

  end component;

  -- This function is used to calculate RAM parameters, but is generally

  --  useful for making things more generic.

  function ceil_log2 (x : in natural) return natural;

end package;

package body Open8_pkg is

  -- The ceil_log2 function returns the minimum register width required to

  --  hold the supplied integer.

  function ceil_log2 (x : in natural) return natural is

    variable retval          : natural;

  begin

    retval                   := 1;

    while ((2**retval) - 1) < x loop

      retval                 := retval + 1;

    end loop;

    return retval;

  end function;

end package body;