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[/] [open8_urisc/] [trunk/] [VHDL/] [button_db.vhd] - Blame information for rev 207

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1 191 jshamlet
-- Copyright (c)2020 Jeremy Seth Henry
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-- All rights reserved.
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--
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-- Redistribution and use in source and binary forms, with or without
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-- modification, are permitted provided that the following conditions are met:
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--     * Redistributions of source code must retain the above copyright
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--       notice, this list of conditions and the following disclaimer.
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--     * Redistributions in binary form must reproduce the above copyright
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--       notice, this list of conditions and the following disclaimer in the
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--       documentation and/or other materials provided with the distribution,
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--       where applicable (as part of a user interface, debugging port, etc.)
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--
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-- THIS SOFTWARE IS PROVIDED BY JEREMY SETH HENRY ``AS IS'' AND ANY
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-- EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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-- WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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-- DISCLAIMED. IN NO EVENT SHALL JEREMY SETH HENRY BE LIABLE FOR ANY
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-- DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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-- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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-- ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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-- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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-- THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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--
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-- VHDL Units :  button_db
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-- Description:  Debounces a single button/switch and provides a change of
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--                state signal as well as registered level.
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library ieee;
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  use ieee.std_logic_1164.all;
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  use ieee.std_logic_unsigned.all;
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  use ieee.std_logic_misc.all;
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entity button_db is
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generic(
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  Button_Level          : std_logic;
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  Reset_Level           : std_logic
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);
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port(
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  Clock                 : in  std_logic;
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  Reset                 : in  std_logic;
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  mSec_Tick             : in  std_logic;
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  --
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  Button_In             : in  std_logic;
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  --
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  Button_Pressed        : out std_logic;
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  Button_CoS            : out std_logic
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);
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end entity;
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architecture behave of button_db is
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  signal Button_SR      : std_logic_vector(2 downto 0);
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  alias  Button_In_q    is Button_SR(2);
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  signal Button_Dn_Tmr  : std_logic_vector(5 downto 0);
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  signal Button_Dn      : std_logic;
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  signal Button_Up_Tmr  : std_logic_vector(5 downto 0);
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  signal Button_Up      : std_logic;
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  signal Button_State   : std_logic;
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  signal Button_State_q : std_logic;
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begin
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  Button_Pressed         <= Button_State_q;
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  Button_trap: process( Clock, Reset )
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  begin
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    if( Reset = Reset_Level )then
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      Button_SR          <= (others => '0');
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      Button_Dn_Tmr      <= (others => '0');
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      Button_Dn          <= '0';
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      Button_Up_Tmr      <= (others => '0');
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      Button_Up          <= '0';
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      Button_State       <= '0';
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      Button_State_q     <= '0';
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      Button_CoS         <= '0';
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    elsif( rising_edge(Clock) )then
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      Button_SR         <= Button_SR(1 downto 0) & Button_In;
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      Button_Dn_Tmr     <= (others => '0');
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      Button_Dn         <= '0';
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      if( Button_In_q = Button_Level )then
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        Button_Dn_Tmr   <= Button_Dn_Tmr + mSec_Tick;
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        if( and_reduce(Button_Dn_Tmr) = '1' )then
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          Button_Dn_Tmr <= Button_Dn_Tmr;
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          Button_Dn     <= '1';
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        end if;
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      end if;
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      Button_Up_Tmr     <= (others => '0');
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      Button_Up         <= '0';
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      if( Button_In_q = not Button_Level )then
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        Button_Up_Tmr   <= Button_Up_Tmr + mSec_Tick;
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        if( and_reduce(Button_Up_Tmr) = '1' )then
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          Button_Up_Tmr <= Button_Up_Tmr;
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          Button_Up     <= '1';
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        end if;
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      end if;
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      if( Button_Dn = '1' )then
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        Button_State    <= '1';
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      elsif( Button_Up  = '1' )then
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        Button_State    <= '0';
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      end if;
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      Button_State_q    <= Button_State;
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      Button_CoS        <= Button_State xor Button_State_q;
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    end if;
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  end process;
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end architecture;

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