OpenCores
URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [VHDL/] [status_led.vhd] - Blame information for rev 329

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 249 jshamlet
-- Copyright (c)2020 Jeremy Seth Henry
2
-- All rights reserved.
3
--
4
-- Redistribution and use in source and binary forms, with or without
5
-- modification, are permitted provided that the following conditions are met:
6
--     * Redistributions of source code must retain the above copyright
7
--       notice, this list of conditions and the following disclaimer.
8
--     * Redistributions in binary form must reproduce the above copyright
9
--       notice, this list of conditions and the following disclaimer in the
10
--       documentation and/or other materials provided with the distribution,
11
--       where applicable (as part of a user interface, debugging port, etc.)
12
--
13
-- THIS SOFTWARE IS PROVIDED BY JEREMY SETH HENRY ``AS IS'' AND ANY
14
-- EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
15
-- WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
16
-- DISCLAIMED. IN NO EVENT SHALL JEREMY SETH HENRY BE LIABLE FOR ANY
17
-- DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
18
-- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
19
-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
20
-- ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21
-- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22
-- THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23
--
24
-- VHDL Units :  status_led
25
-- Description:  Provides a multi-state status LED controller
26
--
27
-- LED Modes:
28 251 jshamlet
-- 0x0 - LED is fully off
29
-- 0x1 - LED is fully on
30
-- 0x2 - LED is dimmed to 50%
31
-- 0x3 - LED Toggles at 1Hz
32
-- 0x4 - LED fades in and out
33 249 jshamlet
--
34
-- Revision History
35
-- Author          Date     Change
36
------------------ -------- ---------------------------------------------------
37
-- Seth Henry      05/24/20 Created as a separate sub-component
38 299 jshamlet
-- Seth Henry      07/13/22 Modified to allow for chaining of toggle signal as
39
--                           well as slowing down the DIM50PCT signal to 1/32
40 249 jshamlet
 
41
library ieee;
42
  use ieee.std_logic_1164.all;
43
  use ieee.std_logic_unsigned.all;
44
  use ieee.std_logic_arith.all;
45
  use ieee.std_logic_misc.all;
46
 
47
entity status_led is
48
generic(
49 299 jshamlet
  Source                     : boolean := TRUE;
50 249 jshamlet
  Reset_Level                : std_logic
51
);
52
port(
53
  Clock                      : in  std_logic;
54
  Reset                      : in  std_logic;
55 299 jshamlet
  --
56
  Toggle_In                  : in  std_logic := '0';
57
  Toggle_Out                 : out std_logic;
58
  --
59 249 jshamlet
  LED_Mode                   : in  std_logic_vector(2 downto 0);
60
  LED_Out                    : out std_logic
61
);
62
end entity;
63
 
64
architecture behave of status_led is
65
 
66 251 jshamlet
  --  hold the supplied integer.
67
  function ceil_log2 (x : in natural) return natural is
68
    variable retval          : natural;
69
  begin
70
    retval                   := 1;
71
    while ((2**retval) - 1) < x loop
72
      retval                 := retval + 1;
73
    end loop;
74
    return retval;
75
  end function;
76 249 jshamlet
 
77 299 jshamlet
  signal Dim50Pct_Ctr        : std_logic_vector(4 downto 0) := "00000";
78
  alias  Dim50Pct_Out        is Dim50Pct_Ctr(4);
79 249 jshamlet
 
80 251 jshamlet
  constant TAP1              : integer := 16;
81
  constant TAP2              : integer := 21;
82
  constant TAP3              : integer := 22;
83
  constant TAP4              : integer := 23;
84
 
85
  constant Init_Seed         : std_logic_vector(23 downto 0) := x"000001";
86
 
87
  signal d0                  : std_logic := '0';
88
  signal LFSR_poly           : std_logic_vector(23 downto 0) := (others => '0');
89
 
90
  signal Cycle_Toggle        : std_logic;
91
 
92 249 jshamlet
  constant TIMER_MSB         : integer range 9 to 20 := 18;
93
 
94 251 jshamlet
  signal Fade_Timer1         : std_logic_vector(TIMER_MSB downto 0) :=
95
                                (others => '0');
96
  signal Fade_Timer2         : std_logic_vector(TIMER_MSB downto 0) :=
97
                                (others => '0');
98
  signal Fade_Out            : std_logic := '0';
99 249 jshamlet
 
100
begin
101
 
102
  Output_FF: process( Clock, Reset )
103
  begin
104
    if( Reset = Reset_Level )then
105
      LED_Out                <= '0';
106
    elsif( rising_edge(Clock) )then
107
      LED_Out                <= '0';
108
      case( LED_Mode )is
109
        when "001" =>
110
          LED_Out            <= '1';
111
        when "010" =>
112
          LED_Out            <= Dim50Pct_Out;
113
        when "011" =>
114 251 jshamlet
          LED_Out            <= Cycle_Toggle;
115 249 jshamlet
        when "100" =>
116
          LED_Out            <= Fade_out;
117
        when others => null;
118
      end case;
119
    end if;
120
  end process;
121
 
122 251 jshamlet
  d0                         <= LFSR_poly(TAP4) xnor LFSR_poly(TAP3) xnor
123
                                LFSR_poly(TAP2) xnor LFSR_poly(TAP1);
124
 
125 299 jshamlet
Source_Mode : if( Source )generate
126
 
127
  Toggle_Out                 <= Cycle_Toggle;
128
 
129
  Toggle_Gen: process( Clock, Reset )
130 249 jshamlet
  begin
131
    if( Reset = Reset_Level )then
132 251 jshamlet
      LFSR_poly              <= Init_Seed;
133
      Cycle_Toggle           <= '0';
134 249 jshamlet
    elsif( rising_edge(Clock) )then
135 251 jshamlet
      LFSR_poly              <= LFSR_poly(22 downto 0) & d0;
136
      if( LFSR_poly = Init_Seed )then
137
        Cycle_Toggle         <= not Cycle_Toggle;
138 249 jshamlet
      end if;
139 299 jshamlet
    end if;
140
  end process;
141 249 jshamlet
 
142 299 jshamlet
end generate;
143
 
144
Sink_Mode : if( not Source )generate
145
 
146
  Toggle_Out                 <= '0';
147
 
148
  Toggle_Gen: process( Clock, Reset )
149
  begin
150
    if( Reset = Reset_Level )then
151
      Cycle_Toggle           <= '0';
152
    elsif( rising_edge(Clock) )then
153
      Cycle_Toggle           <= Toggle_In;
154
    end if;
155
  end process;
156
 
157
end generate;
158
 
159
 
160
  Timer_proc: process( Clock, Reset )
161
  begin
162
    if( Reset = Reset_Level )then
163
      Dim50Pct_Ctr           <= (others => '0');
164
      Fade_Timer1            <= (others => '0');
165
      Fade_Timer2            <= (others => '0');
166
      Fade_out               <= '0';
167
    elsif( rising_edge(Clock) )then
168
      Dim50Pct_Ctr           <= Dim50Pct_Ctr - 1;
169
 
170 249 jshamlet
      Fade_Timer1            <= Fade_Timer1 - 1;
171
      Fade_Timer2            <= Fade_Timer2 - 1;
172
      if( or_reduce(Fade_Timer2) = '0' )then
173
        Fade_Timer2(TIMER_MSB downto TIMER_MSB - 8) <= (others => '1');
174
        Fade_Timer2(TIMER_MSB - 9 downto 0 )        <= (others => '0');
175
      end if;
176
      Fade_out               <= Fade_Timer1(TIMER_MSB) xor
177
                                Fade_Timer2(TIMER_MSB);
178
    end if;
179
  end process;
180
 
181
end architecture;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.