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khays |
#! /bin/sh
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# Embed an SPU ELF executable into a PowerPC object file.
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#
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# Copyright 2006, 2007, 2008 Free Software Foundation, Inc.
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#
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# This file is part of GNU Binutils.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
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# 02110-1301, USA.
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usage ()
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{
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echo "Usage: embedspu [flags] symbol_name input_filename output_filename"
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echo
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echo " input_filename: SPU ELF executable to be embedded"
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echo " output_filename: Resulting PowerPC object file"
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echo " symbol_name: Name of program handle struct to be defined"
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echo " flags: GCC flags defining PowerPC object file format"
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echo " (e.g. -m32 or -m64)"
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exit 1
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}
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program_transform_name=
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mydir=`dirname "$0"`
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find_prog ()
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{
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prog=`echo $1 | sed "$program_transform_name"`
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prog="$mydir/$prog"
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test -x "$prog" && return 0
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prog="$mydir/$1"
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test -x "$prog" && return 0
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prog=`echo $1 | sed "$program_transform_name"`
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which $prog > /dev/null 2> /dev/null && return 0
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return 1
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}
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SYMBOL=
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INFILE=
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OUTFILE=
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FLAGS=
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parse_args ()
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{
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while test -n "$1"; do
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case "$1" in
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-*) FLAGS="${FLAGS} $1" ;;
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*) if test -z "$SYMBOL"; then
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SYMBOL="$1"
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elif test -z "$INFILE"; then
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INFILE="$1"
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elif test -z "$OUTFILE"; then
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OUTFILE="$1"
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else
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echo "Too many arguments!"
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usage
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fi ;;
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esac
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shift
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done
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if test -z "$OUTFILE"; then
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usage
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fi
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if test ! -r "$INFILE"; then
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echo "${INFILE}: File not found"
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usage
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fi
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}
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main ()
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{
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parse_args "$@"
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# Find a powerpc gcc. Support running from a combined tree build.
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if test -x "$mydir/../gcc/xgcc"; then
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CC="$mydir/../gcc/xgcc -B$mydir/../gcc/"
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else
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find_prog gcc
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if test $? -ne 0; then
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echo "Cannot find $prog"
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exit 1
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fi
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CC="$prog"
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fi
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# Find readelf. Any old readelf should do.
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find_prog readelf
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if test $? -ne 0; then
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if which readelf > /dev/null 2> /dev/null; then
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prog=readelf
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else
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echo "Cannot find $prog"
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exit 1
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fi
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fi
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READELF="$prog"
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# Sanity check the input file
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if ! ${READELF} -h ${INFILE} | grep 'Class:.*ELF32' >/dev/null 2>/dev/null \
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|| ! ${READELF} -h ${INFILE} | grep 'Type:.*EXEC' >/dev/null 2>/dev/null \
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|| ! ${READELF} -h ${INFILE} | egrep 'Machine:.*(SPU|17)' >/dev/null 2>/dev/null
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then
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echo "${INFILE}: Does not appear to be an SPU executable"
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exit 1
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fi
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toe=`${READELF} -S ${INFILE} | sed -n -e 's, *\[ *\([0-9]*\)\] *\.toe *[PROGN]*BITS *\([0-9a-f]*\).*,\1 \2,p'`
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toe_addr=`echo $toe | sed -n -e 's,.* ,,p'`
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toe=`echo $toe | sed -n -e 's, .*,,p'`
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has_ea=`${READELF} -S ${INFILE} | sed -n -e 's, *\[ *\([0-9]*\)\] *\._ea *PROGBITS.*,\1,p'`
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# For loaded sections, pick off section number, address, and file offset
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sections=`${READELF} -S ${INFILE} | sed -n -e 's, *\[ *\([0-9]*\)\] *[^ ]* *PROGBITS *\([0-9a-f]*\) *\([0-9a-f]*\).*,\1 \2 \3,p'`
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sections=`echo ${sections}`
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# For relocation sections, pick off file offset and info (points to
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# section where relocs apply)
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relas=`${READELF} -S ${INFILE} | sed -n -e 's, *\[ *[0-9]*\] *[^ ]* *RELA *[0-9a-f]* *0*\([0-9a-f][0-9a-f]*\).* \([0-9a-f][0-9a-f]*\) *[0-9a-f][0-9a-f]*$,\1 \2,p'`
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relas=`echo ${relas}`
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# Build embedded SPU image.
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# 1. The whole SPU ELF file is written to .rodata.speelf
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# 2. Symbols starting with the string "_EAR_" in the SPU ELF image are
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# special. They allow an SPU program to access corresponding symbols
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# (ie. minus the _EAR_ prefix), in the PowerPC program. _EAR_ without
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# a suffix is used to refer to the addrress of the SPU image in
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# PowerPC address space. _EAR_* symbols must all be defined in .toe
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# at 16 byte intervals, or they must be defined in other non-bss
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# sections.
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# Find all _EAR_ symbols in .toe using readelf, sort by address, and
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# write the address of the corresponding PowerPC symbol in a table
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# built in .data.spetoe. For _EAR_ symbols not in .toe, create
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# .reloc commands to relocate their location directly.
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# 3. Look for R_SPU_PPU32 and R_SPU_PPU64 relocations in the SPU ELF image
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# and create .reloc commands for them.
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# 4. Write a struct spe_program_handle to .data.
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# 5. Write a table of _SPUEAR_ symbols.
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${CC} ${FLAGS} -x assembler-with-cpp -nostartfiles -nostdlib \
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-Wa,-mbig -Wa,-noexecstack -Wl,-r -Wl,-x -o ${OUTFILE} - <<EOF
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.section .data.spetoe,"aw",@progbits
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.p2align 7
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__spetoe__:
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`${READELF} -s -W ${INFILE} | grep ' _EAR_' | sort -k 2 | awk \
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'BEGIN { \
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addr = strtonum ("0x" "'${toe_addr:-0}'"); \
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split ("'"${sections}"'", s, " "); \
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for (i = 1; i in s; i += 3) { \
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sec_off[s[i]] = strtonum ("0x" s[i+2]) - strtonum ("0x" s[i+1]); \
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} \
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} \
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$7 == "'${toe}'" && strtonum ("0x" $2) != addr { \
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print "#error Symbol " $8 " not in 16 byte element toe array!"; \
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} \
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$7 == "'${toe}'" { \
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addr = addr + 16; \
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} \
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$7 == "'${toe}'" { \
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print "#ifdef _LP64"; \
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print " .quad " ($8 == "_EAR_" ? "__speelf__" : substr($8, 6)) ", 0"; \
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print "#else"; \
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print " .int 0, " ($8 == "_EAR_" ? "__speelf__" : substr($8, 6)) ", 0, 0"; \
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print "#endif"; \
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} \
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$7 != "'${toe}'" && $7 in sec_off { \
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print "#ifdef _LP64"; \
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print " .reloc __speelf__+" strtonum ("0x" $2) + sec_off[$7] ", R_PPC64_ADDR64, " ($8 == "_EAR_" ? "__speelf__" : substr($8, 6)); \
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print "#else"; \
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print " .reloc __speelf__+" strtonum ("0x" $2) + sec_off[$7] + 4 ", R_PPC_ADDR32, " ($8 == "_EAR_" ? "__speelf__" : substr($8, 6)); \
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print "#endif"; \
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if (!donedef) { print "#define HAS_RELOCS 1"; donedef = 1; }; \
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} \
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$7 != "'${toe}'" && ! $7 in sec_off { \
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print "#error Section not found for " $8; \
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} \
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'`
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`test -z "${relas}" || ${READELF} -r -W ${INFILE} | awk \
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'BEGIN { \
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split ("'"${sections}"'", s, " "); \
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for (i = 1; i in s; i += 3) { \
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sec_off[s[i]] = strtonum ("0x" s[i+2]) - strtonum ("0x" s[i+1]); \
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} \
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split ("'"${relas}"'", s, " "); \
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for (i = 1; i in s; i += 2) { \
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rela[s[i]] = strtonum (s[i+1]); \
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} \
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} \
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/^Relocation section/ { \
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sec = substr($6, 3); \
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} \
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$3 ~ /R_SPU_PPU/ { \
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print "#ifdef _LP64"; \
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print " .reloc __speelf__+" strtonum ("0x" $1) + sec_off[rela[sec]] ", R_PPC64_ADDR" substr($3, 10) ", " ($5 != "" ? $5 "+0x" $7 : "__speelf__ + 0x" $4); \
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print "#else"; \
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print " .reloc __speelf__+" strtonum ("0x" $1) + sec_off[rela[sec]] + (substr($3, 10) == "64" ? 4 : 0)", R_PPC_ADDR32, " ($5 != "" ? $5 "+0x" $7 : "__speelf__ + 0x" $4); \
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print "#endif"; \
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if (!donedef) { print "#define HAS_RELOCS 1"; donedef = 1; }; \
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} \
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$3 ~ /unrecognized:/ { \
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print "#ifdef _LP64"; \
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print " .reloc __speelf__+" strtonum ("0x" $1) + sec_off[rela[sec]] ", R_PPC64_ADDR" ($4 == "f" ? "64" : "32") ", " ($6 != "" ? $6 "+0x" $8 : "__speelf__ + 0x" $5); \
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print "#else"; \
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print " .reloc __speelf__+" strtonum ("0x" $1) + sec_off[rela[sec]] + ($4 == "f" ? 4 : 0)", R_PPC_ADDR32, " ($6 != "" ? $6 "+0x" $8 : "__speelf__ + 0x" $5); \
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print "#endif"; \
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if (!donedef) { print "#define HAS_RELOCS 1"; donedef = 1; }; \
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} \
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'`
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#if ${has_ea:-0}
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.section .data.speelf,"aw",@progbits
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#elif defined (HAS_RELOCS) && (defined (__PIC__) || defined (__PIE__))
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.section .data.rel.ro.speelf,"a",@progbits
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#else
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.section .rodata.speelf,"a",@progbits
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#endif
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.p2align 7
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__speelf__:
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.incbin "${INFILE}"
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.section .data.spehandle,"aw",@progbits
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.globl ${SYMBOL}
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.type ${SYMBOL}, @object
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# fill in a struct spe_program_handle
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#ifdef _LP64
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.p2align 3
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${SYMBOL}:
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.int 24
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.int 0
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.quad __speelf__
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.quad __spetoe__
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#else
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.p2align 2
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${SYMBOL}:
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.int 12
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.int __speelf__
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.int __spetoe__
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#endif
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.size ${SYMBOL}, . - ${SYMBOL}
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`${READELF} -s -W ${INFILE} | grep ' _SPUEAR_' | sort -k 2 | awk \
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'{ \
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print " .globl '${SYMBOL}'_" substr($8, 9); \
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print " .type '${SYMBOL}'_" substr($8, 9) ", @object"; \
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print " .size '${SYMBOL}'_" substr($8, 9) ", 4"; \
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print "'${SYMBOL}'_" substr($8, 9) ":"; \
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print " .int 0x" $2; \
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} \
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'`
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EOF
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}
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main "$@"
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