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[/] [open8_urisc/] [trunk/] [gnu/] [binutils/] [cpu/] [ChangeLog] - Blame information for rev 117

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Line No. Rev Author Line
1 24 khays
2010-10-08  Pierre Muller  
2
 
3
        * frv.opc: #undef DEBUG.
4
 
5
2010-07-03  DJ Delorie  
6
 
7
        * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
8
 
9
2010-02-11  Doug Evans  
10
 
11
        * m32r.cpu (HASH-PREFIX): Delete.
12
        (duhpo, dshpo): New pmacros.
13
        (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
14
        (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
15
        attribute, define with dshpo.
16
        (uimm24): Delete HASH-PREFIX attribute.
17
        * m32r.opc (CGEN_PRINT_NORMAL): Delete.
18
        (print_signed_with_hash_prefix): New function.
19
        (print_unsigned_with_hash_prefix): New function.
20
        * xc16x.cpu (dowh): New pmacro.
21
        (upof16): Define with dowh, specify print handler.
22
        (qbit, qlobit, qhibit): Ditto.
23
        (upag16): Ditto.
24
        * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
25
        (print_with_dot_prefix): New functions.
26
        (print_with_pof_prefix, print_with_pag_prefix): New functions.
27
 
28
2010-01-24  Doug Evans  
29
 
30
        * frv.cpu (floating-point-conversion): Update call to fp conv op.
31
        (floating-point-dual-conversion, ne-floating-point-dual-conversion,
32
        conditional-floating-point-conversion, ne-floating-point-conversion,
33
        float-parallel-mul-add-double-semantics): Ditto.
34
 
35
2010-01-05  Doug Evans  
36
 
37
        * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
38
        (f-dsp-40-u20, f-dsp-40-u24): Ditto.
39
 
40
2010-01-02  Doug Evans  
41
 
42
        * m32c.opc (parse_signed16): Fix typo.
43
 
44
2009-12-11  Nick Clifton  
45
 
46
        * frv.opc: Fix shadowed variable warnings.
47
        * m32c.opc: Fix shadowed variable warnings.
48
 
49
2009-11-14  Doug Evans  
50
 
51
        Must use VOID expression in VOID context.
52
        * xc16x.cpu (mov4): Fix mode of `sequence'.
53
        (mov9, mov10): Ditto.
54
        (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
55
        (callr, callseg, calls, trap, rets, reti): Ditto.
56
        (jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
57
        (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
58
        (exts, exts1, extsr, extsr1, prior): Ditto.
59
 
60
2009-10-23  Doug Evans  
61
 
62
        * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
63
        cgen-ops.h -> cgen/basic-ops.h.
64
 
65
2009-09-25  Alan Modra  
66
 
67
        * m32r.cpu (stb-plus): Typo fix.
68
 
69
2009-09-23  Doug Evans  
70
 
71
        * m32r.cpu (sth-plus): Fix address mode and calculation.
72
        (stb-plus): Ditto.
73
        (clrpsw): Fix mask calculation.
74
        (bset, bclr, btst): Make mode in bit calculation match expression.
75
 
76
        * xc16x.cpu (rtl-version): Set to 0.8.
77
        (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
78
        make uppercase.  Remove unnecessary name-prefix spec.
79
        (grb-names, conditioncode-names, extconditioncode-names): Ditto.
80
        (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
81
        (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
82
        (h-cr): New hardware.
83
        (muls): Comment out parts that won't compile, add fixme.
84
        (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
85
        (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
86
        (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
87
 
88
2009-07-16  Doug Evans  
89
 
90
        * cpu/simplify.inc (*): One line doc strings don't need \n.
91
        (df): Invoke define-full-ifield instead of claiming it's an alias.
92
        (dno): Define.
93
        (dnop): Mark as deprecated.
94
 
95
2009-06-22  Alan Modra  
96
 
97
        * m32c.opc (parse_lab_5_3): Use correct enum.
98
 
99
2009-01-07  Hans-Peter Nilsson  
100
 
101
        * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
102
        (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
103
        (media-arith-sat-semantics): Explicitly sign- or zero-extend
104
        arguments of "operation" to DI using "mode" and the new pmacros.
105
 
106
2009-01-03  Hans-Peter Nilsson  
107
 
108
        * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
109
        of number 2, PID.
110
 
111
2008-12-23  Jon Beniston 
112
 
113
        * lm32.cpu: New file.
114
        * lm32.opc: New file.
115
 
116
2008-01-29  Alan Modra  
117
 
118
        * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
119
        to source.
120
 
121
2007-10-22  Hans-Peter Nilsson  
122
 
123
        * cris.cpu (movs, movu): Use result of extension operation when
124
        updating flags.
125
 
126
2007-07-04  Nick Clifton  
127
 
128
        * cris.cpu: Update copyright notice to refer to GPLv3.
129
        * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
130
        m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
131
        sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
132
        xc16x.opc: Likewise.
133
        * iq2000.cpu: Fix copyright notice to refer to FSF.
134
 
135
2007-04-30  Mark Salter  
136
 
137
        * frv.cpu (spr-names): Support new coprocessor SPR registers.
138
 
139
2007-04-20  Nick Clifton  
140
 
141
        * xc16x.cpu: Restore after accidentally overwriting this file with
142
        xc16x.opc.
143
 
144
2007-03-29  DJ Delorie  
145
 
146
        * m32c.cpu (Imm-8-s4n): Fix print hook.
147
        (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
148
        (arith-jnz-imm4-dst-defn): Make relaxable.
149
        (arith-jnz16-imm4-dst-defn): Fix encodings.
150
 
151
2007-03-20  DJ Delorie  
152
 
153
        * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
154
        mem20): New.
155
        (src16-16-20-An-relative-*): New.
156
        (dst16-*-20-An-relative-*): New.
157
        (dst16-16-16sa-*): New
158
        (dst16-16-16ar-*): New
159
        (dst32-16-16sa-Unprefixed-*): New
160
        (jsri): Fix operands.
161
        (setzx): Fix encoding.
162
 
163
2007-03-08  Alan Modra  
164
 
165
        * m32r.opc: Formatting.
166
 
167
2006-05-22  Nick Clifton  
168
 
169
        * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
170
 
171
2006-04-10  DJ Delorie  
172
 
173
        * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
174
        decides if this function accepts symbolic constants or not.
175
        (parse_signed_bitbase): Likewise.
176
        (parse_unsigned_bitbase8): Pass the new parameter.
177
        (parse_unsigned_bitbase11): Likewise.
178
        (parse_unsigned_bitbase16): Likewise.
179
        (parse_unsigned_bitbase19): Likewise.
180
        (parse_unsigned_bitbase27): Likewise.
181
        (parse_signed_bitbase8): Likewise.
182
        (parse_signed_bitbase11): Likewise.
183
        (parse_signed_bitbase19): Likewise.
184
 
185
2006-03-13  DJ Delorie  
186
 
187
        * m32c.cpu (Bit3-S): New.
188
        (btst:s): New.
189
        * m32c.opc (parse_bit3_S): New.
190
 
191
        * m32c.cpu (decimal-subtraction16-insn): Add second operand.
192
        (btst): Add optional :G suffix for MACH32.
193
        (or.b:S): New.
194
        (pop.w:G): Add optional :G suffix for MACH16.
195
        (push.b.imm): Fix syntax.
196
 
197
2006-03-10  DJ Delorie  
198
 
199
        * m32c.cpu (mul.l): New.
200
        (mulu.l): New.
201
 
202
2006-03-03 Shrirang Khisti 
203
 
204
        * xc16x.opc (parse_hash): Return NULL if the input was parsed or
205
        an error message otherwise.
206
        (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
207
        Fix up comments to correctly describe the functions.
208
 
209
2006-02-24  DJ Delorie  
210
 
211
        * m32c.cpu (RL_TYPE): New attribute, with macros.
212
        (Lab-8-24): Add RELAX.
213
        (unary-insn-defn-g, binary-arith-imm-dst-defn,
214
        binary-arith-imm4-dst-defn): Add 1ADDR attribute.
215
        (binary-arith-src-dst-defn): Add 2ADDR attribute.
216
        (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
217
        jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
218
        attribute.
219
        (jsri16, jsri32): Add 1ADDR attribute.
220
        (jsr32.w, jsr32.a): Add JUMP attribute.
221
 
222
2006-02-17  Shrirang Khisti  
223
            Anil Paranjape   
224
            Shilin Shakti    
225
 
226
        * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
227
        description.
228
        * xc16x.opc: New file containing supporting XC16C routines.
229
 
230
2006-02-10  Nick Clifton  
231
 
232
        * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
233
 
234
2006-01-06  DJ Delorie  
235
 
236
        * m32c.cpu (mov.w:q): Fix mode.
237
        (push32.b.imm): Likewise, for the comment.
238
 
239
2005-12-16  Nathan Sidwell  
240
 
241
        Second part of ms1 to mt renaming.
242
        * mt.cpu (define-arch, define-isa): Set name to mt.
243
        (define-mach): Adjust.
244
        * mt.opc (CGEN_ASM_HASH): Update.
245
        (mt_asm_hash, mt_cgen_insn_supported): Renamed.
246
        (parse_loopsize, parse_imm16): Adjust.
247
 
248
2005-12-13  DJ Delorie  
249
 
250
        * m32c.cpu (jsri): Fix order so register names aren't treated as
251
        symbols.
252
        (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
253
        indexwd, indexws): Fix encodings.
254
 
255
2005-12-12  Nathan Sidwell  
256
 
257
        * mt.cpu: Rename from ms1.cpu.
258
        * mt.opc: Rename from ms1.opc.
259
 
260
2005-12-06  Hans-Peter Nilsson  
261
 
262
        * cris.cpu (simplecris-common-writable-specregs)
263
        (simplecris-common-readable-specregs): Split from
264
        simplecris-common-specregs.  All users changed.
265
        (cris-implemented-writable-specregs-v0)
266
        (cris-implemented-readable-specregs-v0): Similar from
267
        cris-implemented-specregs-v0.
268
        (cris-implemented-writable-specregs-v3)
269
        (cris-implemented-readable-specregs-v3)
270
        (cris-implemented-writable-specregs-v8)
271
        (cris-implemented-readable-specregs-v8)
272
        (cris-implemented-writable-specregs-v10)
273
        (cris-implemented-readable-specregs-v10)
274
        (cris-implemented-writable-specregs-v32)
275
        (cris-implemented-readable-specregs-v32): Similar.
276
        (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
277
        insns and specializations.
278
 
279
2005-11-08  Nathan Sidwell  
280
 
281
        Add ms2
282
        * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
283
        model.
284
        (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
285
        f-cb2incr, f-rc3): New fields.
286
        (LOOP): New instruction.
287
        (JAL-HAZARD): New hazard.
288
        (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
289
        New operands.
290
        (mul, muli, dbnz, iflush): Enable for ms2
291
        (jal, reti): Has JAL-HAZARD.
292
        (ldctxt, ldfb, stfb): Only ms1.
293
        (fbcb): Only ms1,ms1-003.
294
        (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
295
        fbcbincrs, mfbcbincrs): Enable for ms2.
296
        (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
297
        * ms1.opc (parse_loopsize): New.
298
        (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
299
        (print_pcrel): New.
300
 
301
2005-10-28  Dave Brolley  
302
 
303
        Contribute the following change:
304
        2003-09-24  Dave Brolley  
305
 
306
        * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
307
        CGEN_ATTR_VALUE_TYPE.
308
        * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
309
        Use cgen_bitset_intersect_p.
310
 
311
2005-10-27  DJ Delorie  
312
 
313
        * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
314
        (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
315
        arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
316
        imm operand is needed.
317
        (adjnz, sbjnz): Pass the right operands.
318
        (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
319
        unary-insn): Add -g variants for opcodes that need to support :G.
320
        (not.BW:G, push.BW:G): Call it.
321
        (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
322
        stzx16-imm8-imm8-abs16): Fix operand typos.
323
        * m32c.opc (m32c_asm_hash): Support bnCND.
324
        (parse_signed4n, print_signed4n): New.
325
 
326
2005-10-26  DJ Delorie  
327
 
328
        * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
329
        (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
330
        mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
331
        dsp8[sp] is signed.
332
        (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
333
        (mov.BW:S r0,r1): Fix typo r1l->r1.
334
        (tst): Allow :G suffix.
335
        * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
336
 
337
2005-10-26  Kazuhiro Inaoka 
338
 
339
        * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
340
 
341
2005-10-25  DJ Delorie  
342
 
343
        * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
344
        making one a macro of the other.
345
 
346
2005-10-21  DJ Delorie  
347
 
348
        * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
349
        (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
350
        indexld, indexls): .w variants have `1' bit.
351
        (rot32.b): QI, not SI.
352
        (rot32.w): HI, not SI.
353
        (xchg16): HI for .w variant.
354
 
355
2005-10-19  Nick Clifton  
356
 
357
        * m32r.opc (parse_slo16): Fix bad application of previous patch.
358
 
359
2005-10-18  Andreas Schwab  
360
 
361
        * m32r.opc (parse_slo16): Better version of previous patch.
362
 
363
2005-10-14  Kazuhiro Inaoka 
364
 
365
        * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
366
        size.
367
 
368
2005-07-25  DJ Delorie  
369
 
370
        * m32c.opc (parse_unsigned8): Add %dsp8().
371
        (parse_signed8): Add %hi8().
372
        (parse_unsigned16): Add %dsp16().
373
        (parse_signed16): Add %lo16() and %hi16().
374
        (parse_lab_5_3): Make valuep a bfd_vma *.
375
 
376
2005-07-18  Nick Clifton  
377
 
378
        * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
379
        components.
380
        (f-lab32-jmp-s): Fix insertion sequence.
381
        (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
382
        (Dsp-40-s8): Make parameter be signed.
383
        (Dsp-40-s16): Likewise.
384
        (Dsp-48-s8): Likewise.
385
        (Dsp-48-s16): Likewise.
386
        (Imm-13-u3): Likewise. (Despite its name!)
387
        (BitBase16-16-s8): Make the parameter be unsigned.
388
        (BitBase16-8-u11-S): Likewise.
389
        (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
390
        jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
391
        relaxation.
392
 
393
        * m32c.opc: Fix formatting.
394
        Use safe-ctype.h instead of ctype.h
395
        Move duplicated code sequences into a macro.
396
        Fix compile time warnings about signedness mismatches.
397
        Remove dead code.
398
        (parse_lab_5_3): New parser function.
399
 
400
2005-07-16  Jim Blandy  
401
 
402
        * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
403
        to represent isa sets.
404
 
405
2005-07-15  Jim Blandy  
406
 
407
        * m32c.cpu, m32c.opc: Fix copyright.
408
 
409
2005-07-14  Jim Blandy  
410
 
411
        * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
412
 
413
2005-07-14  Alan Modra  
414
 
415
        * ms1.opc (print_dollarhex): Correct format string.
416
 
417
2005-07-06  Alan Modra  
418
 
419
        * iq2000.cpu: Include from binutils cpu dir.
420
 
421
2005-07-05  Nick Clifton  
422
 
423
        * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
424
        unsigned in order to avoid compile time warnings about sign
425
        conflicts.
426
 
427
        * ms1.opc (parse_*): Likewise.
428
        (parse_imm16): Use a "void *" as it is passed both signed and
429
        unsigned arguments.
430
 
431
2005-07-01  Nick Clifton  
432
 
433
        * frv.opc: Update to ISO C90 function declaration style.
434
        * iq2000.opc: Likewise.
435
        * m32r.opc: Likewise.
436
        * sh.opc: Likewise.
437
 
438
2005-06-15  Dave Brolley  
439
 
440
        Contributed by Red Hat.
441
        * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
442
        * ms1.opc: New file.  Written by Stan Cox.
443
 
444
2005-05-10  Nick Clifton  
445
 
446
        * Update the address and phone number of the FSF organization in
447
        the GPL notices in the following files:
448
        cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
449
        m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
450
        sh64-media.cpu, simplify.inc
451
 
452
2005-02-24  Alan Modra  
453
 
454
        * frv.opc (parse_A): Warning fix.
455
 
456
2005-02-23  Nick Clifton  
457
 
458
        * frv.opc: Fixed compile time warnings about differing signed'ness
459
        of pointers passed to functions.
460
        * m32r.opc: Likewise.
461
 
462
2005-02-11  Nick Clifton  
463
 
464
        * iq2000.opc (parse_jtargq10): Change type of valuep argument to
465
        'bfd_vma *' in order avoid compile time warning message.
466
 
467
2005-01-28  Hans-Peter Nilsson  
468
 
469
        * cris.cpu (mstep): Add missing insn.
470
 
471
2005-01-25  Alexandre Oliva  
472
 
473
        2004-11-10  Alexandre Oliva  
474
        * frv.cpu: Add support for TLS annotations in loads and calll.
475
        * frv.opc (parse_symbolic_address): New.
476
        (parse_ldd_annotation): New.
477
        (parse_call_annotation): New.
478
        (parse_ld_annotation): New.
479
        (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
480
        Introduce TLS relocations.
481
        (parse_d12, parse_s12, parse_u12): Likewise.
482
        (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
483
        (parse_call_label, print_at): New.
484
 
485
2004-12-21  Mikael Starvik  
486
 
487
        * cris.cpu (cris-set-mem): Correct integral write semantics.
488
 
489
2004-11-29  Hans-Peter Nilsson  
490
 
491
        * cris.cpu: New file.
492
 
493
2004-11-15  Michael K. Lechner 
494
 
495
        * iq2000.cpu: Added quotes around macro arguments so that they
496
        will work with newer versions of guile.
497
 
498
2004-10-27  Nick Clifton  
499
 
500
        * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
501
        wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
502
        operand.
503
        * iq2000.cpu (dnop index): Rename to _index to avoid complications
504
        with guile.
505
 
506
2004-08-27  Richard Sandiford  
507
 
508
        * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
509
 
510
2004-05-15  Nick Clifton  
511
 
512
        * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
513
 
514
2004-03-30  Kazuhiro Inaoka  
515
 
516
        * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
517
 
518
2004-03-01  Richard Sandiford  
519
 
520
        * frv.cpu (define-arch frv): Add fr450 mach.
521
        (define-mach fr450): New.
522
        (define-model fr450): New.  Add profile units to every fr450 insn.
523
        (define-attr UNIT): Add MDCUTSSI.
524
        (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
525
        (define-attr AUDIO): New boolean.
526
        (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
527
        (f-LRA-null, f-TLBPR-null): New fields.
528
        (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
529
        (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
530
        (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
531
        (LRA-null, TLBPR-null): New macros.
532
        (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
533
        (load-real-address): New macro.
534
        (lrai, lrad, tlbpr): New instructions.
535
        (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
536
        (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
537
        (mdcutssi): Change UNIT attribute to MDCUTSSI.
538
        (media-low-clear-semantics, media-scope-limit-semantics)
539
        (media-quad-limit, media-quad-shift): New macros.
540
        (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
541
        * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
542
        (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
543
        (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
544
        (fr450_unit_mapping): New array.
545
        (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
546
        for new MDCUTSSI unit.
547
        (fr450_check_insn_major_constraints): New function.
548
        (check_insn_major_constraints): Use it.
549
 
550
2004-03-01  Richard Sandiford  
551
 
552
        * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
553
        (scutss): Change unit to I0.
554
        (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
555
        (mqsaths): Fix FR400-MAJOR categorization.
556
        (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
557
        (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
558
        * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
559
        combinations.
560
 
561
2004-03-01  Richard Sandiford  
562
 
563
        * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
564
        (rstb, rsth, rst, rstd, rstq): Delete.
565
        (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
566
 
567
2004-02-23  Nick Clifton  
568
 
569
        * Apply these patches from Renesas:
570
 
571
        2004-02-10  Kazuhiro Inaoka  
572
 
573
        * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
574
        disassembling codes for 0x*2 addresses.
575
 
576
        2003-12-15  Kazuhiro Inaoka  
577
 
578
        * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
579
 
580
        2003-12-03  Kazuhiro Inaoka  
581
 
582
        * cpu/m32r.cpu : Add new model m32r2.
583
        Add new instructions.
584
        Replace occurrances of 'Mitsubishi' with 'Renesas'.
585
        Changed PIPE attr of push from O to OS.
586
        Care for Little-endian of M32R.
587
        * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
588
        Care for Little-endian of M32R.
589
        (parse_slo16): signed extension for value.
590
 
591
2004-02-20  Andrew Cagney  
592
 
593
        * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
594
        Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
595
 
596
        * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
597
        written by Ben Elliston.
598
 
599
2004-01-14  Richard Sandiford  
600
 
601
        * frv.cpu (UNIT): Add IACC.
602
        (iacc-multiply-r-r): Use it.
603
        * frv.opc (fr400_unit_mapping): Add entry for IACC.
604
        (fr500_unit_mapping, fr550_unit_mapping): Likewise.
605
 
606
2004-01-06  Alexandre Oliva  
607
 
608
        2003-12-19  Alexandre Oliva  
609
        * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
610
        cut&paste errors in shifting/truncating numerical operands.
611
        2003-08-08  Alexandre Oliva  
612
        * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
613
        (parse_uslo16): Likewise.
614
        (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
615
        (parse_d12): Parse gotoff12 and gotofffuncdesc12.
616
        (parse_s12): Likewise.
617
        2003-08-04  Alexandre Oliva  
618
        * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
619
        (parse_uslo16): Likewise.
620
        (parse_uhi16): Parse gothi and gotfuncdeschi.
621
        (parse_d12): Parse got12 and gotfuncdesc12.
622
        (parse_s12): Likewise.
623
 
624
2003-10-10  Dave Brolley  
625
 
626
        * frv.cpu (dnpmop): New p-macro.
627
        (GRdoublek): Use dnpmop.
628
        (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
629
        (store-double-r-r): Use (.sym regtype doublek).
630
        (r-store-double): Ditto.
631
        (store-double-r-r-u): Ditto.
632
        (conditional-store-double): Ditto.
633
        (conditional-store-double-u): Ditto.
634
        (store-double-r-simm): Ditto.
635
        (fmovs): Assign to UNIT FMALL.
636
 
637
2003-10-06  Dave Brolley  
638
 
639
        * frv.cpu, frv.opc: Add support for fr550.
640
 
641
2003-09-24  Dave Brolley  
642
 
643
        * frv.cpu (u-commit): New modelling unit for fr500.
644
        (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
645
        (commit-r): Use u-commit model for fr500.
646
        (commit): Ditto.
647
        (conditional-float-binary-op): Take profiling data as an argument.
648
        Update callers.
649
        (ne-float-binary-op): Ditto.
650
 
651
2003-09-19  Michael Snyder  
652
 
653
        * frv.cpu (nldqi): Delete unimplemented instruction.
654
 
655
2003-09-12  Dave Brolley  
656
 
657
        * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
658
        (clear-ne-flag-r): Pass insn profiling in as an argument. Call
659
        frv_ref_SI to get input register referenced for profiling.
660
        (clear-ne-flag-all): Pass insn profiling in as an argument.
661
        (clrgr,clrfr,clrga,clrfa): Add profiling information.
662
 
663
2003-09-11  Michael Snyder  
664
 
665
        * frv.cpu: Typographical corrections.
666
 
667
2003-09-09  Dave Brolley  
668
 
669
        * frv.cpu (media-dual-complex): Change UNIT to FMALL.
670
        (conditional-media-dual-complex, media-quad-complex): Likewise.
671
 
672
2003-09-04  Dave Brolley  
673
 
674
        * frv.cpu (register-transfer): Pass in all attributes in on argument.
675
        Update all callers.
676
        (conditional-register-transfer): Ditto.
677
        (cache-preload): Ditto.
678
        (floating-point-conversion): Ditto.
679
        (floating-point-neg): Ditto.
680
        (float-abs): Ditto.
681
        (float-binary-op-s): Ditto.
682
        (conditional-float-binary-op): Ditto.
683
        (ne-float-binary-op): Ditto.
684
        (float-dual-arith): Ditto.
685
        (ne-float-dual-arith): Ditto.
686
 
687
2003-09-03  Dave Brolley  
688
 
689
        * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
690
        * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
691
        MCLRACC-1.
692
        (A): Removed operand.
693
        (A0,A1): New operands replace operand A.
694
        (mnop): Now a real insn
695
        (mclracc): Removed insn.
696
        (mclracc-0, mclracc-1): New insns replace mclracc.
697
        (all insns): Use new UNIT attributes.
698
 
699
2003-08-21  Nick Clifton  
700
 
701
        * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
702
        and u-media-dual-btoh with output parameter.
703
        (cmbtoh): Add profiling hack.
704
 
705
2003-08-19  Michael Snyder  
706
 
707
        * frv.cpu: Fix typo, Frintkeven -> FRintkeven
708
 
709
2003-06-10  Doug Evans  
710
 
711
        * frv.cpu: Add IDOC attribute.
712
 
713
2003-06-06  Andrew Cagney  
714
 
715
        Contributed by Red Hat.
716
        * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
717
        Stan Cox, and Frank Ch. Eigler.
718
        * iq2000.opc: New file.  Written by Ben Elliston, Frank
719
        Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
720
        * iq2000m.cpu: New file.  Written by Jeff Johnston.
721
        * iq10.cpu: New file.  Written by Jeff Johnston.
722
 
723
2003-06-05  Nick Clifton  
724
 
725
        * frv.cpu (FRintieven): New operand.  An even-numbered only
726
        version of the FRinti operand.
727
        (FRintjeven): Likewise for FRintj.
728
        (FRintkeven): Likewise for FRintk.
729
        (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
730
        media-quad-arith-sat-semantics, media-quad-arith-sat,
731
        conditional-media-quad-arith-sat, mdunpackh,
732
        media-quad-multiply-semantics, media-quad-multiply,
733
        conditional-media-quad-multiply, media-quad-complex-i,
734
        media-quad-multiply-acc-semantics, media-quad-multiply-acc,
735
        conditional-media-quad-multiply-acc, munpackh,
736
        media-quad-multiply-cross-acc-semantics, mdpackh,
737
        media-quad-multiply-cross-acc, mbtoh-semantics,
738
        media-quad-cross-multiply-cross-acc-semantics,
739
        media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
740
        media-quad-cross-multiply-acc-semantics, cmbtoh,
741
        media-quad-cross-multiply-acc, media-quad-complex, mhtob,
742
        media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
743
        cmhtob): Use new operands.
744
        * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
745
        (parse_even_register): New function.
746
 
747
2003-06-03  Nick Clifton  
748
 
749
        * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
750
        immediate value not unsigned.
751
 
752
2003-06-03  Andrew Cagney  
753
 
754
        Contributed by Red Hat.
755
        * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
756
        and Eric Christopher.
757
        * frv.opc: New file.  Written by Catherine Moore, and Dave
758
        Brolley.
759
        * simplify.inc: New file.  Written by Doug Evans.
760
 
761
2003-05-02  Andrew Cagney  
762
 
763
        * New file.
764
 
765
 
766
Local Variables:
767
mode: change-log
768
left-margin: 8
769
fill-column: 74
770
version-control: never
771
End:

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