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; Toshiba MeP AVC2 Coprocessor description. -*- Scheme -*-
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; Copyright 2011 Free Software Foundation, Inc.
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;
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; Contributed by Red Hat Inc;
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;
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; This file is part of the GNU Binutils.
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;
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; This program is free software; you can redistribute it and/or modify
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; it under the terms of the GNU General Public License as published by
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; the Free Software Foundation; either version 3 of the License, or
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; (at your option) any later version.
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;
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; This program is distributed in the hope that it will be useful,
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; but WITHOUT ANY WARRANTY; without even the implied warranty of
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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; GNU General Public License for more details.
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;
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; You should have received a copy of the GNU General Public License
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; along with this program; if not, write to the Free Software
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; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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; MA 02110-1301, USA.
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; This file was customized based upon the output of a2cgen 0.42
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;------------------------------------------------------------------------------
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; MeP-Integrator will redefine the isa pmacros below to allow the bit widths
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; specified below for each ME_MODULE using this coprocessor.
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; This coprocessor requires 16 and 32 bit insns.
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;------------------------------------------------------------------------------
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; begin-isas
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(define-pmacro avc2-core-isa () (ISA ext_core1))
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(define-pmacro avc2-16-isa () (ISA ext_cop1_16))
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(define-pmacro avc2-32-isa () (ISA ext_cop1_32))
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(define-pmacro all-avc2-isas () (ISA ext_core1,ext_cop1_16,ext_cop1_32))
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; end-isas
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(define-pmacro (dncpi xname xcomment xattrs xsyntax xformat xsemantics xtiming)
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(dni xname xcomment (.splice (.unsplice xattrs) avc2-core-isa) xsyntax xformat xsemantics xtiming))
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(define-pmacro (dn16i xname xcomment xattrs xsyntax xformat xsemantics xtiming)
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(dni xname xcomment (.splice (.unsplice xattrs) avc2-16-isa) xsyntax xformat xsemantics xtiming))
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(define-pmacro (dn32i xname xcomment xattrs xsyntax xformat xsemantics xtiming)
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(dni xname xcomment (.splice (.unsplice xattrs) avc2-32-isa) xsyntax xformat xsemantics xtiming))
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; register definitions
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; ---------------------
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; NOTE: This exists solely for the purpose of providing the proper register names for this coprocessor.
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; GDB will use the hardware table generated from this declaration. The operands use h-cr
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; from mep-core.cpu so that SID's semantic trace will be consistent between
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; the core and the coprocessor but use parse/print handlers which reference the hardware table
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; generated from this declarations
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(define-hardware
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(name h-cr-avc2)
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(comment "32-bit coprocessor registers for avc2 coprocessor")
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(attrs VIRTUAL all-avc2-isas)
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(type register SI (32))
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(set (index newval) (c-call VOID "h_cr64_set" index (ext DI newval)))
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(get (index) (trunc SI (c-call DI "h_cr64_get" index)))
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(indices keyword "$c" (.map -reg-pair (.iota 8)))
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)
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; NOTE: This exists solely for the purpose of providing the proper register names for this coprocessor.
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; GDB will use the hardware table generated from this declaration. The operands use h-ccr
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; from mep-core.cpu so that SID's semantic trace will be consistent between
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; the core and the coprocessor but use parse/print handlers which reference the hardware table
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; generated from this declarations
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(define-hardware
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(name h-ccr-avc2)
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(comment "Coprocessor control registers for avc2 coprocessor")
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(attrs VIRTUAL all-avc2-isas)
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(type register SI (64))
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(set (index newval) (c-call VOID "h_ccr_set" index newval))
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(get (index) (c-call SI "h_ccr_get" index))
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(indices keyword ""
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(.splice
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($accl1 5) ($acch1 4) ($accl0 3) ($acch0 2) ($CBCR 1) ($csar 0)
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($cbcr 1)
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(.unsplice (.map -ccr-reg-pair (.iota 6)))
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)
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)
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)
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(dnop avc2copCCR5 "Audio Copro Accumulator" (all-avc2-isas) h-ccr 5)
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(dnop avc2copCCR4 "Audio Copro Accumulator" (all-avc2-isas) h-ccr 4)
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(dnop avc2copCCR3 "Audio Copro Accumulator" (all-avc2-isas) h-ccr 3)
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(dnop avc2copCCR2 "Audio Copro Accumulator" (all-avc2-isas) h-ccr 2)
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(dnop avc2copCCR1 "Audio Copro Branch Condition Register" (all-avc2-isas) h-ccr 1)
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(dnop avc2copCCR0 "Audio Copro Shift-Amount Register" (all-avc2-isas) h-ccr 0)
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; instruction field and operand definitions
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(dnf f-avc2-v3sub4u0 "sub opecode field" (avc2-32-isa) 0 4)
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(dnf f-avc2-v1sub4u0 "sub opecode field" (avc2-16-isa) 0 4)
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(dnf f-avc2-v3Rn "register field" (avc2-32-isa) 4 4)
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(dnop avc2v3Rn "the operand definition" (avc2-32-isa) h-gpr f-avc2-v3Rn)
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(dnf f-avc2-v3CCRn "register field" (avc2-32-isa) 4 4)
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(define-full-operand avc2v3CCRn "the operand definition" (avc2-32-isa (CDATA REGNUM)) h-ccr DFLT f-avc2-v3CCRn ((parse "avc2_ccr") (print "avc2_ccr")) () ())
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(df f-avc2-v3Imm16s4x24e32-hi "split immediate field hi" (avc2-32-isa) 4 8 INT #f #f)
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(df f-avc2-v3Imm16s4x24e32-lo "split immediate field lo" (avc2-32-isa) 24 8 UINT #f #f)
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(define-multi-ifield
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(name f-avc2-v3Imm16s4x24e32)
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(comment "split immediate field")
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(attrs avc2-32-isa)
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(mode INT)
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(subfields f-avc2-v3Imm16s4x24e32-hi f-avc2-v3Imm16s4x24e32-lo)
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(insert (sequence ()
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(set (ifield f-avc2-v3Imm16s4x24e32-hi) (sra INT (ifield f-avc2-v3Imm16s4x24e32) 8))
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(set (ifield f-avc2-v3Imm16s4x24e32-lo) (and (ifield f-avc2-v3Imm16s4x24e32) #xff))))
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(extract (set (ifield f-avc2-v3Imm16s4x24e32)
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(or (sll (ifield f-avc2-v3Imm16s4x24e32-hi) 8) (ifield f-avc2-v3Imm16s4x24e32-lo))))
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)
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(dnop avc2v3Imm16s4x24e32 "the operand definition" (avc2-32-isa) h-sint f-avc2-v3Imm16s4x24e32)
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(dnf f-avc2-v3CRn "register field" (avc2-32-isa) 4 4)
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(define-full-operand avc2v3CRn "the operand definition" (avc2-32-isa) h-cr DFLT f-avc2-v3CRn ((parse "avc2_cr") (print "avc2_cr")) () ())
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(dnf f-avc2-v1CRq "register field" (avc2-16-isa) 4 4)
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(define-full-operand avc2v1CRq "the operand definition" (avc2-16-isa) h-cr DFLT f-avc2-v1CRq ((parse "avc2_cr") (print "avc2_cr")) () ())
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(dnf f-avc2-v1sub4u4 "sub opecode field" (avc2-16-isa) 4 4)
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(dnf f-avc2-c3Rn "register field" (avc2-core-isa) 4 4)
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(dnop avc2c3Rn "the operand definition" (avc2-core-isa) h-gpr f-avc2-c3Rn)
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(dnf f-avc2-c3CCRn "register field" (avc2-core-isa) 4 4)
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(define-full-operand avc2c3CCRn "the operand definition" (avc2-core-isa (CDATA REGNUM)) h-ccr DFLT f-avc2-c3CCRn ((parse "avc2_ccr") (print "avc2_ccr")) () ())
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(df f-avc2-c3Imm16s4x24e32-hi "split immediate field hi" (avc2-core-isa) 4 8 INT #f #f)
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(df f-avc2-c3Imm16s4x24e32-lo "split immediate field lo" (avc2-core-isa) 24 8 UINT #f #f)
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(define-multi-ifield
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(name f-avc2-c3Imm16s4x24e32)
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(comment "split immediate field")
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(attrs avc2-core-isa)
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(mode INT)
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(subfields f-avc2-c3Imm16s4x24e32-hi f-avc2-c3Imm16s4x24e32-lo)
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(insert (sequence ()
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(set (ifield f-avc2-c3Imm16s4x24e32-hi) (sra INT (ifield f-avc2-c3Imm16s4x24e32) 8))
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(set (ifield f-avc2-c3Imm16s4x24e32-lo) (and (ifield f-avc2-c3Imm16s4x24e32) #xff))))
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(extract (set (ifield f-avc2-c3Imm16s4x24e32)
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(or (sll (ifield f-avc2-c3Imm16s4x24e32-hi) 8) (ifield f-avc2-c3Imm16s4x24e32-lo))))
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)
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(dnop avc2c3Imm16s4x24e32 "the operand definition" (avc2-core-isa) h-sint f-avc2-c3Imm16s4x24e32)
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(dnf f-avc2-c3CRn "register field" (avc2-core-isa) 4 4)
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(define-full-operand avc2c3CRn "the operand definition" (avc2-core-isa) h-cr DFLT f-avc2-c3CRn ((parse "avc2_cr") (print "avc2_cr")) () ())
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(dnf f-avc2-c3sub4u4 "sub opecode field" (avc2-core-isa) 4 4)
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(dnf f-avc2-v3Rm "register field" (avc2-32-isa) 8 4)
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(dnop avc2v3Rm "the operand definition" (avc2-32-isa) h-gpr f-avc2-v3Rm)
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(df f-avc2-v1Imm6u8 "immediate field" (avc2-16-isa) 8 6 UINT #f #f)
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(dnop avc2v1Imm6u8 "the operand definition" (avc2-16-isa) h-uint f-avc2-v1Imm6u8)
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(df f-avc2-v1Imm5u8 "immediate field" (avc2-16-isa) 8 5 UINT #f #f)
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(dnop avc2v1Imm5u8 "the operand definition" (avc2-16-isa) h-uint f-avc2-v1Imm5u8)
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(df f-avc2-v1Imm6s8 "immediate field" (avc2-16-isa) 8 6 INT #f #f)
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(dnop avc2v1Imm6s8 "the operand definition" (avc2-16-isa) h-sint f-avc2-v1Imm6s8)
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(df f-avc2-v1Imm8s8 "immediate field" (avc2-16-isa) 8 8 INT #f #f)
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(dnop avc2v1Imm8s8 "the operand definition" (avc2-16-isa) h-sint f-avc2-v1Imm8s8)
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(dnf f-avc2-v1CRp "register field" (avc2-16-isa) 8 4)
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(define-full-operand avc2v1CRp "the operand definition" (avc2-16-isa) h-cr DFLT f-avc2-v1CRp ((parse "avc2_cr") (print "avc2_cr")) () ())
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(dnf f-avc2-v1sub4u8 "sub opecode field" (avc2-16-isa) 8 4)
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(dnf f-avc2-c3Rm "register field" (avc2-core-isa) 8 4)
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(dnop avc2c3Rm "the operand definition" (avc2-core-isa) h-gpr f-avc2-c3Rm)
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(dnf f-avc2-c3sub4u8 "sub opecode field" (avc2-core-isa) 8 4)
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(dnf f-avc2-v3sub4u12 "sub opecode field" (avc2-32-isa) 12 4)
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(dnf f-avc2-v1CRo "register field" (avc2-16-isa) 12 4)
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(define-full-operand avc2v1CRo "the operand definition" (avc2-16-isa) h-cr DFLT f-avc2-v1CRo ((parse "avc2_cr") (print "avc2_cr")) () ())
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(dnf f-avc2-v1sub4u12 "sub opecode field" (avc2-16-isa) 12 4)
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(dnf f-avc2-v1sub3u13 "sub opecode field" (avc2-16-isa) 13 3)
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(dnf f-avc2-v1sub2u14 "sub opecode field" (avc2-16-isa) 14 2)
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(dnf f-avc2-v3sub4u16 "sub opecode field" (avc2-32-isa) 16 4)
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(dnf f-avc2-c3sub4u16 "sub opecode field" (avc2-core-isa) 16 4)
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(dnf f-avc2-v3CRq "register field" (avc2-32-isa) 20 4)
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(define-full-operand avc2v3CRq "the operand definition" (avc2-32-isa) h-cr DFLT f-avc2-v3CRq ((parse "avc2_cr") (print "avc2_cr")) () ())
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(dnf f-avc2-v3sub4u20 "sub opecode field" (avc2-32-isa) 20 4)
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(dnf f-avc2-c3CRq "register field" (avc2-core-isa) 20 4)
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(define-full-operand avc2c3CRq "the operand definition" (avc2-core-isa) h-cr DFLT f-avc2-c3CRq ((parse "avc2_cr") (print "avc2_cr")) () ())
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(dnf f-avc2-c3sub4u20 "sub opecode field" (avc2-core-isa) 20 4)
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(dnf f-avc2-v3sub4u24 "sub opecode field" (avc2-32-isa) 24 4)
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(df f-avc2-c3Imm6u24 "immediate field" (avc2-core-isa) 24 6 UINT #f #f)
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(dnop avc2c3Imm6u24 "the operand definition" (avc2-core-isa) h-uint f-avc2-c3Imm6u24)
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(df f-avc2-c3Imm5u24 "immediate field" (avc2-core-isa) 24 5 UINT #f #f)
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(dnop avc2c3Imm5u24 "the operand definition" (avc2-core-isa) h-uint f-avc2-c3Imm5u24)
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(df f-avc2-c3Imm6s24 "immediate field" (avc2-core-isa) 24 6 INT #f #f)
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(dnop avc2c3Imm6s24 "the operand definition" (avc2-core-isa) h-sint f-avc2-c3Imm6s24)
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(dnf f-avc2-c3CRp "register field" (avc2-core-isa) 24 4)
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(define-full-operand avc2c3CRp "the operand definition" (avc2-core-isa) h-cr DFLT f-avc2-c3CRp ((parse "avc2_cr") (print "avc2_cr")) () ())
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(dnf f-avc2-c3sub4u24 "sub opecode field" (avc2-core-isa) 24 4)
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(dnf f-avc2-v3sub4u28 "sub opecode field" (avc2-32-isa) 28 4)
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(dnf f-avc2-c3CRo "register field" (avc2-core-isa) 28 4)
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(define-full-operand avc2c3CRo "the operand definition" (avc2-core-isa) h-cr DFLT f-avc2-c3CRo ((parse "avc2_cr") (print "avc2_cr")) () ())
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(dnf f-avc2-c3sub4u28 "sub opecode field" (avc2-core-isa) 28 4)
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(dnf f-avc2-c3sub3u29 "sub opecode field" (avc2-core-isa) 29 3)
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(dnf f-avc2-c3sub2u30 "sub opecode field" (avc2-core-isa) 30 2)
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; instruction definitions
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(dncpi cnop_avc2_c3 "cnop" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cnop"))
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"cnop"
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(+ MAJ_15 (f-sub4 7) (f-avc2-c3sub4u28 #x0) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
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(c-call "check_option_cp" pc)
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())
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(dncpi cmov1_avc2_c3 "cmov1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmov1"))
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"cmov $avc2c3CRn,$avc2c3Rm"
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(+ MAJ_15 (f-sub4 7) avc2c3CRn avc2c3Rm (f-avc2-c3sub4u28 #x0) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xf))
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(sequence() (c-call "check_option_cp" pc)
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(set avc2c3CRn avc2c3Rm)
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)
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())
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(dncpi cmov2_avc2_c3 "cmov2" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmov2"))
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"cmov $avc2c3Rm,$avc2c3CRn"
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(+ MAJ_15 (f-sub4 7) avc2c3Rm avc2c3CRn (f-avc2-c3sub4u28 #x1) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xf))
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(sequence() (c-call "check_option_cp" pc)
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(set avc2c3Rm avc2c3CRn)
|
201 |
|
|
)
|
202 |
|
|
())
|
203 |
|
|
(dncpi cmovi_avc2_c3 "cmovi" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmovi"))
|
204 |
|
|
"cmovi $avc2c3CRq,$avc2c3Imm16s4x24e32"
|
205 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3Imm16s4x24e32 (f-avc2-c3sub4u16 #xe))
|
206 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
207 |
|
|
(set avc2c3CRq (ext SI avc2c3Imm16s4x24e32))
|
208 |
|
|
)
|
209 |
|
|
())
|
210 |
|
|
(dncpi cmovc1_avc2_c3 "cmovc1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmovc1"))
|
211 |
|
|
"cmovc $avc2c3CCRn,$avc2c3Rm"
|
212 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CCRn avc2c3Rm (f-avc2-c3sub4u28 #x2) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xf))
|
213 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
214 |
|
|
(set avc2c3CCRn avc2c3Rm)
|
215 |
|
|
)
|
216 |
|
|
())
|
217 |
|
|
(dncpi cmovc2_avc2_c3 "cmovc2" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmovc2"))
|
218 |
|
|
"cmovc $avc2c3Rm,$avc2c3CCRn"
|
219 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3Rm avc2c3CCRn (f-avc2-c3sub4u28 #x3) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xf))
|
220 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
221 |
|
|
(set avc2c3Rm avc2c3CCRn)
|
222 |
|
|
)
|
223 |
|
|
())
|
224 |
|
|
(dncpi cmov_avc2_c3 "cmov" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmov"))
|
225 |
|
|
"cmov $avc2c3CRq,$avc2c3CRp"
|
226 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x3) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
227 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
228 |
|
|
(set avc2c3CRq avc2c3CRp)
|
229 |
|
|
)
|
230 |
|
|
())
|
231 |
|
|
(dncpi cadd3_avc2_c3 "cadd3" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cadd3"))
|
232 |
|
|
"cadd3 $avc2c3CRo,$avc2c3CRq,$avc2c3CRp"
|
233 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRo avc2c3CRq avc2c3CRp (f-avc2-c3sub4u16 #x3) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
234 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
235 |
|
|
(set avc2c3CRo (add avc2c3CRq avc2c3CRp))
|
236 |
|
|
)
|
237 |
|
|
())
|
238 |
|
|
(dncpi caddi_avc2_c3 "caddi" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "caddi"))
|
239 |
|
|
"caddi $avc2c3CRq,$avc2c3Imm6s24"
|
240 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3Imm6s24 (f-avc2-c3sub2u30 #x0) (f-avc2-c3sub4u16 #x1) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
241 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
242 |
|
|
(set avc2c3CRq (add avc2c3CRq (ext SI avc2c3Imm6s24)))
|
243 |
|
|
)
|
244 |
|
|
())
|
245 |
|
|
(dncpi csub_avc2_c3 "csub" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csub"))
|
246 |
|
|
"csub $avc2c3CRq,$avc2c3CRp"
|
247 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x2) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
248 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
249 |
|
|
(set avc2c3CRq (sub avc2c3CRq avc2c3CRp))
|
250 |
|
|
)
|
251 |
|
|
())
|
252 |
|
|
(dncpi cneg_avc2_c3 "cneg" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cneg"))
|
253 |
|
|
"cneg $avc2c3CRq,$avc2c3CRp"
|
254 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x1) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
255 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
256 |
|
|
(set avc2c3CRq (neg avc2c3CRp))
|
257 |
|
|
)
|
258 |
|
|
())
|
259 |
|
|
(dncpi cextb_avc2_c3 "cextb" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cextb"))
|
260 |
|
|
"cextb $avc2c3CRq"
|
261 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #x9) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
262 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
263 |
|
|
(set avc2c3CRq (ext SI (and QI (srl avc2c3CRq 0) #xff)))
|
264 |
|
|
)
|
265 |
|
|
())
|
266 |
|
|
(dncpi cexth_avc2_c3 "cexth" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cexth"))
|
267 |
|
|
"cexth $avc2c3CRq"
|
268 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #x9) (f-avc2-c3sub4u24 #x2) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
269 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
270 |
|
|
(set avc2c3CRq (ext SI (and HI (srl avc2c3CRq 0) #xffff)))
|
271 |
|
|
)
|
272 |
|
|
())
|
273 |
|
|
(dncpi cextub_avc2_c3 "cextub" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cextub"))
|
274 |
|
|
"cextub $avc2c3CRq"
|
275 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #x9) (f-avc2-c3sub4u24 #x8) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
276 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
277 |
|
|
(set avc2c3CRq (zext SI (and QI (srl avc2c3CRq 0) #xff)))
|
278 |
|
|
)
|
279 |
|
|
())
|
280 |
|
|
(dncpi cextuh_avc2_c3 "cextuh" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cextuh"))
|
281 |
|
|
"cextuh $avc2c3CRq"
|
282 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #x9) (f-avc2-c3sub4u24 #xa) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
283 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
284 |
|
|
(set avc2c3CRq (zext SI (and HI (srl avc2c3CRq 0) #xffff)))
|
285 |
|
|
)
|
286 |
|
|
())
|
287 |
|
|
(dncpi cscltz_avc2_c3 "cscltz" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cscltz"))
|
288 |
|
|
"cscltz $avc2c3CRq"
|
289 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #xa) (f-avc2-c3sub4u24 #xa) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
290 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
291 |
|
|
(if (lt (ext SI avc2c3CRq) (ext SI 0)) (set avc2copCCR1 (or (sll (srl avc2copCCR1 1) 1) (srl (sll (zext SI 1) 31) 31)))
|
292 |
|
|
(set avc2copCCR1 (or (sll (srl avc2copCCR1 1) 1) (srl (sll (zext SI 0) 31) 31)))
|
293 |
|
|
)
|
294 |
|
|
)
|
295 |
|
|
())
|
296 |
|
|
(dncpi cldz_avc2_c3 "cldz" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cldz"))
|
297 |
|
|
"cldz $avc2c3CRq,$avc2c3CRp"
|
298 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x0) (f-avc2-c3sub4u16 #x5) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
299 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
300 |
|
|
(if (and avc2c3CRp #x80000000) (set avc2c3CRq 0)
|
301 |
|
|
(if (and avc2c3CRp #x40000000) (set avc2c3CRq 1)
|
302 |
|
|
(if (and avc2c3CRp #x20000000) (set avc2c3CRq 2)
|
303 |
|
|
(if (and avc2c3CRp #x10000000) (set avc2c3CRq 3)
|
304 |
|
|
(if (and avc2c3CRp #x8000000) (set avc2c3CRq 4)
|
305 |
|
|
(if (and avc2c3CRp #x4000000) (set avc2c3CRq 5)
|
306 |
|
|
(if (and avc2c3CRp #x2000000) (set avc2c3CRq 6)
|
307 |
|
|
(if (and avc2c3CRp #x1000000) (set avc2c3CRq 7)
|
308 |
|
|
(if (and avc2c3CRp #x800000) (set avc2c3CRq 8)
|
309 |
|
|
(if (and avc2c3CRp #x400000) (set avc2c3CRq 9)
|
310 |
|
|
(if (and avc2c3CRp #x200000) (set avc2c3CRq 10)
|
311 |
|
|
(if (and avc2c3CRp #x100000) (set avc2c3CRq 11)
|
312 |
|
|
(if (and avc2c3CRp #x80000) (set avc2c3CRq 12)
|
313 |
|
|
(if (and avc2c3CRp #x40000) (set avc2c3CRq 13)
|
314 |
|
|
(if (and avc2c3CRp #x20000) (set avc2c3CRq 14)
|
315 |
|
|
(if (and avc2c3CRp #x10000) (set avc2c3CRq 15)
|
316 |
|
|
(if (and avc2c3CRp #x8000) (set avc2c3CRq 16)
|
317 |
|
|
(if (and avc2c3CRp #x4000) (set avc2c3CRq 17)
|
318 |
|
|
(if (and avc2c3CRp #x2000) (set avc2c3CRq 18)
|
319 |
|
|
(if (and avc2c3CRp #x1000) (set avc2c3CRq 19)
|
320 |
|
|
(if (and avc2c3CRp #x800) (set avc2c3CRq 20)
|
321 |
|
|
(if (and avc2c3CRp #x400) (set avc2c3CRq 21)
|
322 |
|
|
(if (and avc2c3CRp #x200) (set avc2c3CRq 22)
|
323 |
|
|
(if (and avc2c3CRp #x100) (set avc2c3CRq 23)
|
324 |
|
|
(if (and avc2c3CRp #x80) (set avc2c3CRq 24)
|
325 |
|
|
(if (and avc2c3CRp #x40) (set avc2c3CRq 25)
|
326 |
|
|
(if (and avc2c3CRp #x20) (set avc2c3CRq 26)
|
327 |
|
|
(if (and avc2c3CRp #x10) (set avc2c3CRq 27)
|
328 |
|
|
(if (and avc2c3CRp #x8) (set avc2c3CRq 28)
|
329 |
|
|
(if (and avc2c3CRp #x4) (set avc2c3CRq 29)
|
330 |
|
|
(if (and avc2c3CRp #x2) (set avc2c3CRq 30)
|
331 |
|
|
(if (and avc2c3CRp #x1) (set avc2c3CRq 31)
|
332 |
|
|
(set avc2c3CRq 32)
|
333 |
|
|
)
|
334 |
|
|
)
|
335 |
|
|
)
|
336 |
|
|
)
|
337 |
|
|
)
|
338 |
|
|
)
|
339 |
|
|
)
|
340 |
|
|
)
|
341 |
|
|
)
|
342 |
|
|
)
|
343 |
|
|
)
|
344 |
|
|
)
|
345 |
|
|
)
|
346 |
|
|
)
|
347 |
|
|
)
|
348 |
|
|
)
|
349 |
|
|
)
|
350 |
|
|
)
|
351 |
|
|
)
|
352 |
|
|
)
|
353 |
|
|
)
|
354 |
|
|
)
|
355 |
|
|
)
|
356 |
|
|
)
|
357 |
|
|
)
|
358 |
|
|
)
|
359 |
|
|
)
|
360 |
|
|
)
|
361 |
|
|
)
|
362 |
|
|
)
|
363 |
|
|
)
|
364 |
|
|
)
|
365 |
|
|
)
|
366 |
|
|
())
|
367 |
|
|
(dncpi cabs_avc2_c3 "cabs" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cabs"))
|
368 |
|
|
"cabs $avc2c3CRq,$avc2c3CRp"
|
369 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x3) (f-avc2-c3sub4u16 #x5) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
370 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
371 |
|
|
(set avc2c3CRq (abs (ext SI (subword SI (sub avc2c3CRq avc2c3CRp) 1))))
|
372 |
|
|
)
|
373 |
|
|
())
|
374 |
|
|
(dncpi cad1s_avc2_c3 "cad1s" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cad1s"))
|
375 |
|
|
"cad1s $avc2c3CRq,$avc2c3CRp"
|
376 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x1) (f-avc2-c3sub4u16 #x5) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
377 |
|
|
(sequence((SI tmp0)) (c-call "check_option_cp" pc)
|
378 |
|
|
(set tmp0 (subword SI (add avc2c3CRq avc2c3CRp) 1))
|
379 |
|
|
(set avc2c3CRq (sra tmp0 1))
|
380 |
|
|
)
|
381 |
|
|
())
|
382 |
|
|
(dncpi csb1s_avc2_c3 "csb1s" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csb1s"))
|
383 |
|
|
"csb1s $avc2c3CRq,$avc2c3CRp"
|
384 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x2) (f-avc2-c3sub4u16 #x5) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
385 |
|
|
(sequence((SI tmp0)) (c-call "check_option_cp" pc)
|
386 |
|
|
(set tmp0 (subword SI (sub avc2c3CRq avc2c3CRp) 1))
|
387 |
|
|
(set avc2c3CRq (sra tmp0 1))
|
388 |
|
|
)
|
389 |
|
|
())
|
390 |
|
|
(dncpi cmin_avc2_c3 "cmin" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmin"))
|
391 |
|
|
"cmin $avc2c3CRq,$avc2c3CRp"
|
392 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x8) (f-avc2-c3sub4u16 #x5) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
393 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
394 |
|
|
(if (lt (ext SI avc2c3CRq) (ext SI avc2c3CRp)) (set avc2c3CRq avc2c3CRq)
|
395 |
|
|
(set avc2c3CRq avc2c3CRp)
|
396 |
|
|
)
|
397 |
|
|
)
|
398 |
|
|
())
|
399 |
|
|
(dncpi cmax_avc2_c3 "cmax" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmax"))
|
400 |
|
|
"cmax $avc2c3CRq,$avc2c3CRp"
|
401 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x9) (f-avc2-c3sub4u16 #x5) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
402 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
403 |
|
|
(if (gt (ext SI avc2c3CRq) (ext SI avc2c3CRp)) (set avc2c3CRq avc2c3CRq)
|
404 |
|
|
(set avc2c3CRq avc2c3CRp)
|
405 |
|
|
)
|
406 |
|
|
)
|
407 |
|
|
())
|
408 |
|
|
(dncpi cminu_avc2_c3 "cminu" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cminu"))
|
409 |
|
|
"cminu $avc2c3CRq,$avc2c3CRp"
|
410 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xa) (f-avc2-c3sub4u16 #x5) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
411 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
412 |
|
|
(if (ltu (zext SI avc2c3CRq) (zext SI avc2c3CRp)) (set avc2c3CRq avc2c3CRq)
|
413 |
|
|
(set avc2c3CRq avc2c3CRp)
|
414 |
|
|
)
|
415 |
|
|
)
|
416 |
|
|
())
|
417 |
|
|
(dncpi cmaxu_avc2_c3 "cmaxu" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmaxu"))
|
418 |
|
|
"cmaxu $avc2c3CRq,$avc2c3CRp"
|
419 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xb) (f-avc2-c3sub4u16 #x5) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
420 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
421 |
|
|
(if (gtu (zext SI avc2c3CRq) (zext SI avc2c3CRp)) (set avc2c3CRq avc2c3CRq)
|
422 |
|
|
(set avc2c3CRq avc2c3CRp)
|
423 |
|
|
)
|
424 |
|
|
)
|
425 |
|
|
())
|
426 |
|
|
(dncpi cclipi_avc2_c3 "cclipi" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cclipi"))
|
427 |
|
|
"cclipi $avc2c3CRq,$avc2c3Imm5u24"
|
428 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3Imm5u24 (f-avc2-c3sub3u29 #x4) (f-avc2-c3sub4u16 #x5) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
429 |
|
|
(sequence((SI tmp1)(SI tmp0)) (c-call "check_option_cp" pc)
|
430 |
|
|
(if (eq (zext SI avc2c3Imm5u24) (ext SI 0)) (set avc2c3CRq 0)
|
431 |
|
|
(sequence() (set tmp0 (sll 1 (sub avc2c3Imm5u24 1)))
|
432 |
|
|
(set tmp1 (sub tmp0 1))
|
433 |
|
|
(if (gt (ext SI avc2c3CRq) (ext SI tmp1)) (set avc2c3CRq tmp1)
|
434 |
|
|
(if (lt (ext SI avc2c3CRq) (ext SI (neg tmp0))) (set avc2c3CRq (neg tmp0))
|
435 |
|
|
(set avc2c3CRq avc2c3CRq)
|
436 |
|
|
)
|
437 |
|
|
)
|
438 |
|
|
)
|
439 |
|
|
)
|
440 |
|
|
)
|
441 |
|
|
())
|
442 |
|
|
(dncpi cclipiu_avc2_c3 "cclipiu" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cclipiu"))
|
443 |
|
|
"cclipiu $avc2c3CRq,$avc2c3Imm5u24"
|
444 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3Imm5u24 (f-avc2-c3sub3u29 #x5) (f-avc2-c3sub4u16 #x5) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
445 |
|
|
(sequence((SI tmp0)(SI tmp1)) (c-call "check_option_cp" pc)
|
446 |
|
|
(if (eq (zext SI avc2c3Imm5u24) (ext SI 0)) (set avc2c3CRq 0)
|
447 |
|
|
(sequence() (set tmp0 (sub (sll 1 avc2c3Imm5u24) 1))
|
448 |
|
|
(if (gtu (ext SI avc2c3CRq) (zext SI tmp0)) (set avc2c3CRq tmp0)
|
449 |
|
|
(if (lt (ext SI avc2c3CRq) (ext SI 0)) (set avc2c3CRq 0)
|
450 |
|
|
(set avc2c3CRq avc2c3CRq)
|
451 |
|
|
)
|
452 |
|
|
)
|
453 |
|
|
)
|
454 |
|
|
)
|
455 |
|
|
)
|
456 |
|
|
())
|
457 |
|
|
(dncpi cor_avc2_c3 "cor" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cor"))
|
458 |
|
|
"cor $avc2c3CRq,$avc2c3CRp"
|
459 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x4) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
460 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
461 |
|
|
(set avc2c3CRq (or avc2c3CRq avc2c3CRp))
|
462 |
|
|
)
|
463 |
|
|
())
|
464 |
|
|
(dncpi cand_avc2_c3 "cand" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cand"))
|
465 |
|
|
"cand $avc2c3CRq,$avc2c3CRp"
|
466 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x5) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
467 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
468 |
|
|
(set avc2c3CRq (and avc2c3CRq avc2c3CRp))
|
469 |
|
|
)
|
470 |
|
|
())
|
471 |
|
|
(dncpi cxor_avc2_c3 "cxor" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cxor"))
|
472 |
|
|
"cxor $avc2c3CRq,$avc2c3CRp"
|
473 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x6) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
474 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
475 |
|
|
(set avc2c3CRq (xor avc2c3CRq avc2c3CRp))
|
476 |
|
|
)
|
477 |
|
|
())
|
478 |
|
|
(dncpi cnor_avc2_c3 "cnor" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cnor"))
|
479 |
|
|
"cnor $avc2c3CRq,$avc2c3CRp"
|
480 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x7) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
481 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
482 |
|
|
(set avc2c3CRq (inv (or avc2c3CRq avc2c3CRp)))
|
483 |
|
|
)
|
484 |
|
|
())
|
485 |
|
|
(dncpi csra_avc2_c3 "csra" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csra"))
|
486 |
|
|
"csra $avc2c3CRq,$avc2c3CRp"
|
487 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xc) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
488 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
489 |
|
|
(set avc2c3CRq (sra avc2c3CRq (and QI (srl avc2c3CRp 0) #x1f)))
|
490 |
|
|
)
|
491 |
|
|
())
|
492 |
|
|
(dncpi csrl_avc2_c3 "csrl" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csrl"))
|
493 |
|
|
"csrl $avc2c3CRq,$avc2c3CRp"
|
494 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xd) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
495 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
496 |
|
|
(set avc2c3CRq (srl avc2c3CRq (and QI (srl avc2c3CRp 0) #x1f)))
|
497 |
|
|
)
|
498 |
|
|
())
|
499 |
|
|
(dncpi csll_avc2_c3 "csll" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csll"))
|
500 |
|
|
"csll $avc2c3CRq,$avc2c3CRp"
|
501 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xe) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
502 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
503 |
|
|
(set avc2c3CRq (sll avc2c3CRq (and QI (srl avc2c3CRp 0) #x1f)))
|
504 |
|
|
)
|
505 |
|
|
())
|
506 |
|
|
(dncpi csrai_avc2_c3 "csrai" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csrai"))
|
507 |
|
|
"csrai $avc2c3CRq,$avc2c3Imm5u24"
|
508 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3Imm5u24 (f-avc2-c3sub3u29 #x2) (f-avc2-c3sub4u16 #x1) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
509 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
510 |
|
|
(set avc2c3CRq (sra avc2c3CRq avc2c3Imm5u24))
|
511 |
|
|
)
|
512 |
|
|
())
|
513 |
|
|
(dncpi csrli_avc2_c3 "csrli" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csrli"))
|
514 |
|
|
"csrli $avc2c3CRq,$avc2c3Imm5u24"
|
515 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3Imm5u24 (f-avc2-c3sub3u29 #x3) (f-avc2-c3sub4u16 #x1) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
516 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
517 |
|
|
(set avc2c3CRq (srl avc2c3CRq avc2c3Imm5u24))
|
518 |
|
|
)
|
519 |
|
|
())
|
520 |
|
|
(dncpi cslli_avc2_c3 "cslli" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cslli"))
|
521 |
|
|
"cslli $avc2c3CRq,$avc2c3Imm5u24"
|
522 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3Imm5u24 (f-avc2-c3sub3u29 #x6) (f-avc2-c3sub4u16 #x1) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
523 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
524 |
|
|
(set avc2c3CRq (sll avc2c3CRq avc2c3Imm5u24))
|
525 |
|
|
)
|
526 |
|
|
())
|
527 |
|
|
(dncpi cfsft_avc2_c3 "cfsft" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cfsft"))
|
528 |
|
|
"cfsft $avc2c3CRq,$avc2c3CRp"
|
529 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xf) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
530 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
531 |
|
|
(set avc2c3CRq (subword SI (sll (or (sll (zext DI avc2c3CRq) 32) (zext DI avc2c3CRp)) (and QI (srl avc2copCCR0 0) #x3f)) 0))
|
532 |
|
|
)
|
533 |
|
|
())
|
534 |
|
|
(dncpi cfsfta0_avc2_c3 "cfsfta0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cfsfta0"))
|
535 |
|
|
"cfsfta0 $avc2c3CRq"
|
536 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #x7) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u16 #x1) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
537 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
538 |
|
|
(set avc2c3CRq (subword SI (sll (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (and QI (srl avc2copCCR0 0) #x3f)) 0))
|
539 |
|
|
)
|
540 |
|
|
())
|
541 |
|
|
(dncpi cfsfta1_avc2_c3 "cfsfta1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cfsfta1"))
|
542 |
|
|
"cfsfta1 $avc2c3CRq"
|
543 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #xf) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u16 #x1) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
544 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
545 |
|
|
(set avc2c3CRq (subword SI (sll (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (and QI (srl avc2copCCR0 0) #x3f)) 0))
|
546 |
|
|
)
|
547 |
|
|
())
|
548 |
|
|
(dncpi cmula0_avc2_c3 "cmula0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmula0"))
|
549 |
|
|
"cmula0 $avc2c3CRq,$avc2c3CRp"
|
550 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x0) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
551 |
|
|
(sequence((DI concat0)) (c-call "check_option_cp" pc)
|
552 |
|
|
(set concat0 (mul (ext DI avc2c3CRq) (ext DI avc2c3CRp)))
|
553 |
|
|
(set avc2copCCR2 (subword SI concat0 0))
|
554 |
|
|
(set avc2copCCR3 (subword SI concat0 1))
|
555 |
|
|
)
|
556 |
|
|
())
|
557 |
|
|
(dncpi cmulua0_avc2_c3 "cmulua0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmulua0"))
|
558 |
|
|
"cmulua0 $avc2c3CRq,$avc2c3CRp"
|
559 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x1) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
560 |
|
|
(sequence((DI concat1)) (c-call "check_option_cp" pc)
|
561 |
|
|
(set concat1 (mul (zext DI avc2c3CRq) (zext DI avc2c3CRp)))
|
562 |
|
|
(set avc2copCCR2 (subword SI concat1 0))
|
563 |
|
|
(set avc2copCCR3 (subword SI concat1 1))
|
564 |
|
|
)
|
565 |
|
|
())
|
566 |
|
|
(dncpi cnmula0_avc2_c3 "cnmula0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cnmula0"))
|
567 |
|
|
"cnmula0 $avc2c3CRq,$avc2c3CRp"
|
568 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x2) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
569 |
|
|
(sequence((DI concat2)) (c-call "check_option_cp" pc)
|
570 |
|
|
(set concat2 (neg (mul (ext DI avc2c3CRq) (ext DI avc2c3CRp))))
|
571 |
|
|
(set avc2copCCR2 (subword SI concat2 0))
|
572 |
|
|
(set avc2copCCR3 (subword SI concat2 1))
|
573 |
|
|
)
|
574 |
|
|
())
|
575 |
|
|
(dncpi cmada0_avc2_c3 "cmada0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmada0"))
|
576 |
|
|
"cmada0 $avc2c3CRq,$avc2c3CRp"
|
577 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x4) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
578 |
|
|
(sequence((DI concat3)) (c-call "check_option_cp" pc)
|
579 |
|
|
(set concat3 (add (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (ext DI avc2c3CRq) (ext DI avc2c3CRp))))
|
580 |
|
|
(set avc2copCCR2 (subword SI concat3 0))
|
581 |
|
|
(set avc2copCCR3 (subword SI concat3 1))
|
582 |
|
|
)
|
583 |
|
|
())
|
584 |
|
|
(dncpi cmadua0_avc2_c3 "cmadua0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmadua0"))
|
585 |
|
|
"cmadua0 $avc2c3CRq,$avc2c3CRp"
|
586 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x5) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
587 |
|
|
(sequence((DI concat4)) (c-call "check_option_cp" pc)
|
588 |
|
|
(set concat4 (add (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (zext DI avc2c3CRq) (zext DI avc2c3CRp))))
|
589 |
|
|
(set avc2copCCR2 (subword SI concat4 0))
|
590 |
|
|
(set avc2copCCR3 (subword SI concat4 1))
|
591 |
|
|
)
|
592 |
|
|
())
|
593 |
|
|
(dncpi cmsba0_avc2_c3 "cmsba0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmsba0"))
|
594 |
|
|
"cmsba0 $avc2c3CRq,$avc2c3CRp"
|
595 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x6) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
596 |
|
|
(sequence((DI concat5)) (c-call "check_option_cp" pc)
|
597 |
|
|
(set concat5 (sub (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (ext DI avc2c3CRq) (ext DI avc2c3CRp))))
|
598 |
|
|
(set avc2copCCR2 (subword SI concat5 0))
|
599 |
|
|
(set avc2copCCR3 (subword SI concat5 1))
|
600 |
|
|
)
|
601 |
|
|
())
|
602 |
|
|
(dncpi cmsbua0_avc2_c3 "cmsbua0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmsbua0"))
|
603 |
|
|
"cmsbua0 $avc2c3CRq,$avc2c3CRp"
|
604 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x7) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
605 |
|
|
(sequence((DI concat6)) (c-call "check_option_cp" pc)
|
606 |
|
|
(set concat6 (sub (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (zext DI avc2c3CRq) (zext DI avc2c3CRp))))
|
607 |
|
|
(set avc2copCCR2 (subword SI concat6 0))
|
608 |
|
|
(set avc2copCCR3 (subword SI concat6 1))
|
609 |
|
|
)
|
610 |
|
|
())
|
611 |
|
|
(dncpi cmula1_avc2_c3 "cmula1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmula1"))
|
612 |
|
|
"cmula1 $avc2c3CRq,$avc2c3CRp"
|
613 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x8) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
614 |
|
|
(sequence((DI concat7)) (c-call "check_option_cp" pc)
|
615 |
|
|
(set concat7 (mul (ext DI avc2c3CRq) (ext DI avc2c3CRp)))
|
616 |
|
|
(set avc2copCCR4 (subword SI concat7 0))
|
617 |
|
|
(set avc2copCCR5 (subword SI concat7 1))
|
618 |
|
|
)
|
619 |
|
|
())
|
620 |
|
|
(dncpi cmulua1_avc2_c3 "cmulua1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmulua1"))
|
621 |
|
|
"cmulua1 $avc2c3CRq,$avc2c3CRp"
|
622 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x9) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
623 |
|
|
(sequence((DI concat8)) (c-call "check_option_cp" pc)
|
624 |
|
|
(set concat8 (mul (zext DI avc2c3CRq) (zext DI avc2c3CRp)))
|
625 |
|
|
(set avc2copCCR4 (subword SI concat8 0))
|
626 |
|
|
(set avc2copCCR5 (subword SI concat8 1))
|
627 |
|
|
)
|
628 |
|
|
())
|
629 |
|
|
(dncpi cnmula1_avc2_c3 "cnmula1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cnmula1"))
|
630 |
|
|
"cnmula1 $avc2c3CRq,$avc2c3CRp"
|
631 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xa) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
632 |
|
|
(sequence((DI concat9)) (c-call "check_option_cp" pc)
|
633 |
|
|
(set concat9 (neg (mul (ext DI avc2c3CRq) (ext DI avc2c3CRp))))
|
634 |
|
|
(set avc2copCCR4 (subword SI concat9 0))
|
635 |
|
|
(set avc2copCCR5 (subword SI concat9 1))
|
636 |
|
|
)
|
637 |
|
|
())
|
638 |
|
|
(dncpi cmada1_avc2_c3 "cmada1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmada1"))
|
639 |
|
|
"cmada1 $avc2c3CRq,$avc2c3CRp"
|
640 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xc) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
641 |
|
|
(sequence((DI concat10)) (c-call "check_option_cp" pc)
|
642 |
|
|
(set concat10 (add (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (ext DI avc2c3CRq) (ext DI avc2c3CRp))))
|
643 |
|
|
(set avc2copCCR4 (subword SI concat10 0))
|
644 |
|
|
(set avc2copCCR5 (subword SI concat10 1))
|
645 |
|
|
)
|
646 |
|
|
())
|
647 |
|
|
(dncpi cmadua1_avc2_c3 "cmadua1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmadua1"))
|
648 |
|
|
"cmadua1 $avc2c3CRq,$avc2c3CRp"
|
649 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xd) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
650 |
|
|
(sequence((DI concat11)) (c-call "check_option_cp" pc)
|
651 |
|
|
(set concat11 (add (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (zext DI avc2c3CRq) (zext DI avc2c3CRp))))
|
652 |
|
|
(set avc2copCCR4 (subword SI concat11 0))
|
653 |
|
|
(set avc2copCCR5 (subword SI concat11 1))
|
654 |
|
|
)
|
655 |
|
|
())
|
656 |
|
|
(dncpi cmsba1_avc2_c3 "cmsba1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmsba1"))
|
657 |
|
|
"cmsba1 $avc2c3CRq,$avc2c3CRp"
|
658 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xe) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
659 |
|
|
(sequence((DI concat12)) (c-call "check_option_cp" pc)
|
660 |
|
|
(set concat12 (sub (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (ext DI avc2c3CRq) (ext DI avc2c3CRp))))
|
661 |
|
|
(set avc2copCCR4 (subword SI concat12 0))
|
662 |
|
|
(set avc2copCCR5 (subword SI concat12 1))
|
663 |
|
|
)
|
664 |
|
|
())
|
665 |
|
|
(dncpi cmsbua1_avc2_c3 "cmsbua1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmsbua1"))
|
666 |
|
|
"cmsbua1 $avc2c3CRq,$avc2c3CRp"
|
667 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xf) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
668 |
|
|
(sequence((DI concat13)) (c-call "check_option_cp" pc)
|
669 |
|
|
(set concat13 (sub (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (zext DI avc2c3CRq) (zext DI avc2c3CRp))))
|
670 |
|
|
(set avc2copCCR4 (subword SI concat13 0))
|
671 |
|
|
(set avc2copCCR5 (subword SI concat13 1))
|
672 |
|
|
)
|
673 |
|
|
())
|
674 |
|
|
(dncpi xmula0_avc2_c3 "xmula0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmula0"))
|
675 |
|
|
"xmula0 $avc2c3Rn,$avc2c3Rm"
|
676 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #x0) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))
|
677 |
|
|
(sequence((DI concat14)) (c-call "check_option_cp" pc)
|
678 |
|
|
(set concat14 (mul (ext DI avc2c3Rn) (ext DI avc2c3Rm)))
|
679 |
|
|
(set avc2copCCR2 (subword SI concat14 0))
|
680 |
|
|
(set avc2copCCR3 (subword SI concat14 1))
|
681 |
|
|
)
|
682 |
|
|
())
|
683 |
|
|
(dncpi xmulua0_avc2_c3 "xmulua0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmulua0"))
|
684 |
|
|
"xmulua0 $avc2c3Rn,$avc2c3Rm"
|
685 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #x1) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))
|
686 |
|
|
(sequence((DI concat15)) (c-call "check_option_cp" pc)
|
687 |
|
|
(set concat15 (mul (zext DI avc2c3Rn) (zext DI avc2c3Rm)))
|
688 |
|
|
(set avc2copCCR2 (subword SI concat15 0))
|
689 |
|
|
(set avc2copCCR3 (subword SI concat15 1))
|
690 |
|
|
)
|
691 |
|
|
())
|
692 |
|
|
(dncpi xnmula0_avc2_c3 "xnmula0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xnmula0"))
|
693 |
|
|
"xnmula0 $avc2c3Rn,$avc2c3Rm"
|
694 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #x2) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))
|
695 |
|
|
(sequence((DI concat16)) (c-call "check_option_cp" pc)
|
696 |
|
|
(set concat16 (neg (mul (ext DI avc2c3Rn) (ext DI avc2c3Rm))))
|
697 |
|
|
(set avc2copCCR2 (subword SI concat16 0))
|
698 |
|
|
(set avc2copCCR3 (subword SI concat16 1))
|
699 |
|
|
)
|
700 |
|
|
())
|
701 |
|
|
(dncpi xmada0_avc2_c3 "xmada0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmada0"))
|
702 |
|
|
"xmada0 $avc2c3Rn,$avc2c3Rm"
|
703 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #x4) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))
|
704 |
|
|
(sequence((DI concat17)) (c-call "check_option_cp" pc)
|
705 |
|
|
(set concat17 (add (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (ext DI avc2c3Rn) (ext DI avc2c3Rm))))
|
706 |
|
|
(set avc2copCCR2 (subword SI concat17 0))
|
707 |
|
|
(set avc2copCCR3 (subword SI concat17 1))
|
708 |
|
|
)
|
709 |
|
|
())
|
710 |
|
|
(dncpi xmadua0_avc2_c3 "xmadua0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmadua0"))
|
711 |
|
|
"xmadua0 $avc2c3Rn,$avc2c3Rm"
|
712 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #x5) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))
|
713 |
|
|
(sequence((DI concat18)) (c-call "check_option_cp" pc)
|
714 |
|
|
(set concat18 (add (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (zext DI avc2c3Rn) (zext DI avc2c3Rm))))
|
715 |
|
|
(set avc2copCCR2 (subword SI concat18 0))
|
716 |
|
|
(set avc2copCCR3 (subword SI concat18 1))
|
717 |
|
|
)
|
718 |
|
|
())
|
719 |
|
|
(dncpi xmsba0_avc2_c3 "xmsba0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmsba0"))
|
720 |
|
|
"xmsba0 $avc2c3Rn,$avc2c3Rm"
|
721 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #x6) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))
|
722 |
|
|
(sequence((DI concat19)) (c-call "check_option_cp" pc)
|
723 |
|
|
(set concat19 (sub (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (ext DI avc2c3Rn) (ext DI avc2c3Rm))))
|
724 |
|
|
(set avc2copCCR2 (subword SI concat19 0))
|
725 |
|
|
(set avc2copCCR3 (subword SI concat19 1))
|
726 |
|
|
)
|
727 |
|
|
())
|
728 |
|
|
(dncpi xmsbua0_avc2_c3 "xmsbua0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmsbua0"))
|
729 |
|
|
"xmsbua0 $avc2c3Rn,$avc2c3Rm"
|
730 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #x7) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))
|
731 |
|
|
(sequence((DI concat20)) (c-call "check_option_cp" pc)
|
732 |
|
|
(set concat20 (sub (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (zext DI avc2c3Rn) (zext DI avc2c3Rm))))
|
733 |
|
|
(set avc2copCCR2 (subword SI concat20 0))
|
734 |
|
|
(set avc2copCCR3 (subword SI concat20 1))
|
735 |
|
|
)
|
736 |
|
|
())
|
737 |
|
|
(dncpi xmula1_avc2_c3 "xmula1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmula1"))
|
738 |
|
|
"xmula1 $avc2c3Rn,$avc2c3Rm"
|
739 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #x8) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))
|
740 |
|
|
(sequence((DI concat21)) (c-call "check_option_cp" pc)
|
741 |
|
|
(set concat21 (mul (ext DI avc2c3Rn) (ext DI avc2c3Rm)))
|
742 |
|
|
(set avc2copCCR4 (subword SI concat21 0))
|
743 |
|
|
(set avc2copCCR5 (subword SI concat21 1))
|
744 |
|
|
)
|
745 |
|
|
())
|
746 |
|
|
(dncpi xmulua1_avc2_c3 "xmulua1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmulua1"))
|
747 |
|
|
"xmulua1 $avc2c3Rn,$avc2c3Rm"
|
748 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #x9) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))
|
749 |
|
|
(sequence((DI concat22)) (c-call "check_option_cp" pc)
|
750 |
|
|
(set concat22 (mul (zext DI avc2c3Rn) (zext DI avc2c3Rm)))
|
751 |
|
|
(set avc2copCCR4 (subword SI concat22 0))
|
752 |
|
|
(set avc2copCCR5 (subword SI concat22 1))
|
753 |
|
|
)
|
754 |
|
|
())
|
755 |
|
|
(dncpi xnmula1_avc2_c3 "xnmula1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xnmula1"))
|
756 |
|
|
"xnmula1 $avc2c3Rn,$avc2c3Rm"
|
757 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #xa) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))
|
758 |
|
|
(sequence((DI concat23)) (c-call "check_option_cp" pc)
|
759 |
|
|
(set concat23 (neg (mul (ext DI avc2c3Rn) (ext DI avc2c3Rm))))
|
760 |
|
|
(set avc2copCCR4 (subword SI concat23 0))
|
761 |
|
|
(set avc2copCCR5 (subword SI concat23 1))
|
762 |
|
|
)
|
763 |
|
|
())
|
764 |
|
|
(dncpi xmada1_avc2_c3 "xmada1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmada1"))
|
765 |
|
|
"xmada1 $avc2c3Rn,$avc2c3Rm"
|
766 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #xc) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))
|
767 |
|
|
(sequence((DI concat24)) (c-call "check_option_cp" pc)
|
768 |
|
|
(set concat24 (add (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (ext DI avc2c3Rn) (ext DI avc2c3Rm))))
|
769 |
|
|
(set avc2copCCR4 (subword SI concat24 0))
|
770 |
|
|
(set avc2copCCR5 (subword SI concat24 1))
|
771 |
|
|
)
|
772 |
|
|
())
|
773 |
|
|
(dncpi xmadua1_avc2_c3 "xmadua1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmadua1"))
|
774 |
|
|
"xmadua1 $avc2c3Rn,$avc2c3Rm"
|
775 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #xd) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))
|
776 |
|
|
(sequence((DI concat25)) (c-call "check_option_cp" pc)
|
777 |
|
|
(set concat25 (add (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (zext DI avc2c3Rn) (zext DI avc2c3Rm))))
|
778 |
|
|
(set avc2copCCR4 (subword SI concat25 0))
|
779 |
|
|
(set avc2copCCR5 (subword SI concat25 1))
|
780 |
|
|
)
|
781 |
|
|
())
|
782 |
|
|
(dncpi xmsba1_avc2_c3 "xmsba1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmsba1"))
|
783 |
|
|
"xmsba1 $avc2c3Rn,$avc2c3Rm"
|
784 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #xe) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))
|
785 |
|
|
(sequence((DI concat26)) (c-call "check_option_cp" pc)
|
786 |
|
|
(set concat26 (sub (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (ext DI avc2c3Rn) (ext DI avc2c3Rm))))
|
787 |
|
|
(set avc2copCCR4 (subword SI concat26 0))
|
788 |
|
|
(set avc2copCCR5 (subword SI concat26 1))
|
789 |
|
|
)
|
790 |
|
|
())
|
791 |
|
|
(dncpi xmsbua1_avc2_c3 "xmsbua1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmsbua1"))
|
792 |
|
|
"xmsbua1 $avc2c3Rn,$avc2c3Rm"
|
793 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #xf) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))
|
794 |
|
|
(sequence((DI concat27)) (c-call "check_option_cp" pc)
|
795 |
|
|
(set concat27 (sub (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (zext DI avc2c3Rn) (zext DI avc2c3Rm))))
|
796 |
|
|
(set avc2copCCR4 (subword SI concat27 0))
|
797 |
|
|
(set avc2copCCR5 (subword SI concat27 1))
|
798 |
|
|
)
|
799 |
|
|
())
|
800 |
|
|
(dncpi cclipa0_avc2_c3 "cclipa0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cclipa0"))
|
801 |
|
|
"cclipa0 $avc2c3CRq"
|
802 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #x0) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u16 #x6) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
803 |
|
|
(sequence((DI tmp_rslt)(DI min)(DI max)) (c-call "check_option_cp" pc)
|
804 |
|
|
(set max #x000000007FFFFFFF)
|
805 |
|
|
(set min #xFFFFFFFF80000000)
|
806 |
|
|
(if (gt (ext DI (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3))) (ext DI max)) (set tmp_rslt max)
|
807 |
|
|
(if (lt (ext DI (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3))) (ext DI min)) (set tmp_rslt min)
|
808 |
|
|
(set tmp_rslt (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)))
|
809 |
|
|
)
|
810 |
|
|
)
|
811 |
|
|
(set avc2c3CRq (subword SI tmp_rslt 1))
|
812 |
|
|
)
|
813 |
|
|
())
|
814 |
|
|
(dncpi cclipa1_avc2_c3 "cclipa1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cclipa1"))
|
815 |
|
|
"cclipa1 $avc2c3CRq"
|
816 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #x1) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u16 #x6) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
817 |
|
|
(sequence((DI tmp_rslt)(DI min)(DI max)) (c-call "check_option_cp" pc)
|
818 |
|
|
(set max #x000000007FFFFFFF)
|
819 |
|
|
(set min #xFFFFFFFF80000000)
|
820 |
|
|
(if (gt (ext DI (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5))) (ext DI max)) (set tmp_rslt max)
|
821 |
|
|
(if (lt (ext DI (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5))) (ext DI min)) (set tmp_rslt min)
|
822 |
|
|
(set tmp_rslt (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)))
|
823 |
|
|
)
|
824 |
|
|
)
|
825 |
|
|
(set avc2c3CRq (subword SI tmp_rslt 1))
|
826 |
|
|
)
|
827 |
|
|
())
|
828 |
|
|
(dncpi cmvsla0i_avc2_c3 "cmvsla0i" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmvsla0i"))
|
829 |
|
|
"cmvsla0i $avc2c3CRq,$avc2c3Imm6u24"
|
830 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3Imm6u24 (f-avc2-c3sub2u30 #x2) (f-avc2-c3sub4u16 #xb) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
831 |
|
|
(sequence((DI concat28)) (c-call "check_option_cp" pc)
|
832 |
|
|
(set concat28 (sll (ext DI avc2c3CRq) avc2c3Imm6u24))
|
833 |
|
|
(set avc2copCCR2 (subword SI concat28 0))
|
834 |
|
|
(set avc2copCCR3 (subword SI concat28 1))
|
835 |
|
|
)
|
836 |
|
|
())
|
837 |
|
|
(dncpi cmvsra0i_avc2_c3 "cmvsra0i" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmvsra0i"))
|
838 |
|
|
"cmvsra0i $avc2c3CRq,$avc2c3Imm6u24"
|
839 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3Imm6u24 (f-avc2-c3sub2u30 #x0) (f-avc2-c3sub4u16 #xb) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
840 |
|
|
(sequence((DI concat29)) (c-call "check_option_cp" pc)
|
841 |
|
|
(set concat29 (sra (ext DI avc2c3CRq) avc2c3Imm6u24))
|
842 |
|
|
(set avc2copCCR2 (subword SI concat29 0))
|
843 |
|
|
(set avc2copCCR3 (subword SI concat29 1))
|
844 |
|
|
)
|
845 |
|
|
())
|
846 |
|
|
(dncpi cmvsla1i_avc2_c3 "cmvsla1i" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmvsla1i"))
|
847 |
|
|
"cmvsla1i $avc2c3CRq,$avc2c3Imm6u24"
|
848 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3Imm6u24 (f-avc2-c3sub2u30 #x3) (f-avc2-c3sub4u16 #xb) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
849 |
|
|
(sequence((DI concat30)) (c-call "check_option_cp" pc)
|
850 |
|
|
(set concat30 (sll (ext DI avc2c3CRq) avc2c3Imm6u24))
|
851 |
|
|
(set avc2copCCR4 (subword SI concat30 0))
|
852 |
|
|
(set avc2copCCR5 (subword SI concat30 1))
|
853 |
|
|
)
|
854 |
|
|
())
|
855 |
|
|
(dncpi cmvsra1i_avc2_c3 "cmvsra1i" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmvsra1i"))
|
856 |
|
|
"cmvsra1i $avc2c3CRq,$avc2c3Imm6u24"
|
857 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3Imm6u24 (f-avc2-c3sub2u30 #x1) (f-avc2-c3sub4u16 #xb) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
858 |
|
|
(sequence((DI concat31)) (c-call "check_option_cp" pc)
|
859 |
|
|
(set concat31 (sra (ext DI avc2c3CRq) avc2c3Imm6u24))
|
860 |
|
|
(set avc2copCCR4 (subword SI concat31 0))
|
861 |
|
|
(set avc2copCCR5 (subword SI concat31 1))
|
862 |
|
|
)
|
863 |
|
|
())
|
864 |
|
|
(dncpi csraa0i_avc2_c3 "csraa0i" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csraa0i"))
|
865 |
|
|
"csraa0i $avc2c3Imm6u24"
|
866 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3Imm6u24 (f-avc2-c3sub2u30 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #x9) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
867 |
|
|
(sequence((DI concat32)) (c-call "check_option_cp" pc)
|
868 |
|
|
(set concat32 (sra (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) avc2c3Imm6u24))
|
869 |
|
|
(set avc2copCCR2 (subword SI concat32 0))
|
870 |
|
|
(set avc2copCCR3 (subword SI concat32 1))
|
871 |
|
|
)
|
872 |
|
|
())
|
873 |
|
|
(dncpi csraa1i_avc2_c3 "csraa1i" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csraa1i"))
|
874 |
|
|
"csraa1i $avc2c3Imm6u24"
|
875 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3Imm6u24 (f-avc2-c3sub2u30 #x1) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #x9) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
876 |
|
|
(sequence((DI concat33)) (c-call "check_option_cp" pc)
|
877 |
|
|
(set concat33 (sra (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) avc2c3Imm6u24))
|
878 |
|
|
(set avc2copCCR4 (subword SI concat33 0))
|
879 |
|
|
(set avc2copCCR5 (subword SI concat33 1))
|
880 |
|
|
)
|
881 |
|
|
())
|
882 |
|
|
(dncpi csrla0i_avc2_c3 "csrla0i" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csrla0i"))
|
883 |
|
|
"csrla0i $avc2c3Imm6u24"
|
884 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3Imm6u24 (f-avc2-c3sub2u30 #x0) (f-avc2-c3sub4u20 #x1) (f-avc2-c3sub4u16 #x9) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
885 |
|
|
(sequence((DI concat34)) (c-call "check_option_cp" pc)
|
886 |
|
|
(set concat34 (srl (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) avc2c3Imm6u24))
|
887 |
|
|
(set avc2copCCR2 (subword SI concat34 0))
|
888 |
|
|
(set avc2copCCR3 (subword SI concat34 1))
|
889 |
|
|
)
|
890 |
|
|
())
|
891 |
|
|
(dncpi csrla1i_avc2_c3 "csrla1i" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csrla1i"))
|
892 |
|
|
"csrla1i $avc2c3Imm6u24"
|
893 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3Imm6u24 (f-avc2-c3sub2u30 #x1) (f-avc2-c3sub4u20 #x1) (f-avc2-c3sub4u16 #x9) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
894 |
|
|
(sequence((DI concat35)) (c-call "check_option_cp" pc)
|
895 |
|
|
(set concat35 (srl (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) avc2c3Imm6u24))
|
896 |
|
|
(set avc2copCCR4 (subword SI concat35 0))
|
897 |
|
|
(set avc2copCCR5 (subword SI concat35 1))
|
898 |
|
|
)
|
899 |
|
|
())
|
900 |
|
|
(dncpi cslla0i_avc2_c3 "cslla0i" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cslla0i"))
|
901 |
|
|
"cslla0i $avc2c3Imm6u24"
|
902 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3Imm6u24 (f-avc2-c3sub2u30 #x0) (f-avc2-c3sub4u20 #x3) (f-avc2-c3sub4u16 #x9) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
903 |
|
|
(sequence((DI concat36)) (c-call "check_option_cp" pc)
|
904 |
|
|
(set concat36 (sll (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) avc2c3Imm6u24))
|
905 |
|
|
(set avc2copCCR2 (subword SI concat36 0))
|
906 |
|
|
(set avc2copCCR3 (subword SI concat36 1))
|
907 |
|
|
)
|
908 |
|
|
())
|
909 |
|
|
(dncpi cslla1i_avc2_c3 "cslla1i" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cslla1i"))
|
910 |
|
|
"cslla1i $avc2c3Imm6u24"
|
911 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3Imm6u24 (f-avc2-c3sub2u30 #x1) (f-avc2-c3sub4u20 #x3) (f-avc2-c3sub4u16 #x9) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
912 |
|
|
(sequence((DI concat37)) (c-call "check_option_cp" pc)
|
913 |
|
|
(set concat37 (sll (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) avc2c3Imm6u24))
|
914 |
|
|
(set avc2copCCR4 (subword SI concat37 0))
|
915 |
|
|
(set avc2copCCR5 (subword SI concat37 1))
|
916 |
|
|
)
|
917 |
|
|
())
|
918 |
|
|
(dncpi csraa0_avc2_c3 "csraa0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csraa0"))
|
919 |
|
|
"csraa0"
|
920 |
|
|
(+ MAJ_15 (f-sub4 7) (f-avc2-c3sub4u28 #x0) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #xc) (f-avc2-c3sub4u16 #x9) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
921 |
|
|
(sequence((DI concat38)) (c-call "check_option_cp" pc)
|
922 |
|
|
(set concat38 (sra (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) (and QI (srl avc2copCCR0 0) #x3f)))
|
923 |
|
|
(set avc2copCCR2 (subword SI concat38 0))
|
924 |
|
|
(set avc2copCCR3 (subword SI concat38 1))
|
925 |
|
|
)
|
926 |
|
|
())
|
927 |
|
|
(dncpi csraa1_avc2_c3 "csraa1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csraa1"))
|
928 |
|
|
"csraa1"
|
929 |
|
|
(+ MAJ_15 (f-sub4 7) (f-avc2-c3sub4u28 #x1) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #xc) (f-avc2-c3sub4u16 #x9) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
930 |
|
|
(sequence((DI concat39)) (c-call "check_option_cp" pc)
|
931 |
|
|
(set concat39 (sra (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (and QI (srl avc2copCCR0 0) #x3f)))
|
932 |
|
|
(set avc2copCCR4 (subword SI concat39 0))
|
933 |
|
|
(set avc2copCCR5 (subword SI concat39 1))
|
934 |
|
|
)
|
935 |
|
|
())
|
936 |
|
|
(dncpi csrla0_avc2_c3 "csrla0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csrla0"))
|
937 |
|
|
"csrla0"
|
938 |
|
|
(+ MAJ_15 (f-sub4 7) (f-avc2-c3sub4u28 #x0) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #xd) (f-avc2-c3sub4u16 #x9) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
939 |
|
|
(sequence((DI concat40)) (c-call "check_option_cp" pc)
|
940 |
|
|
(set concat40 (srl (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) (and QI (srl avc2copCCR0 0) #x3f)))
|
941 |
|
|
(set avc2copCCR2 (subword SI concat40 0))
|
942 |
|
|
(set avc2copCCR3 (subword SI concat40 1))
|
943 |
|
|
)
|
944 |
|
|
())
|
945 |
|
|
(dncpi csrla1_avc2_c3 "csrla1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csrla1"))
|
946 |
|
|
"csrla1"
|
947 |
|
|
(+ MAJ_15 (f-sub4 7) (f-avc2-c3sub4u28 #x1) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #xd) (f-avc2-c3sub4u16 #x9) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
948 |
|
|
(sequence((DI concat41)) (c-call "check_option_cp" pc)
|
949 |
|
|
(set concat41 (srl (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (and QI (srl avc2copCCR0 0) #x3f)))
|
950 |
|
|
(set avc2copCCR4 (subword SI concat41 0))
|
951 |
|
|
(set avc2copCCR5 (subword SI concat41 1))
|
952 |
|
|
)
|
953 |
|
|
())
|
954 |
|
|
(dncpi cslla0_avc2_c3 "cslla0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cslla0"))
|
955 |
|
|
"cslla0"
|
956 |
|
|
(+ MAJ_15 (f-sub4 7) (f-avc2-c3sub4u28 #x0) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #xf) (f-avc2-c3sub4u16 #x9) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
957 |
|
|
(sequence((DI concat42)) (c-call "check_option_cp" pc)
|
958 |
|
|
(set concat42 (sll (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) (and QI (srl avc2copCCR0 0) #x3f)))
|
959 |
|
|
(set avc2copCCR2 (subword SI concat42 0))
|
960 |
|
|
(set avc2copCCR3 (subword SI concat42 1))
|
961 |
|
|
)
|
962 |
|
|
())
|
963 |
|
|
(dncpi cslla1_avc2_c3 "cslla1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cslla1"))
|
964 |
|
|
"cslla1"
|
965 |
|
|
(+ MAJ_15 (f-sub4 7) (f-avc2-c3sub4u28 #x1) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #xf) (f-avc2-c3sub4u16 #x9) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
966 |
|
|
(sequence((DI concat43)) (c-call "check_option_cp" pc)
|
967 |
|
|
(set concat43 (sll (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (and QI (srl avc2copCCR0 0) #x3f)))
|
968 |
|
|
(set avc2copCCR4 (subword SI concat43 0))
|
969 |
|
|
(set avc2copCCR5 (subword SI concat43 1))
|
970 |
|
|
)
|
971 |
|
|
())
|
972 |
|
|
(dncpi cadda0_avc2_c3 "cadda0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cadda0"))
|
973 |
|
|
"cadda0 $avc2c3CRq"
|
974 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #x0) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u16 #x8) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
975 |
|
|
(sequence((DI concat44)) (c-call "check_option_cp" pc)
|
976 |
|
|
(set concat44 (add (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) (ext DI avc2c3CRq)))
|
977 |
|
|
(set avc2copCCR2 (subword SI concat44 0))
|
978 |
|
|
(set avc2copCCR3 (subword SI concat44 1))
|
979 |
|
|
)
|
980 |
|
|
())
|
981 |
|
|
(dncpi cadda1_avc2_c3 "cadda1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cadda1"))
|
982 |
|
|
"cadda1 $avc2c3CRq"
|
983 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #x1) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u16 #x8) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
984 |
|
|
(sequence((DI concat45)) (c-call "check_option_cp" pc)
|
985 |
|
|
(set concat45 (add (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (ext DI avc2c3CRq)))
|
986 |
|
|
(set avc2copCCR4 (subword SI concat45 0))
|
987 |
|
|
(set avc2copCCR5 (subword SI concat45 1))
|
988 |
|
|
)
|
989 |
|
|
())
|
990 |
|
|
(dncpi csuba0_avc2_c3 "csuba0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csuba0"))
|
991 |
|
|
"csuba0 $avc2c3CRq"
|
992 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #x2) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u16 #x8) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
993 |
|
|
(sequence((DI concat46)) (c-call "check_option_cp" pc)
|
994 |
|
|
(set concat46 (sub (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) (ext DI avc2c3CRq)))
|
995 |
|
|
(set avc2copCCR2 (subword SI concat46 0))
|
996 |
|
|
(set avc2copCCR3 (subword SI concat46 1))
|
997 |
|
|
)
|
998 |
|
|
())
|
999 |
|
|
(dncpi csuba1_avc2_c3 "csuba1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csuba1"))
|
1000 |
|
|
"csuba1 $avc2c3CRq"
|
1001 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #x3) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u16 #x8) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
1002 |
|
|
(sequence((DI concat47)) (c-call "check_option_cp" pc)
|
1003 |
|
|
(set concat47 (sub (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (ext DI avc2c3CRq)))
|
1004 |
|
|
(set avc2copCCR4 (subword SI concat47 0))
|
1005 |
|
|
(set avc2copCCR5 (subword SI concat47 1))
|
1006 |
|
|
)
|
1007 |
|
|
())
|
1008 |
|
|
(dncpi cadd2a0_avc2_c3 "cadd2a0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cadd2a0"))
|
1009 |
|
|
"cadd2a0 $avc2c3CRq,$avc2c3CRp"
|
1010 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x8) (f-avc2-c3sub4u16 #x8) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
1011 |
|
|
(sequence((DI concat48)) (c-call "check_option_cp" pc)
|
1012 |
|
|
(set concat48 (add (ext DI avc2c3CRq) (ext DI avc2c3CRp)))
|
1013 |
|
|
(set avc2copCCR2 (subword SI concat48 0))
|
1014 |
|
|
(set avc2copCCR3 (subword SI concat48 1))
|
1015 |
|
|
)
|
1016 |
|
|
())
|
1017 |
|
|
(dncpi cadd2a1_avc2_c3 "cadd2a1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cadd2a1"))
|
1018 |
|
|
"cadd2a1 $avc2c3CRq,$avc2c3CRp"
|
1019 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x9) (f-avc2-c3sub4u16 #x8) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
1020 |
|
|
(sequence((DI concat49)) (c-call "check_option_cp" pc)
|
1021 |
|
|
(set concat49 (add (ext DI avc2c3CRq) (ext DI avc2c3CRp)))
|
1022 |
|
|
(set avc2copCCR4 (subword SI concat49 0))
|
1023 |
|
|
(set avc2copCCR5 (subword SI concat49 1))
|
1024 |
|
|
)
|
1025 |
|
|
())
|
1026 |
|
|
(dncpi csub2a0_avc2_c3 "csub2a0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csub2a0"))
|
1027 |
|
|
"csub2a0 $avc2c3CRq,$avc2c3CRp"
|
1028 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xa) (f-avc2-c3sub4u16 #x8) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
1029 |
|
|
(sequence((DI concat50)) (c-call "check_option_cp" pc)
|
1030 |
|
|
(set concat50 (sub (ext DI avc2c3CRq) (ext DI avc2c3CRp)))
|
1031 |
|
|
(set avc2copCCR2 (subword SI concat50 0))
|
1032 |
|
|
(set avc2copCCR3 (subword SI concat50 1))
|
1033 |
|
|
)
|
1034 |
|
|
())
|
1035 |
|
|
(dncpi csub2a1_avc2_c3 "csub2a1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csub2a1"))
|
1036 |
|
|
"csub2a1 $avc2c3CRq,$avc2c3CRp"
|
1037 |
|
|
(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xb) (f-avc2-c3sub4u16 #x8) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
1038 |
|
|
(sequence((DI concat51)) (c-call "check_option_cp" pc)
|
1039 |
|
|
(set concat51 (sub (ext DI avc2c3CRq) (ext DI avc2c3CRp)))
|
1040 |
|
|
(set avc2copCCR4 (subword SI concat51 0))
|
1041 |
|
|
(set avc2copCCR5 (subword SI concat51 1))
|
1042 |
|
|
)
|
1043 |
|
|
())
|
1044 |
|
|
(dncpi caddaa0_avc2_c3 "caddaa0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "caddaa0"))
|
1045 |
|
|
"caddaa0"
|
1046 |
|
|
(+ MAJ_15 (f-sub4 7) (f-avc2-c3sub4u28 #x0) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xa) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
1047 |
|
|
(sequence((DI concat52)) (c-call "check_option_cp" pc)
|
1048 |
|
|
(set concat52 (add (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3))))
|
1049 |
|
|
(set avc2copCCR2 (subword SI concat52 0))
|
1050 |
|
|
(set avc2copCCR3 (subword SI concat52 1))
|
1051 |
|
|
)
|
1052 |
|
|
())
|
1053 |
|
|
(dncpi caddaa1_avc2_c3 "caddaa1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "caddaa1"))
|
1054 |
|
|
"caddaa1"
|
1055 |
|
|
(+ MAJ_15 (f-sub4 7) (f-avc2-c3sub4u28 #x1) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xa) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
1056 |
|
|
(sequence((DI concat53)) (c-call "check_option_cp" pc)
|
1057 |
|
|
(set concat53 (add (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3))))
|
1058 |
|
|
(set avc2copCCR4 (subword SI concat53 0))
|
1059 |
|
|
(set avc2copCCR5 (subword SI concat53 1))
|
1060 |
|
|
)
|
1061 |
|
|
())
|
1062 |
|
|
(dncpi csubaa0_avc2_c3 "csubaa0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csubaa0"))
|
1063 |
|
|
"csubaa0"
|
1064 |
|
|
(+ MAJ_15 (f-sub4 7) (f-avc2-c3sub4u28 #x2) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xa) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
1065 |
|
|
(sequence((DI concat54)) (c-call "check_option_cp" pc)
|
1066 |
|
|
(set concat54 (sub (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3))))
|
1067 |
|
|
(set avc2copCCR2 (subword SI concat54 0))
|
1068 |
|
|
(set avc2copCCR3 (subword SI concat54 1))
|
1069 |
|
|
)
|
1070 |
|
|
())
|
1071 |
|
|
(dncpi csubaa1_avc2_c3 "csubaa1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csubaa1"))
|
1072 |
|
|
"csubaa1"
|
1073 |
|
|
(+ MAJ_15 (f-sub4 7) (f-avc2-c3sub4u28 #x3) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xa) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))
|
1074 |
|
|
(sequence((DI concat55)) (c-call "check_option_cp" pc)
|
1075 |
|
|
(set concat55 (sub (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3))))
|
1076 |
|
|
(set avc2copCCR4 (subword SI concat55 0))
|
1077 |
|
|
(set avc2copCCR5 (subword SI concat55 1))
|
1078 |
|
|
)
|
1079 |
|
|
())
|
1080 |
|
|
(dn16i cnop_avc2_v1 "cnop" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cnop"))
|
1081 |
|
|
"cnop"
|
1082 |
|
|
(+ (f-avc2-v1sub4u12 #x0) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u4 #x0) (f-avc2-v1sub4u0 #x0))
|
1083 |
|
|
(c-call "check_option_cp" pc)
|
1084 |
|
|
())
|
1085 |
|
|
(dnmi cpnop16_avc2_v1 "cpnop16"
|
1086 |
|
|
(avc2-16-isa NO-DIS)
|
1087 |
|
|
"cpnop16"
|
1088 |
|
|
(emit cnop_avc2_v1)
|
1089 |
|
|
)
|
1090 |
|
|
(dn16i cmov_avc2_v1 "cmov" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmov"))
|
1091 |
|
|
"cmov $avc2v1CRq,$avc2v1CRp"
|
1092 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x3) (f-avc2-v1sub4u0 #x0))
|
1093 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1094 |
|
|
(set avc2v1CRq avc2v1CRp)
|
1095 |
|
|
)
|
1096 |
|
|
())
|
1097 |
|
|
(dn16i cmovi_avc2_v1 "cmovi" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmovi"))
|
1098 |
|
|
"cmovi $avc2v1CRq,$avc2v1Imm8s8"
|
1099 |
|
|
(+ avc2v1CRq avc2v1Imm8s8 (f-avc2-v1sub4u0 #x2))
|
1100 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1101 |
|
|
(set avc2v1CRq (ext SI avc2v1Imm8s8))
|
1102 |
|
|
)
|
1103 |
|
|
())
|
1104 |
|
|
(dn16i cadd3_avc2_v1 "cadd3" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cadd3"))
|
1105 |
|
|
"cadd3 $avc2v1CRo,$avc2v1CRq,$avc2v1CRp"
|
1106 |
|
|
(+ avc2v1CRo avc2v1CRq avc2v1CRp (f-avc2-v1sub4u0 #x3))
|
1107 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1108 |
|
|
(set avc2v1CRo (add avc2v1CRq avc2v1CRp))
|
1109 |
|
|
)
|
1110 |
|
|
())
|
1111 |
|
|
(dn16i caddi_avc2_v1 "caddi" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "caddi"))
|
1112 |
|
|
"caddi $avc2v1CRq,$avc2v1Imm6s8"
|
1113 |
|
|
(+ avc2v1CRq avc2v1Imm6s8 (f-avc2-v1sub2u14 #x0) (f-avc2-v1sub4u0 #x1))
|
1114 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1115 |
|
|
(set avc2v1CRq (add avc2v1CRq (ext SI avc2v1Imm6s8)))
|
1116 |
|
|
)
|
1117 |
|
|
())
|
1118 |
|
|
(dn16i csub_avc2_v1 "csub" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csub"))
|
1119 |
|
|
"csub $avc2v1CRq,$avc2v1CRp"
|
1120 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x2) (f-avc2-v1sub4u0 #x0))
|
1121 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1122 |
|
|
(set avc2v1CRq (sub avc2v1CRq avc2v1CRp))
|
1123 |
|
|
)
|
1124 |
|
|
())
|
1125 |
|
|
(dn16i cneg_avc2_v1 "cneg" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cneg"))
|
1126 |
|
|
"cneg $avc2v1CRq,$avc2v1CRp"
|
1127 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x1) (f-avc2-v1sub4u0 #x0))
|
1128 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1129 |
|
|
(set avc2v1CRq (neg avc2v1CRp))
|
1130 |
|
|
)
|
1131 |
|
|
())
|
1132 |
|
|
(dn16i cextb_avc2_v1 "cextb" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cextb"))
|
1133 |
|
|
"cextb $avc2v1CRq"
|
1134 |
|
|
(+ avc2v1CRq (f-avc2-v1sub4u12 #x9) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u0 #x0))
|
1135 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1136 |
|
|
(set avc2v1CRq (ext SI (and QI (srl avc2v1CRq 0) #xff)))
|
1137 |
|
|
)
|
1138 |
|
|
())
|
1139 |
|
|
(dn16i cexth_avc2_v1 "cexth" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cexth"))
|
1140 |
|
|
"cexth $avc2v1CRq"
|
1141 |
|
|
(+ avc2v1CRq (f-avc2-v1sub4u12 #x9) (f-avc2-v1sub4u8 #x2) (f-avc2-v1sub4u0 #x0))
|
1142 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1143 |
|
|
(set avc2v1CRq (ext SI (and HI (srl avc2v1CRq 0) #xffff)))
|
1144 |
|
|
)
|
1145 |
|
|
())
|
1146 |
|
|
(dn16i cextub_avc2_v1 "cextub" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cextub"))
|
1147 |
|
|
"cextub $avc2v1CRq"
|
1148 |
|
|
(+ avc2v1CRq (f-avc2-v1sub4u12 #x9) (f-avc2-v1sub4u8 #x8) (f-avc2-v1sub4u0 #x0))
|
1149 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1150 |
|
|
(set avc2v1CRq (zext SI (and QI (srl avc2v1CRq 0) #xff)))
|
1151 |
|
|
)
|
1152 |
|
|
())
|
1153 |
|
|
(dn16i cextuh_avc2_v1 "cextuh" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cextuh"))
|
1154 |
|
|
"cextuh $avc2v1CRq"
|
1155 |
|
|
(+ avc2v1CRq (f-avc2-v1sub4u12 #x9) (f-avc2-v1sub4u8 #xa) (f-avc2-v1sub4u0 #x0))
|
1156 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1157 |
|
|
(set avc2v1CRq (zext SI (and HI (srl avc2v1CRq 0) #xffff)))
|
1158 |
|
|
)
|
1159 |
|
|
())
|
1160 |
|
|
(dn16i cscltz_avc2_v1 "cscltz" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cscltz"))
|
1161 |
|
|
"cscltz $avc2v1CRq"
|
1162 |
|
|
(+ avc2v1CRq (f-avc2-v1sub4u12 #xa) (f-avc2-v1sub4u8 #xa) (f-avc2-v1sub4u0 #x0))
|
1163 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1164 |
|
|
(if (lt (ext SI avc2v1CRq) (ext SI 0)) (set avc2copCCR1 (or (sll (srl avc2copCCR1 1) 1) (srl (sll (zext SI 1) 31) 31)))
|
1165 |
|
|
(set avc2copCCR1 (or (sll (srl avc2copCCR1 1) 1) (srl (sll (zext SI 0) 31) 31)))
|
1166 |
|
|
)
|
1167 |
|
|
)
|
1168 |
|
|
())
|
1169 |
|
|
(dn16i cldz_avc2_v1 "cldz" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cldz"))
|
1170 |
|
|
"cldz $avc2v1CRq,$avc2v1CRp"
|
1171 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x0) (f-avc2-v1sub4u0 #x5))
|
1172 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1173 |
|
|
(if (and avc2v1CRp #x80000000) (set avc2v1CRq 0)
|
1174 |
|
|
(if (and avc2v1CRp #x40000000) (set avc2v1CRq 1)
|
1175 |
|
|
(if (and avc2v1CRp #x20000000) (set avc2v1CRq 2)
|
1176 |
|
|
(if (and avc2v1CRp #x10000000) (set avc2v1CRq 3)
|
1177 |
|
|
(if (and avc2v1CRp #x8000000) (set avc2v1CRq 4)
|
1178 |
|
|
(if (and avc2v1CRp #x4000000) (set avc2v1CRq 5)
|
1179 |
|
|
(if (and avc2v1CRp #x2000000) (set avc2v1CRq 6)
|
1180 |
|
|
(if (and avc2v1CRp #x1000000) (set avc2v1CRq 7)
|
1181 |
|
|
(if (and avc2v1CRp #x800000) (set avc2v1CRq 8)
|
1182 |
|
|
(if (and avc2v1CRp #x400000) (set avc2v1CRq 9)
|
1183 |
|
|
(if (and avc2v1CRp #x200000) (set avc2v1CRq 10)
|
1184 |
|
|
(if (and avc2v1CRp #x100000) (set avc2v1CRq 11)
|
1185 |
|
|
(if (and avc2v1CRp #x80000) (set avc2v1CRq 12)
|
1186 |
|
|
(if (and avc2v1CRp #x40000) (set avc2v1CRq 13)
|
1187 |
|
|
(if (and avc2v1CRp #x20000) (set avc2v1CRq 14)
|
1188 |
|
|
(if (and avc2v1CRp #x10000) (set avc2v1CRq 15)
|
1189 |
|
|
(if (and avc2v1CRp #x8000) (set avc2v1CRq 16)
|
1190 |
|
|
(if (and avc2v1CRp #x4000) (set avc2v1CRq 17)
|
1191 |
|
|
(if (and avc2v1CRp #x2000) (set avc2v1CRq 18)
|
1192 |
|
|
(if (and avc2v1CRp #x1000) (set avc2v1CRq 19)
|
1193 |
|
|
(if (and avc2v1CRp #x800) (set avc2v1CRq 20)
|
1194 |
|
|
(if (and avc2v1CRp #x400) (set avc2v1CRq 21)
|
1195 |
|
|
(if (and avc2v1CRp #x200) (set avc2v1CRq 22)
|
1196 |
|
|
(if (and avc2v1CRp #x100) (set avc2v1CRq 23)
|
1197 |
|
|
(if (and avc2v1CRp #x80) (set avc2v1CRq 24)
|
1198 |
|
|
(if (and avc2v1CRp #x40) (set avc2v1CRq 25)
|
1199 |
|
|
(if (and avc2v1CRp #x20) (set avc2v1CRq 26)
|
1200 |
|
|
(if (and avc2v1CRp #x10) (set avc2v1CRq 27)
|
1201 |
|
|
(if (and avc2v1CRp #x8) (set avc2v1CRq 28)
|
1202 |
|
|
(if (and avc2v1CRp #x4) (set avc2v1CRq 29)
|
1203 |
|
|
(if (and avc2v1CRp #x2) (set avc2v1CRq 30)
|
1204 |
|
|
(if (and avc2v1CRp #x1) (set avc2v1CRq 31)
|
1205 |
|
|
(set avc2v1CRq 32)
|
1206 |
|
|
)
|
1207 |
|
|
)
|
1208 |
|
|
)
|
1209 |
|
|
)
|
1210 |
|
|
)
|
1211 |
|
|
)
|
1212 |
|
|
)
|
1213 |
|
|
)
|
1214 |
|
|
)
|
1215 |
|
|
)
|
1216 |
|
|
)
|
1217 |
|
|
)
|
1218 |
|
|
)
|
1219 |
|
|
)
|
1220 |
|
|
)
|
1221 |
|
|
)
|
1222 |
|
|
)
|
1223 |
|
|
)
|
1224 |
|
|
)
|
1225 |
|
|
)
|
1226 |
|
|
)
|
1227 |
|
|
)
|
1228 |
|
|
)
|
1229 |
|
|
)
|
1230 |
|
|
)
|
1231 |
|
|
)
|
1232 |
|
|
)
|
1233 |
|
|
)
|
1234 |
|
|
)
|
1235 |
|
|
)
|
1236 |
|
|
)
|
1237 |
|
|
)
|
1238 |
|
|
)
|
1239 |
|
|
())
|
1240 |
|
|
(dn16i cabs_avc2_v1 "cabs" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cabs"))
|
1241 |
|
|
"cabs $avc2v1CRq,$avc2v1CRp"
|
1242 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x3) (f-avc2-v1sub4u0 #x5))
|
1243 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1244 |
|
|
(set avc2v1CRq (abs (ext SI (subword SI (sub avc2v1CRq avc2v1CRp) 1))))
|
1245 |
|
|
)
|
1246 |
|
|
())
|
1247 |
|
|
(dn16i cad1s_avc2_v1 "cad1s" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cad1s"))
|
1248 |
|
|
"cad1s $avc2v1CRq,$avc2v1CRp"
|
1249 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x1) (f-avc2-v1sub4u0 #x5))
|
1250 |
|
|
(sequence((SI tmp0)) (c-call "check_option_cp" pc)
|
1251 |
|
|
(set tmp0 (subword SI (add avc2v1CRq avc2v1CRp) 1))
|
1252 |
|
|
(set avc2v1CRq (sra tmp0 1))
|
1253 |
|
|
)
|
1254 |
|
|
())
|
1255 |
|
|
(dn16i csb1s_avc2_v1 "csb1s" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csb1s"))
|
1256 |
|
|
"csb1s $avc2v1CRq,$avc2v1CRp"
|
1257 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x2) (f-avc2-v1sub4u0 #x5))
|
1258 |
|
|
(sequence((SI tmp0)) (c-call "check_option_cp" pc)
|
1259 |
|
|
(set tmp0 (subword SI (sub avc2v1CRq avc2v1CRp) 1))
|
1260 |
|
|
(set avc2v1CRq (sra tmp0 1))
|
1261 |
|
|
)
|
1262 |
|
|
())
|
1263 |
|
|
(dn16i cmin_avc2_v1 "cmin" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmin"))
|
1264 |
|
|
"cmin $avc2v1CRq,$avc2v1CRp"
|
1265 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x8) (f-avc2-v1sub4u0 #x5))
|
1266 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1267 |
|
|
(if (lt (ext SI avc2v1CRq) (ext SI avc2v1CRp)) (set avc2v1CRq avc2v1CRq)
|
1268 |
|
|
(set avc2v1CRq avc2v1CRp)
|
1269 |
|
|
)
|
1270 |
|
|
)
|
1271 |
|
|
())
|
1272 |
|
|
(dn16i cmax_avc2_v1 "cmax" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmax"))
|
1273 |
|
|
"cmax $avc2v1CRq,$avc2v1CRp"
|
1274 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x9) (f-avc2-v1sub4u0 #x5))
|
1275 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1276 |
|
|
(if (gt (ext SI avc2v1CRq) (ext SI avc2v1CRp)) (set avc2v1CRq avc2v1CRq)
|
1277 |
|
|
(set avc2v1CRq avc2v1CRp)
|
1278 |
|
|
)
|
1279 |
|
|
)
|
1280 |
|
|
())
|
1281 |
|
|
(dn16i cminu_avc2_v1 "cminu" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cminu"))
|
1282 |
|
|
"cminu $avc2v1CRq,$avc2v1CRp"
|
1283 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xa) (f-avc2-v1sub4u0 #x5))
|
1284 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1285 |
|
|
(if (ltu (zext SI avc2v1CRq) (zext SI avc2v1CRp)) (set avc2v1CRq avc2v1CRq)
|
1286 |
|
|
(set avc2v1CRq avc2v1CRp)
|
1287 |
|
|
)
|
1288 |
|
|
)
|
1289 |
|
|
())
|
1290 |
|
|
(dn16i cmaxu_avc2_v1 "cmaxu" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmaxu"))
|
1291 |
|
|
"cmaxu $avc2v1CRq,$avc2v1CRp"
|
1292 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xb) (f-avc2-v1sub4u0 #x5))
|
1293 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1294 |
|
|
(if (gtu (zext SI avc2v1CRq) (zext SI avc2v1CRp)) (set avc2v1CRq avc2v1CRq)
|
1295 |
|
|
(set avc2v1CRq avc2v1CRp)
|
1296 |
|
|
)
|
1297 |
|
|
)
|
1298 |
|
|
())
|
1299 |
|
|
(dn16i cclipi_avc2_v1 "cclipi" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cclipi"))
|
1300 |
|
|
"cclipi $avc2v1CRq,$avc2v1Imm5u8"
|
1301 |
|
|
(+ avc2v1CRq avc2v1Imm5u8 (f-avc2-v1sub3u13 #x4) (f-avc2-v1sub4u0 #x5))
|
1302 |
|
|
(sequence((SI tmp1)(SI tmp0)) (c-call "check_option_cp" pc)
|
1303 |
|
|
(if (eq (zext SI avc2v1Imm5u8) (ext SI 0)) (set avc2v1CRq 0)
|
1304 |
|
|
(sequence() (set tmp0 (sll 1 (sub avc2v1Imm5u8 1)))
|
1305 |
|
|
(set tmp1 (sub tmp0 1))
|
1306 |
|
|
(if (gt (ext SI avc2v1CRq) (ext SI tmp1)) (set avc2v1CRq tmp1)
|
1307 |
|
|
(if (lt (ext SI avc2v1CRq) (ext SI (neg tmp0))) (set avc2v1CRq (neg tmp0))
|
1308 |
|
|
(set avc2v1CRq avc2v1CRq)
|
1309 |
|
|
)
|
1310 |
|
|
)
|
1311 |
|
|
)
|
1312 |
|
|
)
|
1313 |
|
|
)
|
1314 |
|
|
())
|
1315 |
|
|
(dn16i cclipiu_avc2_v1 "cclipiu" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cclipiu"))
|
1316 |
|
|
"cclipiu $avc2v1CRq,$avc2v1Imm5u8"
|
1317 |
|
|
(+ avc2v1CRq avc2v1Imm5u8 (f-avc2-v1sub3u13 #x5) (f-avc2-v1sub4u0 #x5))
|
1318 |
|
|
(sequence((SI tmp1)(SI tmp0)) (c-call "check_option_cp" pc)
|
1319 |
|
|
(if (eq (zext SI avc2v1Imm5u8) (ext SI 0)) (set avc2v1CRq 0)
|
1320 |
|
|
(sequence() (set tmp0 (sub (sll 1 avc2v1Imm5u8) 1))
|
1321 |
|
|
(if (gtu (ext SI avc2v1CRq) (zext SI tmp0)) (set avc2v1CRq tmp0)
|
1322 |
|
|
(if (lt (ext SI avc2v1CRq) (ext SI 0)) (set avc2v1CRq 0)
|
1323 |
|
|
(set avc2v1CRq avc2v1CRq)
|
1324 |
|
|
)
|
1325 |
|
|
)
|
1326 |
|
|
)
|
1327 |
|
|
)
|
1328 |
|
|
)
|
1329 |
|
|
())
|
1330 |
|
|
(dn16i cor_avc2_v1 "cor" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cor"))
|
1331 |
|
|
"cor $avc2v1CRq,$avc2v1CRp"
|
1332 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x4) (f-avc2-v1sub4u0 #x0))
|
1333 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1334 |
|
|
(set avc2v1CRq (or avc2v1CRq avc2v1CRp))
|
1335 |
|
|
)
|
1336 |
|
|
())
|
1337 |
|
|
(dn16i cand_avc2_v1 "cand" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cand"))
|
1338 |
|
|
"cand $avc2v1CRq,$avc2v1CRp"
|
1339 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x5) (f-avc2-v1sub4u0 #x0))
|
1340 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1341 |
|
|
(set avc2v1CRq (and avc2v1CRq avc2v1CRp))
|
1342 |
|
|
)
|
1343 |
|
|
())
|
1344 |
|
|
(dn16i cxor_avc2_v1 "cxor" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cxor"))
|
1345 |
|
|
"cxor $avc2v1CRq,$avc2v1CRp"
|
1346 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x6) (f-avc2-v1sub4u0 #x0))
|
1347 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1348 |
|
|
(set avc2v1CRq (xor avc2v1CRq avc2v1CRp))
|
1349 |
|
|
)
|
1350 |
|
|
())
|
1351 |
|
|
(dn16i cnor_avc2_v1 "cnor" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cnor"))
|
1352 |
|
|
"cnor $avc2v1CRq,$avc2v1CRp"
|
1353 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x7) (f-avc2-v1sub4u0 #x0))
|
1354 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1355 |
|
|
(set avc2v1CRq (inv (or avc2v1CRq avc2v1CRp)))
|
1356 |
|
|
)
|
1357 |
|
|
())
|
1358 |
|
|
(dn16i csra_avc2_v1 "csra" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csra"))
|
1359 |
|
|
"csra $avc2v1CRq,$avc2v1CRp"
|
1360 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xc) (f-avc2-v1sub4u0 #x0))
|
1361 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1362 |
|
|
(set avc2v1CRq (sra avc2v1CRq (and QI (srl avc2v1CRp 0) #x1f)))
|
1363 |
|
|
)
|
1364 |
|
|
())
|
1365 |
|
|
(dn16i csrl_avc2_v1 "csrl" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csrl"))
|
1366 |
|
|
"csrl $avc2v1CRq,$avc2v1CRp"
|
1367 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xd) (f-avc2-v1sub4u0 #x0))
|
1368 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1369 |
|
|
(set avc2v1CRq (srl avc2v1CRq (and QI (srl avc2v1CRp 0) #x1f)))
|
1370 |
|
|
)
|
1371 |
|
|
())
|
1372 |
|
|
(dn16i csll_avc2_v1 "csll" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csll"))
|
1373 |
|
|
"csll $avc2v1CRq,$avc2v1CRp"
|
1374 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xe) (f-avc2-v1sub4u0 #x0))
|
1375 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1376 |
|
|
(set avc2v1CRq (sll avc2v1CRq (and QI (srl avc2v1CRp 0) #x1f)))
|
1377 |
|
|
)
|
1378 |
|
|
())
|
1379 |
|
|
(dn16i csrai_avc2_v1 "csrai" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csrai"))
|
1380 |
|
|
"csrai $avc2v1CRq,$avc2v1Imm5u8"
|
1381 |
|
|
(+ avc2v1CRq avc2v1Imm5u8 (f-avc2-v1sub3u13 #x2) (f-avc2-v1sub4u0 #x1))
|
1382 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1383 |
|
|
(set avc2v1CRq (sra avc2v1CRq avc2v1Imm5u8))
|
1384 |
|
|
)
|
1385 |
|
|
())
|
1386 |
|
|
(dn16i csrli_avc2_v1 "csrli" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csrli"))
|
1387 |
|
|
"csrli $avc2v1CRq,$avc2v1Imm5u8"
|
1388 |
|
|
(+ avc2v1CRq avc2v1Imm5u8 (f-avc2-v1sub3u13 #x3) (f-avc2-v1sub4u0 #x1))
|
1389 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1390 |
|
|
(set avc2v1CRq (srl avc2v1CRq avc2v1Imm5u8))
|
1391 |
|
|
)
|
1392 |
|
|
())
|
1393 |
|
|
(dn16i cslli_avc2_v1 "cslli" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cslli"))
|
1394 |
|
|
"cslli $avc2v1CRq,$avc2v1Imm5u8"
|
1395 |
|
|
(+ avc2v1CRq avc2v1Imm5u8 (f-avc2-v1sub3u13 #x6) (f-avc2-v1sub4u0 #x1))
|
1396 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1397 |
|
|
(set avc2v1CRq (sll avc2v1CRq avc2v1Imm5u8))
|
1398 |
|
|
)
|
1399 |
|
|
())
|
1400 |
|
|
(dn16i cfsft_avc2_v1 "cfsft" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cfsft"))
|
1401 |
|
|
"cfsft $avc2v1CRq,$avc2v1CRp"
|
1402 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xf) (f-avc2-v1sub4u0 #x0))
|
1403 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1404 |
|
|
(set avc2v1CRq (subword SI (sll (or (sll (zext DI (zext SI avc2v1CRq)) 32) (zext DI avc2v1CRp)) (and QI (srl avc2copCCR0 0) #x3f)) 0))
|
1405 |
|
|
)
|
1406 |
|
|
())
|
1407 |
|
|
(dn16i cfsfta0_avc2_v1 "cfsfta0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cfsfta0"))
|
1408 |
|
|
"cfsfta0 $avc2v1CRq"
|
1409 |
|
|
(+ avc2v1CRq (f-avc2-v1sub4u12 #x7) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u0 #x1))
|
1410 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1411 |
|
|
(set avc2v1CRq (subword SI (sll (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (and QI (srl avc2copCCR0 0) #x3f)) 0))
|
1412 |
|
|
)
|
1413 |
|
|
())
|
1414 |
|
|
(dn16i cfsfta1_avc2_v1 "cfsfta1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cfsfta1"))
|
1415 |
|
|
"cfsfta1 $avc2v1CRq"
|
1416 |
|
|
(+ avc2v1CRq (f-avc2-v1sub4u12 #xf) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u0 #x1))
|
1417 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1418 |
|
|
(set avc2v1CRq (subword SI (sll (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (and QI (srl avc2copCCR0 0) #x3f)) 0))
|
1419 |
|
|
)
|
1420 |
|
|
())
|
1421 |
|
|
(dn16i cmula0_avc2_v1 "cmula0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmula0"))
|
1422 |
|
|
"cmula0 $avc2v1CRq,$avc2v1CRp"
|
1423 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x0) (f-avc2-v1sub4u0 #x4))
|
1424 |
|
|
(sequence((DI concat56)) (c-call "check_option_cp" pc)
|
1425 |
|
|
(set concat56 (mul (ext DI avc2v1CRq) (ext DI avc2v1CRp)))
|
1426 |
|
|
(set avc2copCCR2 (subword SI concat56 0))
|
1427 |
|
|
(set avc2copCCR3 (subword SI concat56 1))
|
1428 |
|
|
)
|
1429 |
|
|
())
|
1430 |
|
|
(dn16i cmulua0_avc2_v1 "cmulua0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmulua0"))
|
1431 |
|
|
"cmulua0 $avc2v1CRq,$avc2v1CRp"
|
1432 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x1) (f-avc2-v1sub4u0 #x4))
|
1433 |
|
|
(sequence((DI concat57)) (c-call "check_option_cp" pc)
|
1434 |
|
|
(set concat57 (mul (zext DI avc2v1CRq) (zext DI avc2v1CRp)))
|
1435 |
|
|
(set avc2copCCR2 (subword SI concat57 0))
|
1436 |
|
|
(set avc2copCCR3 (subword SI concat57 1))
|
1437 |
|
|
)
|
1438 |
|
|
())
|
1439 |
|
|
(dn16i cnmula0_avc2_v1 "cnmula0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cnmula0"))
|
1440 |
|
|
"cnmula0 $avc2v1CRq,$avc2v1CRp"
|
1441 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x2) (f-avc2-v1sub4u0 #x4))
|
1442 |
|
|
(sequence((DI concat58)) (c-call "check_option_cp" pc)
|
1443 |
|
|
(set concat58 (neg (mul (ext DI avc2v1CRq) (ext DI avc2v1CRp))))
|
1444 |
|
|
(set avc2copCCR2 (subword SI concat58 0))
|
1445 |
|
|
(set avc2copCCR3 (subword SI concat58 1))
|
1446 |
|
|
)
|
1447 |
|
|
())
|
1448 |
|
|
(dn16i cmada0_avc2_v1 "cmada0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmada0"))
|
1449 |
|
|
"cmada0 $avc2v1CRq,$avc2v1CRp"
|
1450 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x4) (f-avc2-v1sub4u0 #x4))
|
1451 |
|
|
(sequence((DI concat59)) (c-call "check_option_cp" pc)
|
1452 |
|
|
(set concat59 (add (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (ext DI avc2v1CRq) (ext DI avc2v1CRp))))
|
1453 |
|
|
(set avc2copCCR2 (subword SI concat59 0))
|
1454 |
|
|
(set avc2copCCR3 (subword SI concat59 1))
|
1455 |
|
|
)
|
1456 |
|
|
())
|
1457 |
|
|
(dn16i cmadua0_avc2_v1 "cmadua0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmadua0"))
|
1458 |
|
|
"cmadua0 $avc2v1CRq,$avc2v1CRp"
|
1459 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x5) (f-avc2-v1sub4u0 #x4))
|
1460 |
|
|
(sequence((DI concat60)) (c-call "check_option_cp" pc)
|
1461 |
|
|
(set concat60 (add (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (zext DI avc2v1CRq) (zext DI avc2v1CRp))))
|
1462 |
|
|
(set avc2copCCR2 (subword SI concat60 0))
|
1463 |
|
|
(set avc2copCCR3 (subword SI concat60 1))
|
1464 |
|
|
)
|
1465 |
|
|
())
|
1466 |
|
|
(dn16i cmsba0_avc2_v1 "cmsba0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmsba0"))
|
1467 |
|
|
"cmsba0 $avc2v1CRq,$avc2v1CRp"
|
1468 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x6) (f-avc2-v1sub4u0 #x4))
|
1469 |
|
|
(sequence((DI concat61)) (c-call "check_option_cp" pc)
|
1470 |
|
|
(set concat61 (sub (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (ext DI avc2v1CRq) (ext DI avc2v1CRp))))
|
1471 |
|
|
(set avc2copCCR2 (subword SI concat61 0))
|
1472 |
|
|
(set avc2copCCR3 (subword SI concat61 1))
|
1473 |
|
|
)
|
1474 |
|
|
())
|
1475 |
|
|
(dn16i cmsbua0_avc2_v1 "cmsbua0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmsbua0"))
|
1476 |
|
|
"cmsbua0 $avc2v1CRq,$avc2v1CRp"
|
1477 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x7) (f-avc2-v1sub4u0 #x4))
|
1478 |
|
|
(sequence((DI concat62)) (c-call "check_option_cp" pc)
|
1479 |
|
|
(set concat62 (sub (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (zext DI avc2v1CRq) (zext DI avc2v1CRp))))
|
1480 |
|
|
(set avc2copCCR2 (subword SI concat62 0))
|
1481 |
|
|
(set avc2copCCR3 (subword SI concat62 1))
|
1482 |
|
|
)
|
1483 |
|
|
())
|
1484 |
|
|
(dn16i cmula1_avc2_v1 "cmula1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmula1"))
|
1485 |
|
|
"cmula1 $avc2v1CRq,$avc2v1CRp"
|
1486 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x8) (f-avc2-v1sub4u0 #x4))
|
1487 |
|
|
(sequence((DI concat63)) (c-call "check_option_cp" pc)
|
1488 |
|
|
(set concat63 (mul (ext DI avc2v1CRq) (ext DI avc2v1CRp)))
|
1489 |
|
|
(set avc2copCCR4 (subword SI concat63 0))
|
1490 |
|
|
(set avc2copCCR5 (subword SI concat63 1))
|
1491 |
|
|
)
|
1492 |
|
|
())
|
1493 |
|
|
(dn16i cmulua1_avc2_v1 "cmulua1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmulua1"))
|
1494 |
|
|
"cmulua1 $avc2v1CRq,$avc2v1CRp"
|
1495 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x9) (f-avc2-v1sub4u0 #x4))
|
1496 |
|
|
(sequence((DI concat64)) (c-call "check_option_cp" pc)
|
1497 |
|
|
(set concat64 (mul (zext DI avc2v1CRq) (zext DI avc2v1CRp)))
|
1498 |
|
|
(set avc2copCCR4 (subword SI concat64 0))
|
1499 |
|
|
(set avc2copCCR5 (subword SI concat64 1))
|
1500 |
|
|
)
|
1501 |
|
|
())
|
1502 |
|
|
(dn16i cnmula1_avc2_v1 "cnmula1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cnmula1"))
|
1503 |
|
|
"cnmula1 $avc2v1CRq,$avc2v1CRp"
|
1504 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xa) (f-avc2-v1sub4u0 #x4))
|
1505 |
|
|
(sequence((DI concat65)) (c-call "check_option_cp" pc)
|
1506 |
|
|
(set concat65 (neg (mul (ext DI avc2v1CRq) (ext DI avc2v1CRp))))
|
1507 |
|
|
(set avc2copCCR4 (subword SI concat65 0))
|
1508 |
|
|
(set avc2copCCR5 (subword SI concat65 1))
|
1509 |
|
|
)
|
1510 |
|
|
())
|
1511 |
|
|
(dn16i cmada1_avc2_v1 "cmada1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmada1"))
|
1512 |
|
|
"cmada1 $avc2v1CRq,$avc2v1CRp"
|
1513 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xc) (f-avc2-v1sub4u0 #x4))
|
1514 |
|
|
(sequence((DI concat66)) (c-call "check_option_cp" pc)
|
1515 |
|
|
(set concat66 (add (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (ext DI avc2v1CRq) (ext DI avc2v1CRp))))
|
1516 |
|
|
(set avc2copCCR4 (subword SI concat66 0))
|
1517 |
|
|
(set avc2copCCR5 (subword SI concat66 1))
|
1518 |
|
|
)
|
1519 |
|
|
())
|
1520 |
|
|
(dn16i cmadua1_avc2_v1 "cmadua1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmadua1"))
|
1521 |
|
|
"cmadua1 $avc2v1CRq,$avc2v1CRp"
|
1522 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xd) (f-avc2-v1sub4u0 #x4))
|
1523 |
|
|
(sequence((DI concat67)) (c-call "check_option_cp" pc)
|
1524 |
|
|
(set concat67 (add (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (zext DI avc2v1CRq) (zext DI avc2v1CRp))))
|
1525 |
|
|
(set avc2copCCR4 (subword SI concat67 0))
|
1526 |
|
|
(set avc2copCCR5 (subword SI concat67 1))
|
1527 |
|
|
)
|
1528 |
|
|
())
|
1529 |
|
|
(dn16i cmsba1_avc2_v1 "cmsba1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmsba1"))
|
1530 |
|
|
"cmsba1 $avc2v1CRq,$avc2v1CRp"
|
1531 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xe) (f-avc2-v1sub4u0 #x4))
|
1532 |
|
|
(sequence((DI concat68)) (c-call "check_option_cp" pc)
|
1533 |
|
|
(set concat68 (sub (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (ext DI avc2v1CRq) (ext DI avc2v1CRp))))
|
1534 |
|
|
(set avc2copCCR4 (subword SI concat68 0))
|
1535 |
|
|
(set avc2copCCR5 (subword SI concat68 1))
|
1536 |
|
|
)
|
1537 |
|
|
())
|
1538 |
|
|
(dn16i cmsbua1_avc2_v1 "cmsbua1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmsbua1"))
|
1539 |
|
|
"cmsbua1 $avc2v1CRq,$avc2v1CRp"
|
1540 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xf) (f-avc2-v1sub4u0 #x4))
|
1541 |
|
|
(sequence((DI concat69)) (c-call "check_option_cp" pc)
|
1542 |
|
|
(set concat69 (sub (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (zext DI avc2v1CRq) (zext DI avc2v1CRp))))
|
1543 |
|
|
(set avc2copCCR4 (subword SI concat69 0))
|
1544 |
|
|
(set avc2copCCR5 (subword SI concat69 1))
|
1545 |
|
|
)
|
1546 |
|
|
())
|
1547 |
|
|
(dn16i cclipa0_avc2_v1 "cclipa0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cclipa0"))
|
1548 |
|
|
"cclipa0 $avc2v1CRq"
|
1549 |
|
|
(+ avc2v1CRq (f-avc2-v1sub4u12 #x0) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u0 #x6))
|
1550 |
|
|
(sequence((DI tmp_rslt)(DI min)(DI max)) (c-call "check_option_cp" pc)
|
1551 |
|
|
(set max #x000000007FFFFFFF)
|
1552 |
|
|
(set min #xFFFFFFFF80000000)
|
1553 |
|
|
(if (gt (ext DI (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3))) (ext DI max)) (set tmp_rslt max)
|
1554 |
|
|
(if (lt (ext DI (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3))) (ext DI min)) (set tmp_rslt min)
|
1555 |
|
|
(set tmp_rslt (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)))
|
1556 |
|
|
)
|
1557 |
|
|
)
|
1558 |
|
|
(set avc2v1CRq (subword SI tmp_rslt 1))
|
1559 |
|
|
)
|
1560 |
|
|
())
|
1561 |
|
|
(dn16i cclipa1_avc2_v1 "cclipa1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cclipa1"))
|
1562 |
|
|
"cclipa1 $avc2v1CRq"
|
1563 |
|
|
(+ avc2v1CRq (f-avc2-v1sub4u12 #x1) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u0 #x6))
|
1564 |
|
|
(sequence((DI tmp_rslt)(DI min)(DI max)) (c-call "check_option_cp" pc)
|
1565 |
|
|
(set max #x000000007FFFFFFF)
|
1566 |
|
|
(set min #xFFFFFFFF80000000)
|
1567 |
|
|
(if (gt (ext DI (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5))) (ext DI max)) (set tmp_rslt max)
|
1568 |
|
|
(if (lt (ext DI (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5))) (ext DI min)) (set tmp_rslt min)
|
1569 |
|
|
(set tmp_rslt (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)))
|
1570 |
|
|
)
|
1571 |
|
|
)
|
1572 |
|
|
(set avc2v1CRq (subword SI tmp_rslt 1))
|
1573 |
|
|
)
|
1574 |
|
|
())
|
1575 |
|
|
(dn16i cmvsla0i_avc2_v1 "cmvsla0i" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmvsla0i"))
|
1576 |
|
|
"cmvsla0i $avc2v1CRq,$avc2v1Imm6u8"
|
1577 |
|
|
(+ avc2v1CRq avc2v1Imm6u8 (f-avc2-v1sub2u14 #x2) (f-avc2-v1sub4u0 #xb))
|
1578 |
|
|
(sequence((DI concat70)) (c-call "check_option_cp" pc)
|
1579 |
|
|
(set concat70 (sll (ext DI avc2v1CRq) avc2v1Imm6u8))
|
1580 |
|
|
(set avc2copCCR2 (subword SI concat70 0))
|
1581 |
|
|
(set avc2copCCR3 (subword SI concat70 1))
|
1582 |
|
|
)
|
1583 |
|
|
())
|
1584 |
|
|
(dn16i cmvsra0i_avc2_v1 "cmvsra0i" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmvsra0i"))
|
1585 |
|
|
"cmvsra0i $avc2v1CRq,$avc2v1Imm6u8"
|
1586 |
|
|
(+ avc2v1CRq avc2v1Imm6u8 (f-avc2-v1sub2u14 #x0) (f-avc2-v1sub4u0 #xb))
|
1587 |
|
|
(sequence((DI concat71)) (c-call "check_option_cp" pc)
|
1588 |
|
|
(set concat71 (sra (ext DI avc2v1CRq) avc2v1Imm6u8))
|
1589 |
|
|
(set avc2copCCR2 (subword SI concat71 0))
|
1590 |
|
|
(set avc2copCCR3 (subword SI concat71 1))
|
1591 |
|
|
)
|
1592 |
|
|
())
|
1593 |
|
|
(dn16i cmvsla1i_avc2_v1 "cmvsla1i" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmvsla1i"))
|
1594 |
|
|
"cmvsla1i $avc2v1CRq,$avc2v1Imm6u8"
|
1595 |
|
|
(+ avc2v1CRq avc2v1Imm6u8 (f-avc2-v1sub2u14 #x3) (f-avc2-v1sub4u0 #xb))
|
1596 |
|
|
(sequence((DI concat72)) (c-call "check_option_cp" pc)
|
1597 |
|
|
(set concat72 (sll (ext DI avc2v1CRq) avc2v1Imm6u8))
|
1598 |
|
|
(set avc2copCCR4 (subword SI concat72 0))
|
1599 |
|
|
(set avc2copCCR5 (subword SI concat72 1))
|
1600 |
|
|
)
|
1601 |
|
|
())
|
1602 |
|
|
(dn16i cmvsra1i_avc2_v1 "cmvsra1i" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmvsra1i"))
|
1603 |
|
|
"cmvsra1i $avc2v1CRq,$avc2v1Imm6u8"
|
1604 |
|
|
(+ avc2v1CRq avc2v1Imm6u8 (f-avc2-v1sub2u14 #x1) (f-avc2-v1sub4u0 #xb))
|
1605 |
|
|
(sequence((DI concat73)) (c-call "check_option_cp" pc)
|
1606 |
|
|
(set concat73 (sra (ext DI avc2v1CRq) avc2v1Imm6u8))
|
1607 |
|
|
(set avc2copCCR4 (subword SI concat73 0))
|
1608 |
|
|
(set avc2copCCR5 (subword SI concat73 1))
|
1609 |
|
|
)
|
1610 |
|
|
())
|
1611 |
|
|
(dn16i csraa0i_avc2_v1 "csraa0i" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csraa0i"))
|
1612 |
|
|
"csraa0i $avc2v1Imm6u8"
|
1613 |
|
|
(+ avc2v1Imm6u8 (f-avc2-v1sub2u14 #x0) (f-avc2-v1sub4u4 #x0) (f-avc2-v1sub4u0 #x9))
|
1614 |
|
|
(sequence((DI concat74)) (c-call "check_option_cp" pc)
|
1615 |
|
|
(set concat74 (sra (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) avc2v1Imm6u8))
|
1616 |
|
|
(set avc2copCCR2 (subword SI concat74 0))
|
1617 |
|
|
(set avc2copCCR3 (subword SI concat74 1))
|
1618 |
|
|
)
|
1619 |
|
|
())
|
1620 |
|
|
(dn16i csraa1i_avc2_v1 "csraa1i" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csraa1i"))
|
1621 |
|
|
"csraa1i $avc2v1Imm6u8"
|
1622 |
|
|
(+ avc2v1Imm6u8 (f-avc2-v1sub2u14 #x1) (f-avc2-v1sub4u4 #x0) (f-avc2-v1sub4u0 #x9))
|
1623 |
|
|
(sequence((DI concat75)) (c-call "check_option_cp" pc)
|
1624 |
|
|
(set concat75 (sra (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) avc2v1Imm6u8))
|
1625 |
|
|
(set avc2copCCR4 (subword SI concat75 0))
|
1626 |
|
|
(set avc2copCCR5 (subword SI concat75 1))
|
1627 |
|
|
)
|
1628 |
|
|
())
|
1629 |
|
|
(dn16i csrla0i_avc2_v1 "csrla0i" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csrla0i"))
|
1630 |
|
|
"csrla0i $avc2v1Imm6u8"
|
1631 |
|
|
(+ avc2v1Imm6u8 (f-avc2-v1sub2u14 #x0) (f-avc2-v1sub4u4 #x1) (f-avc2-v1sub4u0 #x9))
|
1632 |
|
|
(sequence((DI concat76)) (c-call "check_option_cp" pc)
|
1633 |
|
|
(set concat76 (srl (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) avc2v1Imm6u8))
|
1634 |
|
|
(set avc2copCCR2 (subword SI concat76 0))
|
1635 |
|
|
(set avc2copCCR3 (subword SI concat76 1))
|
1636 |
|
|
)
|
1637 |
|
|
())
|
1638 |
|
|
(dn16i csrla1i_avc2_v1 "csrla1i" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csrla1i"))
|
1639 |
|
|
"csrla1i $avc2v1Imm6u8"
|
1640 |
|
|
(+ avc2v1Imm6u8 (f-avc2-v1sub2u14 #x1) (f-avc2-v1sub4u4 #x1) (f-avc2-v1sub4u0 #x9))
|
1641 |
|
|
(sequence((DI concat77)) (c-call "check_option_cp" pc)
|
1642 |
|
|
(set concat77 (srl (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) avc2v1Imm6u8))
|
1643 |
|
|
(set avc2copCCR4 (subword SI concat77 0))
|
1644 |
|
|
(set avc2copCCR5 (subword SI concat77 1))
|
1645 |
|
|
)
|
1646 |
|
|
())
|
1647 |
|
|
(dn16i cslla0i_avc2_v1 "cslla0i" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cslla0i"))
|
1648 |
|
|
"cslla0i $avc2v1Imm6u8"
|
1649 |
|
|
(+ avc2v1Imm6u8 (f-avc2-v1sub2u14 #x0) (f-avc2-v1sub4u4 #x3) (f-avc2-v1sub4u0 #x9))
|
1650 |
|
|
(sequence((DI concat78)) (c-call "check_option_cp" pc)
|
1651 |
|
|
(set concat78 (sll (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) avc2v1Imm6u8))
|
1652 |
|
|
(set avc2copCCR2 (subword SI concat78 0))
|
1653 |
|
|
(set avc2copCCR3 (subword SI concat78 1))
|
1654 |
|
|
)
|
1655 |
|
|
())
|
1656 |
|
|
(dn16i cslla1i_avc2_v1 "cslla1i" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cslla1i"))
|
1657 |
|
|
"cslla1i $avc2v1Imm6u8"
|
1658 |
|
|
(+ avc2v1Imm6u8 (f-avc2-v1sub2u14 #x1) (f-avc2-v1sub4u4 #x3) (f-avc2-v1sub4u0 #x9))
|
1659 |
|
|
(sequence((DI concat79)) (c-call "check_option_cp" pc)
|
1660 |
|
|
(set concat79 (sll (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) avc2v1Imm6u8))
|
1661 |
|
|
(set avc2copCCR4 (subword SI concat79 0))
|
1662 |
|
|
(set avc2copCCR5 (subword SI concat79 1))
|
1663 |
|
|
)
|
1664 |
|
|
())
|
1665 |
|
|
(dn16i csraa0_avc2_v1 "csraa0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csraa0"))
|
1666 |
|
|
"csraa0"
|
1667 |
|
|
(+ (f-avc2-v1sub4u12 #x0) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u4 #xc) (f-avc2-v1sub4u0 #x9))
|
1668 |
|
|
(sequence((DI concat80)) (c-call "check_option_cp" pc)
|
1669 |
|
|
(set concat80 (sra (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) (and QI (srl avc2copCCR0 0) #x3f)))
|
1670 |
|
|
(set avc2copCCR2 (subword SI concat80 0))
|
1671 |
|
|
(set avc2copCCR3 (subword SI concat80 1))
|
1672 |
|
|
)
|
1673 |
|
|
())
|
1674 |
|
|
(dn16i csraa1_avc2_v1 "csraa1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csraa1"))
|
1675 |
|
|
"csraa1"
|
1676 |
|
|
(+ (f-avc2-v1sub4u12 #x1) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u4 #xc) (f-avc2-v1sub4u0 #x9))
|
1677 |
|
|
(sequence((DI concat81)) (c-call "check_option_cp" pc)
|
1678 |
|
|
(set concat81 (sra (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (and QI (srl avc2copCCR0 0) #x3f)))
|
1679 |
|
|
(set avc2copCCR4 (subword SI concat81 0))
|
1680 |
|
|
(set avc2copCCR5 (subword SI concat81 1))
|
1681 |
|
|
)
|
1682 |
|
|
())
|
1683 |
|
|
(dn16i csrla0_avc2_v1 "csrla0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csrla0"))
|
1684 |
|
|
"csrla0"
|
1685 |
|
|
(+ (f-avc2-v1sub4u12 #x0) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u4 #xd) (f-avc2-v1sub4u0 #x9))
|
1686 |
|
|
(sequence((DI concat82)) (c-call "check_option_cp" pc)
|
1687 |
|
|
(set concat82 (srl (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) (and QI (srl avc2copCCR0 0) #x3f)))
|
1688 |
|
|
(set avc2copCCR2 (subword SI concat82 0))
|
1689 |
|
|
(set avc2copCCR3 (subword SI concat82 1))
|
1690 |
|
|
)
|
1691 |
|
|
())
|
1692 |
|
|
(dn16i csrla1_avc2_v1 "csrla1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csrla1"))
|
1693 |
|
|
"csrla1"
|
1694 |
|
|
(+ (f-avc2-v1sub4u12 #x1) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u4 #xd) (f-avc2-v1sub4u0 #x9))
|
1695 |
|
|
(sequence((DI concat83)) (c-call "check_option_cp" pc)
|
1696 |
|
|
(set concat83 (srl (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (and QI (srl avc2copCCR0 0) #x3f)))
|
1697 |
|
|
(set avc2copCCR4 (subword SI concat83 0))
|
1698 |
|
|
(set avc2copCCR5 (subword SI concat83 1))
|
1699 |
|
|
)
|
1700 |
|
|
())
|
1701 |
|
|
(dn16i cslla0_avc2_v1 "cslla0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cslla0"))
|
1702 |
|
|
"cslla0"
|
1703 |
|
|
(+ (f-avc2-v1sub4u12 #x0) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u4 #xf) (f-avc2-v1sub4u0 #x9))
|
1704 |
|
|
(sequence((DI concat84)) (c-call "check_option_cp" pc)
|
1705 |
|
|
(set concat84 (sll (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) (and QI (srl avc2copCCR0 0) #x3f)))
|
1706 |
|
|
(set avc2copCCR2 (subword SI concat84 0))
|
1707 |
|
|
(set avc2copCCR3 (subword SI concat84 1))
|
1708 |
|
|
)
|
1709 |
|
|
())
|
1710 |
|
|
(dn16i cslla1_avc2_v1 "cslla1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cslla1"))
|
1711 |
|
|
"cslla1"
|
1712 |
|
|
(+ (f-avc2-v1sub4u12 #x1) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u4 #xf) (f-avc2-v1sub4u0 #x9))
|
1713 |
|
|
(sequence((DI concat85)) (c-call "check_option_cp" pc)
|
1714 |
|
|
(set concat85 (sll (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (and QI (srl avc2copCCR0 0) #x3f)))
|
1715 |
|
|
(set avc2copCCR4 (subword SI concat85 0))
|
1716 |
|
|
(set avc2copCCR5 (subword SI concat85 1))
|
1717 |
|
|
)
|
1718 |
|
|
())
|
1719 |
|
|
(dn16i cadda0_avc2_v1 "cadda0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cadda0"))
|
1720 |
|
|
"cadda0 $avc2v1CRq"
|
1721 |
|
|
(+ avc2v1CRq (f-avc2-v1sub4u12 #x0) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u0 #x8))
|
1722 |
|
|
(sequence((DI concat86)) (c-call "check_option_cp" pc)
|
1723 |
|
|
(set concat86 (add (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) (ext DI avc2v1CRq)))
|
1724 |
|
|
(set avc2copCCR2 (subword SI concat86 0))
|
1725 |
|
|
(set avc2copCCR3 (subword SI concat86 1))
|
1726 |
|
|
)
|
1727 |
|
|
())
|
1728 |
|
|
(dn16i cadda1_avc2_v1 "cadda1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cadda1"))
|
1729 |
|
|
"cadda1 $avc2v1CRq"
|
1730 |
|
|
(+ avc2v1CRq (f-avc2-v1sub4u12 #x1) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u0 #x8))
|
1731 |
|
|
(sequence((DI concat87)) (c-call "check_option_cp" pc)
|
1732 |
|
|
(set concat87 (add (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (ext DI avc2v1CRq)))
|
1733 |
|
|
(set avc2copCCR4 (subword SI concat87 0))
|
1734 |
|
|
(set avc2copCCR5 (subword SI concat87 1))
|
1735 |
|
|
)
|
1736 |
|
|
())
|
1737 |
|
|
(dn16i csuba0_avc2_v1 "csuba0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csuba0"))
|
1738 |
|
|
"csuba0 $avc2v1CRq"
|
1739 |
|
|
(+ avc2v1CRq (f-avc2-v1sub4u12 #x2) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u0 #x8))
|
1740 |
|
|
(sequence((DI concat88)) (c-call "check_option_cp" pc)
|
1741 |
|
|
(set concat88 (sub (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) (ext DI avc2v1CRq)))
|
1742 |
|
|
(set avc2copCCR2 (subword SI concat88 0))
|
1743 |
|
|
(set avc2copCCR3 (subword SI concat88 1))
|
1744 |
|
|
)
|
1745 |
|
|
())
|
1746 |
|
|
(dn16i csuba1_avc2_v1 "csuba1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csuba1"))
|
1747 |
|
|
"csuba1 $avc2v1CRq"
|
1748 |
|
|
(+ avc2v1CRq (f-avc2-v1sub4u12 #x3) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u0 #x8))
|
1749 |
|
|
(sequence((DI concat89)) (c-call "check_option_cp" pc)
|
1750 |
|
|
(set concat89 (sub (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (ext DI avc2v1CRq)))
|
1751 |
|
|
(set avc2copCCR4 (subword SI concat89 0))
|
1752 |
|
|
(set avc2copCCR5 (subword SI concat89 1))
|
1753 |
|
|
)
|
1754 |
|
|
())
|
1755 |
|
|
(dn16i cadd2a0_avc2_v1 "cadd2a0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cadd2a0"))
|
1756 |
|
|
"cadd2a0 $avc2v1CRq,$avc2v1CRp"
|
1757 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x8) (f-avc2-v1sub4u0 #x8))
|
1758 |
|
|
(sequence((DI concat90)) (c-call "check_option_cp" pc)
|
1759 |
|
|
(set concat90 (add (ext DI avc2v1CRq) (ext DI avc2v1CRp)))
|
1760 |
|
|
(set avc2copCCR2 (subword SI concat90 0))
|
1761 |
|
|
(set avc2copCCR3 (subword SI concat90 1))
|
1762 |
|
|
)
|
1763 |
|
|
())
|
1764 |
|
|
(dn16i cadd2a1_avc2_v1 "cadd2a1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cadd2a1"))
|
1765 |
|
|
"cadd2a1 $avc2v1CRq,$avc2v1CRp"
|
1766 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x9) (f-avc2-v1sub4u0 #x8))
|
1767 |
|
|
(sequence((DI concat91)) (c-call "check_option_cp" pc)
|
1768 |
|
|
(set concat91 (add (ext DI avc2v1CRq) (ext DI avc2v1CRp)))
|
1769 |
|
|
(set avc2copCCR4 (subword SI concat91 0))
|
1770 |
|
|
(set avc2copCCR5 (subword SI concat91 1))
|
1771 |
|
|
)
|
1772 |
|
|
())
|
1773 |
|
|
(dn16i csub2a0_avc2_v1 "csub2a0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csub2a0"))
|
1774 |
|
|
"csub2a0 $avc2v1CRq,$avc2v1CRp"
|
1775 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xa) (f-avc2-v1sub4u0 #x8))
|
1776 |
|
|
(sequence((DI concat92)) (c-call "check_option_cp" pc)
|
1777 |
|
|
(set concat92 (sub (ext DI avc2v1CRq) (ext DI avc2v1CRp)))
|
1778 |
|
|
(set avc2copCCR2 (subword SI concat92 0))
|
1779 |
|
|
(set avc2copCCR3 (subword SI concat92 1))
|
1780 |
|
|
)
|
1781 |
|
|
())
|
1782 |
|
|
(dn16i csub2a1_avc2_v1 "csub2a1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csub2a1"))
|
1783 |
|
|
"csub2a1 $avc2v1CRq,$avc2v1CRp"
|
1784 |
|
|
(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xb) (f-avc2-v1sub4u0 #x8))
|
1785 |
|
|
(sequence((DI concat93)) (c-call "check_option_cp" pc)
|
1786 |
|
|
(set concat93 (sub (ext DI avc2v1CRq) (ext DI avc2v1CRp)))
|
1787 |
|
|
(set avc2copCCR4 (subword SI concat93 0))
|
1788 |
|
|
(set avc2copCCR5 (subword SI concat93 1))
|
1789 |
|
|
)
|
1790 |
|
|
())
|
1791 |
|
|
(dn16i caddaa0_avc2_v1 "caddaa0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "caddaa0"))
|
1792 |
|
|
"caddaa0"
|
1793 |
|
|
(+ (f-avc2-v1sub4u12 #x0) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u4 #x0) (f-avc2-v1sub4u0 #xa))
|
1794 |
|
|
(sequence((DI concat94)) (c-call "check_option_cp" pc)
|
1795 |
|
|
(set concat94 (add (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3))))
|
1796 |
|
|
(set avc2copCCR2 (subword SI concat94 0))
|
1797 |
|
|
(set avc2copCCR3 (subword SI concat94 1))
|
1798 |
|
|
)
|
1799 |
|
|
())
|
1800 |
|
|
(dn16i caddaa1_avc2_v1 "caddaa1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "caddaa1"))
|
1801 |
|
|
"caddaa1"
|
1802 |
|
|
(+ (f-avc2-v1sub4u12 #x1) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u4 #x0) (f-avc2-v1sub4u0 #xa))
|
1803 |
|
|
(sequence((DI concat95)) (c-call "check_option_cp" pc)
|
1804 |
|
|
(set concat95 (add (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3))))
|
1805 |
|
|
(set avc2copCCR4 (subword SI concat95 0))
|
1806 |
|
|
(set avc2copCCR5 (subword SI concat95 1))
|
1807 |
|
|
)
|
1808 |
|
|
())
|
1809 |
|
|
(dn16i csubaa0_avc2_v1 "csubaa0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csubaa0"))
|
1810 |
|
|
"csubaa0"
|
1811 |
|
|
(+ (f-avc2-v1sub4u12 #x2) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u4 #x0) (f-avc2-v1sub4u0 #xa))
|
1812 |
|
|
(sequence((DI concat96)) (c-call "check_option_cp" pc)
|
1813 |
|
|
(set concat96 (sub (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3))))
|
1814 |
|
|
(set avc2copCCR2 (subword SI concat96 0))
|
1815 |
|
|
(set avc2copCCR3 (subword SI concat96 1))
|
1816 |
|
|
)
|
1817 |
|
|
())
|
1818 |
|
|
(dn16i csubaa1_avc2_v1 "csubaa1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csubaa1"))
|
1819 |
|
|
"csubaa1"
|
1820 |
|
|
(+ (f-avc2-v1sub4u12 #x3) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u4 #x0) (f-avc2-v1sub4u0 #xa))
|
1821 |
|
|
(sequence((DI concat97)) (c-call "check_option_cp" pc)
|
1822 |
|
|
(set concat97 (sub (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3))))
|
1823 |
|
|
(set avc2copCCR4 (subword SI concat97 0))
|
1824 |
|
|
(set avc2copCCR5 (subword SI concat97 1))
|
1825 |
|
|
)
|
1826 |
|
|
())
|
1827 |
|
|
(dn32i cmov1_avc2_v3 "cmov1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "cmov1"))
|
1828 |
|
|
"cmov $avc2v3CRn,$avc2v3Rm"
|
1829 |
|
|
(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3CRn avc2v3Rm (f-avc2-v3sub4u28 #x0) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xf))
|
1830 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1831 |
|
|
(set avc2v3CRn avc2v3Rm)
|
1832 |
|
|
)
|
1833 |
|
|
())
|
1834 |
|
|
(dn32i cmov2_avc2_v3 "cmov2" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "cmov2"))
|
1835 |
|
|
"cmov $avc2v3Rm,$avc2v3CRn"
|
1836 |
|
|
(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rm avc2v3CRn (f-avc2-v3sub4u28 #x1) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xf))
|
1837 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1838 |
|
|
(set avc2v3Rm avc2v3CRn)
|
1839 |
|
|
)
|
1840 |
|
|
())
|
1841 |
|
|
(dn32i cmovi_avc2_v3 "cmovi" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "cmovi"))
|
1842 |
|
|
"cmovi $avc2v3CRq,$avc2v3Imm16s4x24e32"
|
1843 |
|
|
(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3CRq avc2v3Imm16s4x24e32 (f-avc2-v3sub4u16 #xe))
|
1844 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1845 |
|
|
(set avc2v3CRq (ext SI avc2v3Imm16s4x24e32))
|
1846 |
|
|
)
|
1847 |
|
|
())
|
1848 |
|
|
(dn32i cmovc1_avc2_v3 "cmovc1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "cmovc1"))
|
1849 |
|
|
"cmovc $avc2v3CCRn,$avc2v3Rm"
|
1850 |
|
|
(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3CCRn avc2v3Rm (f-avc2-v3sub4u28 #x2) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xf))
|
1851 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1852 |
|
|
(set avc2v3CCRn avc2v3Rm)
|
1853 |
|
|
)
|
1854 |
|
|
())
|
1855 |
|
|
(dn32i cmovc2_avc2_v3 "cmovc2" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "cmovc2"))
|
1856 |
|
|
"cmovc $avc2v3Rm,$avc2v3CCRn"
|
1857 |
|
|
(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rm avc2v3CCRn (f-avc2-v3sub4u28 #x3) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xf))
|
1858 |
|
|
(sequence() (c-call "check_option_cp" pc)
|
1859 |
|
|
(set avc2v3Rm avc2v3CCRn)
|
1860 |
|
|
)
|
1861 |
|
|
())
|
1862 |
|
|
(dn32i xmula0_avc2_v3 "xmula0" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmula0"))
|
1863 |
|
|
"xmula0 $avc2v3Rn,$avc2v3Rm"
|
1864 |
|
|
(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #x0) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))
|
1865 |
|
|
(sequence((DI concat98)) (c-call "check_option_cp" pc)
|
1866 |
|
|
(set concat98 (mul (ext DI avc2v3Rn) (ext DI avc2v3Rm)))
|
1867 |
|
|
(set avc2copCCR2 (subword SI concat98 0))
|
1868 |
|
|
(set avc2copCCR3 (subword SI concat98 1))
|
1869 |
|
|
)
|
1870 |
|
|
())
|
1871 |
|
|
(dn32i xmulua0_avc2_v3 "xmulua0" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmulua0"))
|
1872 |
|
|
"xmulua0 $avc2v3Rn,$avc2v3Rm"
|
1873 |
|
|
(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #x1) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))
|
1874 |
|
|
(sequence((DI concat99)) (c-call "check_option_cp" pc)
|
1875 |
|
|
(set concat99 (mul (zext DI avc2v3Rn) (zext DI avc2v3Rm)))
|
1876 |
|
|
(set avc2copCCR2 (subword SI concat99 0))
|
1877 |
|
|
(set avc2copCCR3 (subword SI concat99 1))
|
1878 |
|
|
)
|
1879 |
|
|
())
|
1880 |
|
|
(dn32i xnmula0_avc2_v3 "xnmula0" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xnmula0"))
|
1881 |
|
|
"xnmula0 $avc2v3Rn,$avc2v3Rm"
|
1882 |
|
|
(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #x2) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))
|
1883 |
|
|
(sequence((DI concat100)) (c-call "check_option_cp" pc)
|
1884 |
|
|
(set concat100 (neg (mul (ext DI avc2v3Rn) (ext DI avc2v3Rm))))
|
1885 |
|
|
(set avc2copCCR2 (subword SI concat100 0))
|
1886 |
|
|
(set avc2copCCR3 (subword SI concat100 1))
|
1887 |
|
|
)
|
1888 |
|
|
())
|
1889 |
|
|
(dn32i xmada0_avc2_v3 "xmada0" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmada0"))
|
1890 |
|
|
"xmada0 $avc2v3Rn,$avc2v3Rm"
|
1891 |
|
|
(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #x4) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))
|
1892 |
|
|
(sequence((DI concat101)) (c-call "check_option_cp" pc)
|
1893 |
|
|
(set concat101 (add (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (ext DI avc2v3Rn) (ext DI avc2v3Rm))))
|
1894 |
|
|
(set avc2copCCR2 (subword SI concat101 0))
|
1895 |
|
|
(set avc2copCCR3 (subword SI concat101 1))
|
1896 |
|
|
)
|
1897 |
|
|
())
|
1898 |
|
|
(dn32i xmadua0_avc2_v3 "xmadua0" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmadua0"))
|
1899 |
|
|
"xmadua0 $avc2v3Rn,$avc2v3Rm"
|
1900 |
|
|
(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #x5) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))
|
1901 |
|
|
(sequence((DI concat102)) (c-call "check_option_cp" pc)
|
1902 |
|
|
(set concat102 (add (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (zext DI avc2v3Rn) (zext DI avc2v3Rm))))
|
1903 |
|
|
(set avc2copCCR2 (subword SI concat102 0))
|
1904 |
|
|
(set avc2copCCR3 (subword SI concat102 1))
|
1905 |
|
|
)
|
1906 |
|
|
())
|
1907 |
|
|
(dn32i xmsba0_avc2_v3 "xmsba0" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmsba0"))
|
1908 |
|
|
"xmsba0 $avc2v3Rn,$avc2v3Rm"
|
1909 |
|
|
(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #x6) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))
|
1910 |
|
|
(sequence((DI concat103)) (c-call "check_option_cp" pc)
|
1911 |
|
|
(set concat103 (sub (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (ext DI avc2v3Rn) (ext DI avc2v3Rm))))
|
1912 |
|
|
(set avc2copCCR2 (subword SI concat103 0))
|
1913 |
|
|
(set avc2copCCR3 (subword SI concat103 1))
|
1914 |
|
|
)
|
1915 |
|
|
())
|
1916 |
|
|
(dn32i xmsbua0_avc2_v3 "xmsbua0" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmsbua0"))
|
1917 |
|
|
"xmsbua0 $avc2v3Rn,$avc2v3Rm"
|
1918 |
|
|
(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #x7) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))
|
1919 |
|
|
(sequence((DI concat104)) (c-call "check_option_cp" pc)
|
1920 |
|
|
(set concat104 (sub (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (zext DI avc2v3Rn) (zext DI avc2v3Rm))))
|
1921 |
|
|
(set avc2copCCR2 (subword SI concat104 0))
|
1922 |
|
|
(set avc2copCCR3 (subword SI concat104 1))
|
1923 |
|
|
)
|
1924 |
|
|
())
|
1925 |
|
|
(dn32i xmula1_avc2_v3 "xmula1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmula1"))
|
1926 |
|
|
"xmula1 $avc2v3Rn,$avc2v3Rm"
|
1927 |
|
|
(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #x8) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))
|
1928 |
|
|
(sequence((DI concat105)) (c-call "check_option_cp" pc)
|
1929 |
|
|
(set concat105 (mul (ext DI avc2v3Rn) (ext DI avc2v3Rm)))
|
1930 |
|
|
(set avc2copCCR4 (subword SI concat105 0))
|
1931 |
|
|
(set avc2copCCR5 (subword SI concat105 1))
|
1932 |
|
|
)
|
1933 |
|
|
())
|
1934 |
|
|
(dn32i xmulua1_avc2_v3 "xmulua1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmulua1"))
|
1935 |
|
|
"xmulua1 $avc2v3Rn,$avc2v3Rm"
|
1936 |
|
|
(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #x9) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))
|
1937 |
|
|
(sequence((DI concat106)) (c-call "check_option_cp" pc)
|
1938 |
|
|
(set concat106 (mul (zext DI avc2v3Rn) (zext DI avc2v3Rm)))
|
1939 |
|
|
(set avc2copCCR4 (subword SI concat106 0))
|
1940 |
|
|
(set avc2copCCR5 (subword SI concat106 1))
|
1941 |
|
|
)
|
1942 |
|
|
())
|
1943 |
|
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(dn32i xnmula1_avc2_v3 "xnmula1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xnmula1"))
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1944 |
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"xnmula1 $avc2v3Rn,$avc2v3Rm"
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1945 |
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(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #xa) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))
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1946 |
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(sequence((DI concat107)) (c-call "check_option_cp" pc)
|
1947 |
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(set concat107 (neg (mul (ext DI avc2v3Rn) (ext DI avc2v3Rm))))
|
1948 |
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(set avc2copCCR4 (subword SI concat107 0))
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1949 |
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|
(set avc2copCCR5 (subword SI concat107 1))
|
1950 |
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|
)
|
1951 |
|
|
())
|
1952 |
|
|
(dn32i xmada1_avc2_v3 "xmada1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmada1"))
|
1953 |
|
|
"xmada1 $avc2v3Rn,$avc2v3Rm"
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1954 |
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|
(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #xc) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))
|
1955 |
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|
(sequence((DI concat108)) (c-call "check_option_cp" pc)
|
1956 |
|
|
(set concat108 (add (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (ext DI avc2v3Rn) (ext DI avc2v3Rm))))
|
1957 |
|
|
(set avc2copCCR4 (subword SI concat108 0))
|
1958 |
|
|
(set avc2copCCR5 (subword SI concat108 1))
|
1959 |
|
|
)
|
1960 |
|
|
())
|
1961 |
|
|
(dn32i xmadua1_avc2_v3 "xmadua1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmadua1"))
|
1962 |
|
|
"xmadua1 $avc2v3Rn,$avc2v3Rm"
|
1963 |
|
|
(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #xd) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))
|
1964 |
|
|
(sequence((DI concat109)) (c-call "check_option_cp" pc)
|
1965 |
|
|
(set concat109 (add (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (zext DI avc2v3Rn) (zext DI avc2v3Rm))))
|
1966 |
|
|
(set avc2copCCR4 (subword SI concat109 0))
|
1967 |
|
|
(set avc2copCCR5 (subword SI concat109 1))
|
1968 |
|
|
)
|
1969 |
|
|
())
|
1970 |
|
|
(dn32i xmsba1_avc2_v3 "xmsba1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmsba1"))
|
1971 |
|
|
"xmsba1 $avc2v3Rn,$avc2v3Rm"
|
1972 |
|
|
(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #xe) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))
|
1973 |
|
|
(sequence((DI concat110)) (c-call "check_option_cp" pc)
|
1974 |
|
|
(set concat110 (sub (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (ext DI avc2v3Rn) (ext DI avc2v3Rm))))
|
1975 |
|
|
(set avc2copCCR4 (subword SI concat110 0))
|
1976 |
|
|
(set avc2copCCR5 (subword SI concat110 1))
|
1977 |
|
|
)
|
1978 |
|
|
())
|
1979 |
|
|
(dn32i xmsbua1_avc2_v3 "xmsbua1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmsbua1"))
|
1980 |
|
|
"xmsbua1 $avc2v3Rn,$avc2v3Rm"
|
1981 |
|
|
(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #xf) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))
|
1982 |
|
|
(sequence((DI concat111)) (c-call "check_option_cp" pc)
|
1983 |
|
|
(set concat111 (sub (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (zext DI avc2v3Rn) (zext DI avc2v3Rm))))
|
1984 |
|
|
(set avc2copCCR4 (subword SI concat111 0))
|
1985 |
|
|
(set avc2copCCR5 (subword SI concat111 1))
|
1986 |
|
|
)
|
1987 |
|
|
())
|