OpenCores
URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [gnu/] [binutils/] [cpu/] [mep-sample-ucidsp.cpu] - Blame information for rev 266

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 161 khays
; Toshiba MeP Media Engine architecture description.  -*- Scheme -*-
2
; Copyright 2011 Free Software Foundation, Inc.
3
;
4
; Contributed by Red Hat Inc;
5
;
6
; This file is part of the GNU Binutils.
7
;
8
; This program is free software; you can redistribute it and/or modify
9
; it under the terms of the GNU General Public License as published by
10
; the Free Software Foundation; either version 3 of the License, or
11
; (at your option) any later version.
12
;
13
; This program is distributed in the hope that it will be useful,
14
; but WITHOUT ANY WARRANTY; without even the implied warranty of
15
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16
; GNU General Public License for more details.
17
;
18
; You should have received a copy of the GNU General Public License
19
; along with this program; if not, write to the Free Software
20
; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21
; MA 02110-1301, USA.
22
 
23
; This file provides sample definitions for the UCI and DSP
24
; instructions.  It is incorporated into the overall description by
25
; including it from a top-level file that includes all of the required
26
; option files.
27
 
28
; UCI option.
29
 
30
(define-pmacro mep-ext1-isa () (ISA ext_core1))
31
 
32
 
33
; uci instructions for ELFextension test
34
 
35
; uci.elfext.1    $simm16
36
; 1111_IIII_0000_0010 0001_iiii_iiii_iiii
37
; simm16 = I[4:7]||i[20:31]
38
 
39
; uci.elfext.2    $uimm16
40
; 1111_IIII_0000_0010 0010_iiii_iiii_iiii
41
; uimm16 = I[4:7]||i[20:31]
42
 
43
; define simm16
44
(df f-uci_elfext_1-hi  "uci_elfext_1 simm16 hi 4s7"   (mep-ext1-isa)  4  4  INT #f #f)
45
(df f-uci_elfext_1-lo  "uci_elfext_1 simm16 lo 20s31" (mep-ext1-isa) 20 12 UINT #f #f)
46
(define-multi-ifield
47
  (name f-uci_elfext_1)
48
  (comment "16-bits uci_elfext_ signed constant")
49
  (attrs mep-ext1-isa)
50
  (mode INT)
51
  (subfields f-uci_elfext_1-hi f-uci_elfext_1-lo)
52
  (insert (sequence ()
53
                    (set (ifield f-uci_elfext_1-hi) (srl (ifield f-uci_elfext_1) 12))
54
                    (set (ifield f-uci_elfext_1-lo) (and (ifield f-uci_elfext_1) #xfff))))
55
  (extract (set (ifield f-uci_elfext_1)
56
                (or (sll (ifield f-uci_elfext_1-hi) 12)
57
                    (ifield f-uci_elfext_1-lo))))
58
  )
59
(dpop uci_elfext_1simm16    "signed imm (16 bits)"  (mep-ext1-isa) h-sint  f-uci_elfext_1  "signed16")
60
 
61
; define uimm16
62
(df f-uci_elfext_2-hi  "uci_elfext_2 uimm16 hi 4u7"   (mep-ext1-isa)  4  4 UINT #f #f)
63
(df f-uci_elfext_2-lo  "uci_elfext_2 uimm16 lo 20u31" (mep-ext1-isa) 20 12 UINT #f #f)
64
(define-multi-ifield
65
  (name f-uci_elfext_2)
66
  (comment "16-bits uci_elfext_ unsigned constant")
67
  (attrs mep-ext1-isa)
68
  (mode UINT)
69
  (subfields f-uci_elfext_2-hi f-uci_elfext_2-lo)
70
  (insert (sequence ()
71
                    (set (ifield f-uci_elfext_2-hi) (srl (ifield f-uci_elfext_2) 12))
72
                    (set (ifield f-uci_elfext_2-lo) (and (ifield f-uci_elfext_2) #xfff))))
73
  (extract (set (ifield f-uci_elfext_2)
74
                (or (sll (ifield f-uci_elfext_2-hi) 12)
75
                    (ifield f-uci_elfext_2-lo))))
76
  )
77
(dpop uci_elfext_2uimm16    "unsigned imm (16 bits)"  (mep-ext1-isa) h-uint  f-uci_elfext_2  "unsigned16")
78
 
79
; define sub-opcode
80
(df f-uci_elfext-sub  "sub-opcode for uci_elfext instructions"  (mep-ext1-isa) 16 4 UINT #f #f)
81
 
82
 
83
; define instruction
84
(dni uci.elfext.1 "uci_elfext instruction 1" (OPTIONAL_UCI_INSN VOLATILE mep-ext1-isa)
85
         "uci.elfext.1 $uci_elfext_1simm16"
86
         (+ MAJ_15 (f-rm 0) (f-sub4 2) (f-uci_elfext-sub 1) uci_elfext_1simm16)
87
         (c-call "check_option_uci" pc)
88
         ()
89
         )
90
 
91
; define instruction
92
(dni uci.elfext.2 "uci_elfext instruction 1" (OPTIONAL_UCI_INSN VOLATILE mep-ext1-isa)
93
         "uci.elfext.2 $uci_elfext_2uimm16"
94
         (+ MAJ_15 (f-rm 0) (f-sub4 2) (f-uci_elfext-sub 2) uci_elfext_2uimm16)
95
         (c-call "check_option_uci" pc)
96
         ()
97
         )
98
 
99
 
100
 
101
;; some general samples
102
; UCI option.
103
 
104
(dni uci "user defined instruction" (OPTIONAL_UCI_INSN mep-ext1-isa)
105
     "uci $rn,$rm,$code16"
106
     (+ MAJ_15 rn rm (f-sub4 2) code16)
107
     (sequence ()
108
               (c-call "check_option_uci" pc)
109
               (unimp "uci"))
110
     ())
111
 
112
; DSP option.
113
 
114
(dni dsp "dsp instruction" (OPTIONAL_DSP_INSN mep-ext1-isa)
115
     "dsp $rn,$rm,$code16"
116
     (+ MAJ_15 rn rm (f-sub4 0) code16)
117
     (sequence ()
118
               (c-call "check_option_dsp" pc)
119
               (set pc (c-call USI "dsp_exception" pc)))
120
     ())

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.