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[/] [open8_urisc/] [trunk/] [gnu/] [binutils/] [gas/] [config/] [tc-avr.c] - Blame information for rev 299

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/* tc-avr.c -- Assembler code for the ATMEL AVR
2
 
3
   Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008, 2009,
4
   2010  Free Software Foundation, Inc.
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   Contributed by Denis Chertykov <denisc@overta.ru>
6
 
7
   This file is part of GAS, the GNU Assembler.
8
 
9
   GAS is free software; you can redistribute it and/or modify
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   it under the terms of the GNU General Public License as published by
11
   the Free Software Foundation; either version 3, or (at your option)
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   any later version.
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14
   GAS is distributed in the hope that it will be useful,
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   but WITHOUT ANY WARRANTY; without even the implied warranty of
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   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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   GNU General Public License for more details.
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19
   You should have received a copy of the GNU General Public License
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   along with GAS; see the file COPYING.  If not, write to
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   the Free Software Foundation, 51 Franklin Street - Fifth Floor,
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   Boston, MA 02110-1301, USA.  */
23
 
24
#include "as.h"
25
#include "safe-ctype.h"
26
#include "subsegs.h"
27
#include "dw2gencfi.h"
28
 
29
 
30
struct avr_opcodes_s
31
{
32
  char *        name;
33
  char *        constraints;
34
  char *        opcode;
35
  int           insn_size;              /* In words.  */
36
  int           isa;
37
  unsigned int  bin_opcode;
38
};
39
 
40
#define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
41
{#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
42
 
43
struct avr_opcodes_s avr_opcodes[] =
44
{
45
  #include "opcode/avr.h"
46
  {NULL, NULL, NULL, 0, 0, 0}
47
};
48
 
49
const char comment_chars[] = ";";
50
const char line_comment_chars[] = "#";
51
const char line_separator_chars[] = "$";
52
 
53
const char *md_shortopts = "m:";
54
struct mcu_type_s
55
{
56
  char *name;
57
  int isa;
58
  int mach;
59
};
60
 
61
/* XXX - devices that don't seem to exist (renamed, replaced with larger
62
   ones, or planned but never produced), left here for compatibility.  */
63
 
64
static struct mcu_type_s mcu_types[] =
65
{
66
  {"avr1",       AVR_ISA_AVR1,    bfd_mach_avr1},
67
/* TODO: insruction set for avr2 architecture should be AVR_ISA_AVR2,
68
 but set to AVR_ISA_AVR25 for some following version
69
 of GCC (from 4.3) for backward compatibility.  */
70
  {"avr2",       AVR_ISA_AVR25,   bfd_mach_avr2},
71
  {"avr25",      AVR_ISA_AVR25,   bfd_mach_avr25},
72
/* TODO: insruction set for avr3 architecture should be AVR_ISA_AVR3,
73
 but set to AVR_ISA_AVR3_ALL for some following version
74
 of GCC (from 4.3) for backward compatibility.  */
75
  {"avr3",       AVR_ISA_AVR3_ALL, bfd_mach_avr3},
76
  {"avr31",      AVR_ISA_AVR31,   bfd_mach_avr31},
77
  {"avr35",      AVR_ISA_AVR35,   bfd_mach_avr35},
78
  {"avr4",       AVR_ISA_AVR4,    bfd_mach_avr4},
79
/* TODO: insruction set for avr5 architecture should be AVR_ISA_AVR5,
80
 but set to AVR_ISA_AVR51 for some following version
81
 of GCC (from 4.3) for backward compatibility.  */
82
  {"avr5",       AVR_ISA_AVR51,   bfd_mach_avr5},
83
  {"avr51",      AVR_ISA_AVR51,   bfd_mach_avr51},
84
  {"avr6",       AVR_ISA_AVR6,    bfd_mach_avr6},
85
  {"avrxmega1",  AVR_ISA_XMEGA,   bfd_mach_avrxmega1},
86
  {"avrxmega2",  AVR_ISA_XMEGA,   bfd_mach_avrxmega2},
87
  {"avrxmega3",  AVR_ISA_XMEGA,   bfd_mach_avrxmega3},
88
  {"avrxmega4",  AVR_ISA_XMEGA,   bfd_mach_avrxmega4},
89
  {"avrxmega5",  AVR_ISA_XMEGA,   bfd_mach_avrxmega5},
90
  {"avrxmega6",  AVR_ISA_XMEGA,   bfd_mach_avrxmega6},
91
  {"avrxmega7",  AVR_ISA_XMEGA,   bfd_mach_avrxmega7},
92
  {"at90s1200",  AVR_ISA_1200,    bfd_mach_avr1},
93
  {"attiny11",   AVR_ISA_AVR1,    bfd_mach_avr1},
94
  {"attiny12",   AVR_ISA_AVR1,    bfd_mach_avr1},
95
  {"attiny15",   AVR_ISA_AVR1,    bfd_mach_avr1},
96
  {"attiny28",   AVR_ISA_AVR1,    bfd_mach_avr1},
97
  {"at90s2313",  AVR_ISA_AVR2,    bfd_mach_avr2},
98
  {"at90s2323",  AVR_ISA_AVR2,    bfd_mach_avr2},
99
  {"at90s2333",  AVR_ISA_AVR2,    bfd_mach_avr2}, /* XXX -> 4433 */
100
  {"at90s2343",  AVR_ISA_AVR2,    bfd_mach_avr2},
101
  {"attiny22",   AVR_ISA_AVR2,    bfd_mach_avr2}, /* XXX -> 2343 */
102
  {"attiny26",   AVR_ISA_2xxe,    bfd_mach_avr2},
103
  {"at90s4414",  AVR_ISA_AVR2,    bfd_mach_avr2}, /* XXX -> 8515 */
104
  {"at90s4433",  AVR_ISA_AVR2,    bfd_mach_avr2},
105
  {"at90s4434",  AVR_ISA_AVR2,    bfd_mach_avr2}, /* XXX -> 8535 */
106
  {"at90s8515",  AVR_ISA_AVR2,    bfd_mach_avr2},
107
  {"at90c8534",  AVR_ISA_AVR2,    bfd_mach_avr2},
108
  {"at90s8535",  AVR_ISA_AVR2,    bfd_mach_avr2},
109
  {"attiny13",   AVR_ISA_AVR25,   bfd_mach_avr25},
110
  {"attiny13a",  AVR_ISA_AVR25,   bfd_mach_avr25},
111
  {"attiny2313", AVR_ISA_AVR25,   bfd_mach_avr25},
112
  {"attiny2313a",AVR_ISA_AVR25,   bfd_mach_avr25},
113
  {"attiny24",   AVR_ISA_AVR25,   bfd_mach_avr25},
114
  {"attiny24a",  AVR_ISA_AVR25,   bfd_mach_avr25},
115
  {"attiny4313", AVR_ISA_AVR25,   bfd_mach_avr25},
116
  {"attiny44",   AVR_ISA_AVR25,   bfd_mach_avr25},
117
  {"attiny44a",  AVR_ISA_AVR25,   bfd_mach_avr25},
118
  {"attiny84",   AVR_ISA_AVR25,   bfd_mach_avr25},
119
  {"attiny84a",  AVR_ISA_AVR25,   bfd_mach_avr25},
120
  {"attiny25",   AVR_ISA_AVR25,   bfd_mach_avr25},
121
  {"attiny45",   AVR_ISA_AVR25,   bfd_mach_avr25},
122
  {"attiny85",   AVR_ISA_AVR25,   bfd_mach_avr25},
123
  {"attiny261",  AVR_ISA_AVR25,   bfd_mach_avr25},
124
  {"attiny261a", AVR_ISA_AVR25,   bfd_mach_avr25},
125
  {"attiny461",  AVR_ISA_AVR25,   bfd_mach_avr25},
126
  {"attiny461a", AVR_ISA_AVR25,   bfd_mach_avr25},
127
  {"attiny861",  AVR_ISA_AVR25,   bfd_mach_avr25},
128
  {"attiny861a", AVR_ISA_AVR25,   bfd_mach_avr25},
129
  {"attiny87",   AVR_ISA_AVR25,   bfd_mach_avr25},
130
  {"attiny43u",  AVR_ISA_AVR25,   bfd_mach_avr25},
131
  {"attiny48",   AVR_ISA_AVR25,   bfd_mach_avr25},
132
  {"attiny88",   AVR_ISA_AVR25,   bfd_mach_avr25},
133
  {"at86rf401",  AVR_ISA_RF401,   bfd_mach_avr25},
134
  {"ata6289",    AVR_ISA_AVR25,   bfd_mach_avr25},
135
  {"at43usb355", AVR_ISA_AVR3,    bfd_mach_avr3},
136
  {"at76c711",   AVR_ISA_AVR3,    bfd_mach_avr3},
137
  {"atmega103",  AVR_ISA_AVR31,   bfd_mach_avr31},
138
  {"at43usb320", AVR_ISA_AVR31,   bfd_mach_avr31},
139
  {"attiny167",  AVR_ISA_AVR35,   bfd_mach_avr35},
140
  {"at90usb82",  AVR_ISA_AVR35,   bfd_mach_avr35},
141
  {"at90usb162", AVR_ISA_AVR35,   bfd_mach_avr35},
142
  {"atmega8u2",  AVR_ISA_AVR35,   bfd_mach_avr35},
143
  {"atmega16u2", AVR_ISA_AVR35,   bfd_mach_avr35},
144
  {"atmega32u2", AVR_ISA_AVR35,   bfd_mach_avr35},
145
  {"atmega8",    AVR_ISA_M8,      bfd_mach_avr4},
146
  {"atmega48",   AVR_ISA_AVR4,    bfd_mach_avr4},
147
  {"atmega48a",  AVR_ISA_AVR4,    bfd_mach_avr4},
148
  {"atmega48p",  AVR_ISA_AVR4,    bfd_mach_avr4},
149
  {"atmega88",   AVR_ISA_AVR4,    bfd_mach_avr4},
150
  {"atmega88a",  AVR_ISA_AVR4,    bfd_mach_avr4},
151
  {"atmega88p",  AVR_ISA_AVR4,    bfd_mach_avr4},
152
  {"atmega88pa", AVR_ISA_AVR4,    bfd_mach_avr4},
153
  {"atmega8515", AVR_ISA_M8,      bfd_mach_avr4},
154
  {"atmega8535", AVR_ISA_M8,      bfd_mach_avr4},
155
  {"atmega8hva", AVR_ISA_AVR4,    bfd_mach_avr4},
156
  {"at90pwm1",   AVR_ISA_AVR4,    bfd_mach_avr4},
157
  {"at90pwm2",   AVR_ISA_AVR4,    bfd_mach_avr4},
158
  {"at90pwm2b",  AVR_ISA_AVR4,    bfd_mach_avr4},
159
  {"at90pwm3",   AVR_ISA_AVR4,    bfd_mach_avr4},
160
  {"at90pwm3b",  AVR_ISA_AVR4,    bfd_mach_avr4},
161
  {"at90pwm81",  AVR_ISA_AVR4,    bfd_mach_avr4},
162
  {"atmega16",   AVR_ISA_AVR5,    bfd_mach_avr5},
163
  {"atmega16a",  AVR_ISA_AVR5,    bfd_mach_avr5},
164
  {"atmega161",  AVR_ISA_M161,    bfd_mach_avr5},
165
  {"atmega162",  AVR_ISA_AVR5,    bfd_mach_avr5},
166
  {"atmega163",  AVR_ISA_M161,    bfd_mach_avr5},
167
  {"atmega164a", AVR_ISA_AVR5,    bfd_mach_avr5},
168
  {"atmega164p", AVR_ISA_AVR5,    bfd_mach_avr5},
169
  {"atmega165",  AVR_ISA_AVR5,    bfd_mach_avr5},
170
  {"atmega165a", AVR_ISA_AVR5,    bfd_mach_avr5},
171
  {"atmega165p", AVR_ISA_AVR5,    bfd_mach_avr5},
172
  {"atmega168",  AVR_ISA_AVR5,    bfd_mach_avr5},
173
  {"atmega168a", AVR_ISA_AVR5,    bfd_mach_avr5},
174
  {"atmega168p", AVR_ISA_AVR5,    bfd_mach_avr5},
175
  {"atmega169",  AVR_ISA_AVR5,    bfd_mach_avr5},
176
  {"atmega169a", AVR_ISA_AVR5,    bfd_mach_avr5},
177
  {"atmega169p", AVR_ISA_AVR5,    bfd_mach_avr5},
178
  {"atmega169pa",AVR_ISA_AVR5,    bfd_mach_avr5},
179
  {"atmega32",   AVR_ISA_AVR5,    bfd_mach_avr5},
180
  {"atmega323",  AVR_ISA_AVR5,    bfd_mach_avr5},
181
  {"atmega324a", AVR_ISA_AVR5,    bfd_mach_avr5},
182
  {"atmega324p", AVR_ISA_AVR5,    bfd_mach_avr5},
183
  {"atmega324pa",AVR_ISA_AVR5,    bfd_mach_avr5},
184
  {"atmega325",  AVR_ISA_AVR5,    bfd_mach_avr5},
185
  {"atmega325a", AVR_ISA_AVR5,    bfd_mach_avr5},
186
  {"atmega325p", AVR_ISA_AVR5,    bfd_mach_avr5},
187
  {"atmega325pa",AVR_ISA_AVR5,    bfd_mach_avr5},
188
  {"atmega3250", AVR_ISA_AVR5,    bfd_mach_avr5},
189
  {"atmega3250a",AVR_ISA_AVR5,    bfd_mach_avr5},
190
  {"atmega3250p",AVR_ISA_AVR5,    bfd_mach_avr5},
191
  {"atmega3250pa",AVR_ISA_AVR5,   bfd_mach_avr5},
192
  {"atmega328",  AVR_ISA_AVR5,    bfd_mach_avr5},
193
  {"atmega328p", AVR_ISA_AVR5,    bfd_mach_avr5},
194
  {"atmega329",  AVR_ISA_AVR5,    bfd_mach_avr5},
195
  {"atmega329a", AVR_ISA_AVR5,    bfd_mach_avr5},
196
  {"atmega329p", AVR_ISA_AVR5,    bfd_mach_avr5},
197
  {"atmega329pa",AVR_ISA_AVR5,    bfd_mach_avr5},
198
  {"atmega3290", AVR_ISA_AVR5,    bfd_mach_avr5},
199
  {"atmega3290a",AVR_ISA_AVR5,    bfd_mach_avr5},
200
  {"atmega3290p",AVR_ISA_AVR5,    bfd_mach_avr5},
201
  {"atmega3290pa",AVR_ISA_AVR5,   bfd_mach_avr5},
202
  {"atmega406",  AVR_ISA_AVR5,    bfd_mach_avr5},
203
  {"atmega64",   AVR_ISA_AVR5,    bfd_mach_avr5},
204
  {"atmega640",  AVR_ISA_AVR5,    bfd_mach_avr5},
205
  {"atmega644",  AVR_ISA_AVR5,    bfd_mach_avr5},
206
  {"atmega644a", AVR_ISA_AVR5,    bfd_mach_avr5},
207
  {"atmega644p", AVR_ISA_AVR5,    bfd_mach_avr5},
208
  {"atmega644pa",AVR_ISA_AVR5,    bfd_mach_avr5},
209
  {"atmega645",  AVR_ISA_AVR5,    bfd_mach_avr5},
210
  {"atmega645a", AVR_ISA_AVR5,    bfd_mach_avr5},
211
  {"atmega645p", AVR_ISA_AVR5,    bfd_mach_avr5},
212
  {"atmega649",  AVR_ISA_AVR5,    bfd_mach_avr5},
213
  {"atmega649a", AVR_ISA_AVR5,    bfd_mach_avr5},
214
  {"atmega649p", AVR_ISA_AVR5,    bfd_mach_avr5},
215
  {"atmega6450", AVR_ISA_AVR5,    bfd_mach_avr5},
216
  {"atmega6450a",AVR_ISA_AVR5,    bfd_mach_avr5},
217
  {"atmega6450p",AVR_ISA_AVR5,    bfd_mach_avr5},
218
  {"atmega6490", AVR_ISA_AVR5,    bfd_mach_avr5},
219
  {"atmega6490a",AVR_ISA_AVR5,    bfd_mach_avr5},
220
  {"atmega6490p",AVR_ISA_AVR5,    bfd_mach_avr5},
221
  {"atmega16hva",AVR_ISA_AVR5,    bfd_mach_avr5},
222
  {"atmega16hva2",AVR_ISA_AVR5,    bfd_mach_avr5},
223
  {"atmega16hvb",AVR_ISA_AVR5,    bfd_mach_avr5},
224
  {"atmega16hvbrevb",AVR_ISA_AVR5,bfd_mach_avr5},
225
  {"atmega32hvb",AVR_ISA_AVR5,    bfd_mach_avr5},
226
  {"atmega32hvbrevb",AVR_ISA_AVR5,bfd_mach_avr5},
227
  {"atmega64hve",AVR_ISA_AVR5,    bfd_mach_avr5},
228
  {"at90can32" , AVR_ISA_AVR5,    bfd_mach_avr5},
229
  {"at90can64" , AVR_ISA_AVR5,    bfd_mach_avr5},
230
  {"at90pwm161", AVR_ISA_AVR5,    bfd_mach_avr5},
231
  {"at90pwm216", AVR_ISA_AVR5,    bfd_mach_avr5},
232
  {"at90pwm316", AVR_ISA_AVR5,    bfd_mach_avr5},
233
  {"atmega32c1", AVR_ISA_AVR5,    bfd_mach_avr5},
234
  {"atmega64c1", AVR_ISA_AVR5,    bfd_mach_avr5},
235
  {"atmega16m1", AVR_ISA_AVR5,    bfd_mach_avr5},
236
  {"atmega32m1", AVR_ISA_AVR5,    bfd_mach_avr5},
237
  {"atmega64m1", AVR_ISA_AVR5,    bfd_mach_avr5},
238
  {"atmega16u4", AVR_ISA_AVR5,    bfd_mach_avr5},
239
  {"atmega32u4", AVR_ISA_AVR5,    bfd_mach_avr5},
240
  {"atmega32u6", AVR_ISA_AVR5,    bfd_mach_avr5},
241
  {"at90usb646", AVR_ISA_AVR5,    bfd_mach_avr5},
242
  {"at90usb647", AVR_ISA_AVR5,    bfd_mach_avr5},
243
  {"at90scr100", AVR_ISA_AVR5,    bfd_mach_avr5},
244
  {"at94k",      AVR_ISA_94K,     bfd_mach_avr5},
245
  {"m3000",      AVR_ISA_AVR5,    bfd_mach_avr5},
246
  {"atmega128",  AVR_ISA_AVR51,   bfd_mach_avr51},
247
  {"atmega1280", AVR_ISA_AVR51,   bfd_mach_avr51},
248
  {"atmega1281", AVR_ISA_AVR51,   bfd_mach_avr51},
249
  {"atmega1284p",AVR_ISA_AVR51,   bfd_mach_avr51},
250
  {"atmega128rfa1",AVR_ISA_AVR51, bfd_mach_avr51},
251
  {"at90can128", AVR_ISA_AVR51,   bfd_mach_avr51},
252
  {"at90usb1286",AVR_ISA_AVR51,   bfd_mach_avr51},
253
  {"at90usb1287",AVR_ISA_AVR51,   bfd_mach_avr51},
254
  {"atmega2560", AVR_ISA_AVR6,    bfd_mach_avr6},
255
  {"atmega2561", AVR_ISA_AVR6,    bfd_mach_avr6},
256
  {"atxmega16a4", AVR_ISA_XMEGA,  bfd_mach_avrxmega2},
257
  {"atxmega16d4", AVR_ISA_XMEGA,  bfd_mach_avrxmega2},
258
  {"atxmega16x1", AVR_ISA_XMEGA,  bfd_mach_avrxmega2},
259
  {"atxmega32a4", AVR_ISA_XMEGA,  bfd_mach_avrxmega2},
260
  {"atxmega32d4", AVR_ISA_XMEGA,  bfd_mach_avrxmega2},
261
  {"atxmega32x1", AVR_ISA_XMEGA,  bfd_mach_avrxmega2},
262
  {"atxmega64a3", AVR_ISA_XMEGA,  bfd_mach_avrxmega4},
263
  {"atxmega64d3", AVR_ISA_XMEGA,  bfd_mach_avrxmega4},
264
  {"atxmega64a1", AVR_ISA_XMEGA,  bfd_mach_avrxmega5},
265
  {"atxmega64a1u",AVR_ISA_XMEGA,  bfd_mach_avrxmega5},
266
  {"atxmega128a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
267
  {"atxmega128b1", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
268
  {"atxmega128d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
269
  {"atxmega192a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
270
  {"atxmega192d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
271
  {"atxmega256a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
272
  {"atxmega256a3b",AVR_ISA_XMEGA, bfd_mach_avrxmega6},
273
  {"atxmega256a3bu",AVR_ISA_XMEGA,bfd_mach_avrxmega6},
274
  {"atxmega256d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
275
  {"atxmega128a1", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
276
  {"atxmega128a1u", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
277
  {NULL, 0, 0}
278
};
279
 
280
/* Current MCU type.  */
281
static struct mcu_type_s   default_mcu = {"avr2", AVR_ISA_AVR2, bfd_mach_avr2};
282
static struct mcu_type_s * avr_mcu = & default_mcu;
283
 
284
/* AVR target-specific switches.  */
285
struct avr_opt_s
286
{
287
  int all_opcodes;  /* -mall-opcodes: accept all known AVR opcodes.  */
288
  int no_skip_bug;  /* -mno-skip-bug: no warnings for skipping 2-word insns.  */
289
  int no_wrap;      /* -mno-wrap: reject rjmp/rcall with 8K wrap-around.  */
290
};
291
 
292
static struct avr_opt_s avr_opt = { 0, 0, 0 };
293
 
294
const char EXP_CHARS[] = "eE";
295
const char FLT_CHARS[] = "dD";
296
 
297
static void avr_set_arch (int);
298
 
299
/* The target specific pseudo-ops which we support.  */
300
const pseudo_typeS md_pseudo_table[] =
301
{
302
  {"arch", avr_set_arch,        0},
303
  { NULL,       NULL,           0}
304
};
305
 
306
#define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
307
 
308
#define EXP_MOD_NAME(i)       exp_mod[i].name
309
#define EXP_MOD_RELOC(i)      exp_mod[i].reloc
310
#define EXP_MOD_NEG_RELOC(i)  exp_mod[i].neg_reloc
311
#define HAVE_PM_P(i)          exp_mod[i].have_pm
312
 
313
struct exp_mod_s
314
{
315
  char *                    name;
316
  bfd_reloc_code_real_type  reloc;
317
  bfd_reloc_code_real_type  neg_reloc;
318
  int                       have_pm;
319
};
320
 
321
static struct exp_mod_s exp_mod[] =
322
{
323
  {"hh8",    BFD_RELOC_AVR_HH8_LDI,    BFD_RELOC_AVR_HH8_LDI_NEG,    1},
324
  {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0},
325
  {"hi8",    BFD_RELOC_AVR_HI8_LDI,    BFD_RELOC_AVR_HI8_LDI_NEG,    1},
326
  {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0},
327
  {"lo8",    BFD_RELOC_AVR_LO8_LDI,    BFD_RELOC_AVR_LO8_LDI_NEG,    1},
328
  {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
329
  {"hlo8",   BFD_RELOC_AVR_HH8_LDI,    BFD_RELOC_AVR_HH8_LDI_NEG,    0},
330
  {"hhi8",   BFD_RELOC_AVR_MS8_LDI,    BFD_RELOC_AVR_MS8_LDI_NEG,    0},
331
};
332
 
333
/* A union used to store indicies into the exp_mod[] array
334
   in a hash table which expects void * data types.  */
335
typedef union
336
{
337
  void * ptr;
338
  int    index;
339
} mod_index;
340
 
341
/* Opcode hash table.  */
342
static struct hash_control *avr_hash;
343
 
344
/* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx).  */
345
static struct hash_control *avr_mod_hash;
346
 
347
#define OPTION_MMCU 'm'
348
enum options
349
{
350
  OPTION_ALL_OPCODES = OPTION_MD_BASE + 1,
351
  OPTION_NO_SKIP_BUG,
352
  OPTION_NO_WRAP
353
};
354
 
355
struct option md_longopts[] =
356
{
357
  { "mmcu",   required_argument, NULL, OPTION_MMCU        },
358
  { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
359
  { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG },
360
  { "mno-wrap",     no_argument, NULL, OPTION_NO_WRAP     },
361
  { NULL, no_argument, NULL, 0 }
362
};
363
 
364
size_t md_longopts_size = sizeof (md_longopts);
365
 
366
/* Display nicely formatted list of known MCU names.  */
367
 
368
static void
369
show_mcu_list (FILE *stream)
370
{
371
  int i, x;
372
 
373
  fprintf (stream, _("Known MCU names:"));
374
  x = 1000;
375
 
376
  for (i = 0; mcu_types[i].name; i++)
377
    {
378
      int len = strlen (mcu_types[i].name);
379
 
380
      x += len + 1;
381
 
382
      if (x < 75)
383
        fprintf (stream, " %s", mcu_types[i].name);
384
      else
385
        {
386
          fprintf (stream, "\n  %s", mcu_types[i].name);
387
          x = len + 2;
388
        }
389
    }
390
 
391
  fprintf (stream, "\n");
392
}
393
 
394
static inline char *
395
skip_space (char *s)
396
{
397
  while (*s == ' ' || *s == '\t')
398
    ++s;
399
  return s;
400
}
401
 
402
/* Extract one word from FROM and copy it to TO.  */
403
 
404
static char *
405
extract_word (char *from, char *to, int limit)
406
{
407
  char *op_end;
408
  int size = 0;
409
 
410
  /* Drop leading whitespace.  */
411
  from = skip_space (from);
412
  *to = 0;
413
 
414
  /* Find the op code end.  */
415
  for (op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
416
    {
417
      to[size++] = *op_end++;
418
      if (size + 1 >= limit)
419
        break;
420
    }
421
 
422
  to[size] = 0;
423
  return op_end;
424
}
425
 
426
int
427
md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
428
                               asection *seg ATTRIBUTE_UNUSED)
429
{
430
  abort ();
431
  return 0;
432
}
433
 
434
void
435
md_show_usage (FILE *stream)
436
{
437
  fprintf (stream,
438
      _("AVR Assembler options:\n"
439
        "  -mmcu=[avr-name] select microcontroller variant\n"
440
        "                   [avr-name] can be:\n"
441
        "                   avr1  - classic AVR core without data RAM\n"
442
        "                   avr2  - classic AVR core with up to 8K program memory\n"
443
        "                   avr25 - classic AVR core with up to 8K program memory\n"
444
        "                           plus the MOVW instruction\n"
445
        "                   avr3  - classic AVR core with up to 64K program memory\n"
446
        "                   avr31 - classic AVR core with up to 128K program memory\n"
447
        "                   avr35 - classic AVR core with up to 64K program memory\n"
448
        "                           plus the MOVW instruction\n"
449
        "                   avr4  - enhanced AVR core with up to 8K program memory\n"
450
        "                   avr5  - enhanced AVR core with up to 64K program memory\n"
451
        "                   avr51 - enhanced AVR core with up to 128K program memory\n"
452
        "                   avr6  - enhanced AVR core with up to 256K program memory\n"
453
        "                   avrxmega3 - XMEGA, > 8K, <= 64K FLASH, > 64K RAM\n"
454
        "                   avrxmega4 - XMEGA, > 64K, <= 128K FLASH, <= 64K RAM\n"
455
        "                   avrxmega5 - XMEGA, > 64K, <= 128K FLASH, > 64K RAM\n"
456
        "                   avrxmega6 - XMEGA, > 128K, <= 256K FLASH, <= 64K RAM\n"
457
        "                   avrxmega7 - XMEGA, > 128K, <= 256K FLASH, > 64K RAM\n"
458
        "                   or immediate microcontroller name.\n"));
459
  fprintf (stream,
460
      _("  -mall-opcodes    accept all AVR opcodes, even if not supported by MCU\n"
461
        "  -mno-skip-bug    disable warnings for skipping two-word instructions\n"
462
        "                   (default for avr4, avr5)\n"
463
        "  -mno-wrap        reject rjmp/rcall instructions with 8K wrap-around\n"
464
        "                   (default for avr3, avr5)\n"));
465
  show_mcu_list (stream);
466
}
467
 
468
static void
469
avr_set_arch (int dummy ATTRIBUTE_UNUSED)
470
{
471
  char str[20];
472
 
473
  input_line_pointer = extract_word (input_line_pointer, str, 20);
474
  md_parse_option (OPTION_MMCU, str);
475
  bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
476
}
477
 
478
int
479
md_parse_option (int c, char *arg)
480
{
481
  switch (c)
482
    {
483
    case OPTION_MMCU:
484
      {
485
        int i;
486
        char *s = alloca (strlen (arg) + 1);
487
 
488
        {
489
          char *t = s;
490
          char *arg1 = arg;
491
 
492
          do
493
            *t = TOLOWER (*arg1++);
494
          while (*t++);
495
        }
496
 
497
        for (i = 0; mcu_types[i].name; ++i)
498
          if (strcmp (mcu_types[i].name, s) == 0)
499
            break;
500
 
501
        if (!mcu_types[i].name)
502
          {
503
            show_mcu_list (stderr);
504
            as_fatal (_("unknown MCU: %s\n"), arg);
505
          }
506
 
507
        /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
508
           type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
509
           as .arch ... in the asm output at the same time.  */
510
        if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach)
511
          avr_mcu = &mcu_types[i];
512
        else
513
          as_fatal (_("redefinition of mcu type `%s' to `%s'"),
514
                    avr_mcu->name, mcu_types[i].name);
515
        return 1;
516
      }
517
    case OPTION_ALL_OPCODES:
518
      avr_opt.all_opcodes = 1;
519
      return 1;
520
    case OPTION_NO_SKIP_BUG:
521
      avr_opt.no_skip_bug = 1;
522
      return 1;
523
    case OPTION_NO_WRAP:
524
      avr_opt.no_wrap = 1;
525
      return 1;
526
    }
527
 
528
  return 0;
529
}
530
 
531
symbolS *
532
md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
533
{
534
  return NULL;
535
}
536
 
537
char *
538
md_atof (int type, char *litP, int *sizeP)
539
{
540
  return ieee_md_atof (type, litP, sizeP, FALSE);
541
}
542
 
543
void
544
md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
545
                 asection *sec ATTRIBUTE_UNUSED,
546
                 fragS *fragP ATTRIBUTE_UNUSED)
547
{
548
  abort ();
549
}
550
 
551
void
552
md_begin (void)
553
{
554
  unsigned int i;
555
  struct avr_opcodes_s *opcode;
556
 
557
  avr_hash = hash_new ();
558
 
559
  /* Insert unique names into hash table.  This hash table then provides a
560
     quick index to the first opcode with a particular name in the opcode
561
     table.  */
562
  for (opcode = avr_opcodes; opcode->name; opcode++)
563
    hash_insert (avr_hash, opcode->name, (char *) opcode);
564
 
565
  avr_mod_hash = hash_new ();
566
 
567
  for (i = 0; i < ARRAY_SIZE (exp_mod); ++i)
568
    {
569
      mod_index m;
570
 
571
      m.index = i + 10;
572
      hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr);
573
    }
574
 
575
  bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
576
}
577
 
578
/* Resolve STR as a constant expression and return the result.
579
   If result greater than MAX then error.  */
580
 
581
static unsigned int
582
avr_get_constant (char *str, int max)
583
{
584
  expressionS ex;
585
 
586
  str = skip_space (str);
587
  input_line_pointer = str;
588
  expression (& ex);
589
 
590
  if (ex.X_op != O_constant)
591
    as_bad (_("constant value required"));
592
 
593
  if (ex.X_add_number > max || ex.X_add_number < 0)
594
    as_bad (_("number must be positive and less than %d"), max + 1);
595
 
596
  return ex.X_add_number;
597
}
598
 
599
/* Parse for ldd/std offset.  */
600
 
601
static void
602
avr_offset_expression (expressionS *exp)
603
{
604
  char *str = input_line_pointer;
605
  char *tmp;
606
  char op[8];
607
 
608
  tmp = str;
609
  str = extract_word (str, op, sizeof (op));
610
 
611
  input_line_pointer = tmp;
612
  expression (exp);
613
 
614
  /* Warn about expressions that fail to use lo8 ().  */
615
  if (exp->X_op == O_constant)
616
    {
617
      int x = exp->X_add_number;
618
 
619
      if (x < -255 || x > 255)
620
        as_warn (_("constant out of 8-bit range: %d"), x);
621
    }
622
}
623
 
624
/* Parse ordinary expression.  */
625
 
626
static char *
627
parse_exp (char *s, expressionS *op)
628
{
629
  input_line_pointer = s;
630
  expression (op);
631
  if (op->X_op == O_absent)
632
    as_bad (_("missing operand"));
633
  return input_line_pointer;
634
}
635
 
636
/* Parse special expressions (needed for LDI command):
637
   xx8 (address)
638
   xx8 (-address)
639
   pm_xx8 (address)
640
   pm_xx8 (-address)
641
   where xx is: hh, hi, lo.  */
642
 
643
static bfd_reloc_code_real_type
644
avr_ldi_expression (expressionS *exp)
645
{
646
  char *str = input_line_pointer;
647
  char *tmp;
648
  char op[8];
649
  int mod;
650
  int linker_stubs_should_be_generated = 0;
651
 
652
  tmp = str;
653
 
654
  str = extract_word (str, op, sizeof (op));
655
 
656
  if (op[0])
657
    {
658
      mod_index m;
659
 
660
      m.ptr = hash_find (avr_mod_hash, op);
661
      mod = m.index;
662
 
663
      if (mod)
664
        {
665
          int closes = 0;
666
 
667
          mod -= 10;
668
          str = skip_space (str);
669
 
670
          if (*str == '(')
671
            {
672
              bfd_reloc_code_real_type  reloc_to_return;
673
              int neg_p = 0;
674
 
675
              ++str;
676
 
677
              if (strncmp ("pm(", str, 3) == 0
678
                  || strncmp ("gs(",str,3) == 0
679
                  || strncmp ("-(gs(",str,5) == 0
680
                  || strncmp ("-(pm(", str, 5) == 0)
681
                {
682
                  if (HAVE_PM_P (mod))
683
                    {
684
                      ++mod;
685
                      ++closes;
686
                    }
687
                  else
688
                    as_bad (_("illegal expression"));
689
 
690
                  if (str[0] == 'g' || str[2] == 'g')
691
                    linker_stubs_should_be_generated = 1;
692
 
693
                  if (*str == '-')
694
                    {
695
                      neg_p = 1;
696
                      ++closes;
697
                      str += 5;
698
                    }
699
                  else
700
                    str += 3;
701
                }
702
 
703
              if (*str == '-' && *(str + 1) == '(')
704
                {
705
                  neg_p ^= 1;
706
                  ++closes;
707
                  str += 2;
708
                }
709
 
710
              input_line_pointer = str;
711
              expression (exp);
712
 
713
              do
714
                {
715
                  if (*input_line_pointer != ')')
716
                    {
717
                      as_bad (_("`)' required"));
718
                      break;
719
                    }
720
                  input_line_pointer++;
721
                }
722
              while (closes--);
723
 
724
              reloc_to_return =
725
                neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
726
              if (linker_stubs_should_be_generated)
727
                {
728
                  switch (reloc_to_return)
729
                    {
730
                    case BFD_RELOC_AVR_LO8_LDI_PM:
731
                      reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS;
732
                      break;
733
                    case BFD_RELOC_AVR_HI8_LDI_PM:
734
                      reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS;
735
                      break;
736
 
737
                    default:
738
                      /* PR 5523: Do not generate a warning here,
739
                         legitimate code can trigger this case.  */
740
                      break;
741
                    }
742
                }
743
              return reloc_to_return;
744
            }
745
        }
746
    }
747
 
748
  input_line_pointer = tmp;
749
  expression (exp);
750
 
751
  /* Warn about expressions that fail to use lo8 ().  */
752
  if (exp->X_op == O_constant)
753
    {
754
      int x = exp->X_add_number;
755
 
756
      if (x < -255 || x > 255)
757
        as_warn (_("constant out of 8-bit range: %d"), x);
758
    }
759
 
760
  return BFD_RELOC_AVR_LDI;
761
}
762
 
763
/* Parse one instruction operand.
764
   Return operand bitmask.  Also fixups can be generated.  */
765
 
766
static unsigned int
767
avr_operand (struct avr_opcodes_s *opcode,
768
             int where,
769
             char *op,
770
             char **line)
771
{
772
  expressionS op_expr;
773
  unsigned int op_mask = 0;
774
  char *str = skip_space (*line);
775
 
776
  switch (*op)
777
    {
778
      /* Any register operand.  */
779
    case 'w':
780
    case 'd':
781
    case 'r':
782
    case 'a':
783
    case 'v':
784
      if (*str == 'r' || *str == 'R')
785
        {
786
          char r_name[20];
787
 
788
          str = extract_word (str, r_name, sizeof (r_name));
789
          op_mask = 0xff;
790
          if (ISDIGIT (r_name[1]))
791
            {
792
              if (r_name[2] == '\0')
793
                op_mask = r_name[1] - '0';
794
              else if (r_name[1] != '0'
795
                       && ISDIGIT (r_name[2])
796
                       && r_name[3] == '\0')
797
                op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
798
            }
799
        }
800
      else
801
        {
802
          op_mask = avr_get_constant (str, 31);
803
          str = input_line_pointer;
804
        }
805
 
806
      if (op_mask <= 31)
807
        {
808
          switch (*op)
809
            {
810
            case 'a':
811
              if (op_mask < 16 || op_mask > 23)
812
                as_bad (_("register r16-r23 required"));
813
              op_mask -= 16;
814
              break;
815
 
816
            case 'd':
817
              if (op_mask < 16)
818
                as_bad (_("register number above 15 required"));
819
              op_mask -= 16;
820
              break;
821
 
822
            case 'v':
823
              if (op_mask & 1)
824
                as_bad (_("even register number required"));
825
              op_mask >>= 1;
826
              break;
827
 
828
            case 'w':
829
              if ((op_mask & 1) || op_mask < 24)
830
                as_bad (_("register r24, r26, r28 or r30 required"));
831
              op_mask = (op_mask - 24) >> 1;
832
              break;
833
            }
834
          break;
835
        }
836
      as_bad (_("register name or number from 0 to 31 required"));
837
      break;
838
 
839
    case 'e':
840
      {
841
        char c;
842
 
843
        if (*str == '-')
844
          {
845
            str = skip_space (str + 1);
846
            op_mask = 0x1002;
847
          }
848
        c = TOLOWER (*str);
849
        if (c == 'x')
850
          op_mask |= 0x100c;
851
        else if (c == 'y')
852
          op_mask |= 0x8;
853
        else if (c != 'z')
854
          as_bad (_("pointer register (X, Y or Z) required"));
855
 
856
        str = skip_space (str + 1);
857
        if (*str == '+')
858
          {
859
            ++str;
860
            if (op_mask & 2)
861
              as_bad (_("cannot both predecrement and postincrement"));
862
            op_mask |= 0x1001;
863
          }
864
 
865
        /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
866
           registers, no predecrement, no postincrement.  */
867
        if (!avr_opt.all_opcodes && (op_mask & 0x100F)
868
            && !(avr_mcu->isa & AVR_ISA_SRAM))
869
          as_bad (_("addressing mode not supported"));
870
      }
871
      break;
872
 
873
    case 'z':
874
      if (*str == '-')
875
        as_bad (_("can't predecrement"));
876
 
877
      if (! (*str == 'z' || *str == 'Z'))
878
        as_bad (_("pointer register Z required"));
879
 
880
      str = skip_space (str + 1);
881
 
882
      if (*str == '+')
883
        {
884
          ++str;
885
          char *s;
886
          for (s = opcode->opcode; *s; ++s)
887
            {
888
              if (*s == '+')
889
                op_mask |= (1 << (15 - (s - opcode->opcode)));
890
            }
891
        }
892
 
893
      /* attiny26 can do "lpm" and "lpm r,Z" but not "lpm r,Z+".  */
894
      if (!avr_opt.all_opcodes
895
          && (op_mask & 0x0001)
896
          && !(avr_mcu->isa & AVR_ISA_MOVW))
897
        as_bad (_("postincrement not supported"));
898
      break;
899
 
900
    case 'b':
901
      {
902
        char c = TOLOWER (*str++);
903
 
904
        if (c == 'y')
905
          op_mask |= 0x8;
906
        else if (c != 'z')
907
          as_bad (_("pointer register (Y or Z) required"));
908
        str = skip_space (str);
909
        if (*str++ == '+')
910
          {
911
            input_line_pointer = str;
912
            avr_offset_expression (& op_expr);
913
            str = input_line_pointer;
914
            fix_new_exp (frag_now, where, 3,
915
                         &op_expr, FALSE, BFD_RELOC_AVR_6);
916
          }
917
      }
918
      break;
919
 
920
    case 'h':
921
      str = parse_exp (str, &op_expr);
922
      fix_new_exp (frag_now, where, opcode->insn_size * 2,
923
                   &op_expr, FALSE, BFD_RELOC_AVR_CALL);
924
      break;
925
 
926
    case 'L':
927
      str = parse_exp (str, &op_expr);
928
      fix_new_exp (frag_now, where, opcode->insn_size * 2,
929
                   &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL);
930
      break;
931
 
932
    case 'l':
933
      str = parse_exp (str, &op_expr);
934
      fix_new_exp (frag_now, where, opcode->insn_size * 2,
935
                   &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL);
936
      break;
937
 
938
    case 'i':
939
      str = parse_exp (str, &op_expr);
940
      fix_new_exp (frag_now, where + 2, opcode->insn_size * 2,
941
                   &op_expr, FALSE, BFD_RELOC_16);
942
      break;
943
 
944
    case 'M':
945
      {
946
        bfd_reloc_code_real_type r_type;
947
 
948
        input_line_pointer = str;
949
        r_type = avr_ldi_expression (&op_expr);
950
        str = input_line_pointer;
951
        fix_new_exp (frag_now, where, 3,
952
                     &op_expr, FALSE, r_type);
953
      }
954
      break;
955
 
956
    case 'n':
957
      {
958
        unsigned int x;
959
 
960
        x = ~avr_get_constant (str, 255);
961
        str = input_line_pointer;
962
        op_mask |= (x & 0xf) | ((x << 4) & 0xf00);
963
      }
964
      break;
965
 
966
    case 'K':
967
      input_line_pointer = str;
968
      avr_offset_expression (& op_expr);
969
      str = input_line_pointer;
970
      fix_new_exp (frag_now, where, 3,
971
                   & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW);
972
      break;
973
 
974
    case 'S':
975
    case 's':
976
      {
977
        unsigned int x;
978
 
979
        x = avr_get_constant (str, 7);
980
        str = input_line_pointer;
981
        if (*op == 'S')
982
          x <<= 4;
983
        op_mask |= x;
984
      }
985
      break;
986
 
987
    case 'P':
988
      {
989
        unsigned int x;
990
 
991
        x = avr_get_constant (str, 63);
992
        str = input_line_pointer;
993
        op_mask |= (x & 0xf) | ((x & 0x30) << 5);
994
      }
995
      break;
996
 
997
    case 'p':
998
      {
999
        unsigned int x;
1000
 
1001
        x = avr_get_constant (str, 31);
1002
        str = input_line_pointer;
1003
        op_mask |= x << 3;
1004
      }
1005
      break;
1006
 
1007
    case 'E':
1008
      {
1009
        unsigned int x;
1010
 
1011
        x = avr_get_constant (str, 15);
1012
        str = input_line_pointer;
1013
        op_mask |= (x << 4);
1014
      }
1015
      break;
1016
 
1017
    case '?':
1018
      break;
1019
 
1020
    default:
1021
      as_bad (_("unknown constraint `%c'"), *op);
1022
    }
1023
 
1024
  *line = str;
1025
  return op_mask;
1026
}
1027
 
1028
/* Parse instruction operands.
1029
   Return binary opcode.  */
1030
 
1031
static unsigned int
1032
avr_operands (struct avr_opcodes_s *opcode, char **line)
1033
{
1034
  char *op = opcode->constraints;
1035
  unsigned int bin = opcode->bin_opcode;
1036
  char *frag = frag_more (opcode->insn_size * 2);
1037
  char *str = *line;
1038
  int where = frag - frag_now->fr_literal;
1039
  static unsigned int prev = 0;  /* Previous opcode.  */
1040
 
1041
  /* Opcode have operands.  */
1042
  if (*op)
1043
    {
1044
      unsigned int reg1 = 0;
1045
      unsigned int reg2 = 0;
1046
      int reg1_present = 0;
1047
      int reg2_present = 0;
1048
 
1049
      /* Parse first operand.  */
1050
      if (REGISTER_P (*op))
1051
        reg1_present = 1;
1052
      reg1 = avr_operand (opcode, where, op, &str);
1053
      ++op;
1054
 
1055
      /* Parse second operand.  */
1056
      if (*op)
1057
        {
1058
          if (*op == ',')
1059
            ++op;
1060
 
1061
          if (*op == '=')
1062
            {
1063
              reg2 = reg1;
1064
              reg2_present = 1;
1065
            }
1066
          else
1067
            {
1068
              if (REGISTER_P (*op))
1069
                reg2_present = 1;
1070
 
1071
              str = skip_space (str);
1072
              if (*str++ != ',')
1073
                as_bad (_("`,' required"));
1074
              str = skip_space (str);
1075
 
1076
              reg2 = avr_operand (opcode, where, op, &str);
1077
            }
1078
 
1079
          if (reg1_present && reg2_present)
1080
            reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200);
1081
          else if (reg2_present)
1082
            reg2 <<= 4;
1083
        }
1084
      if (reg1_present)
1085
        reg1 <<= 4;
1086
      bin |= reg1 | reg2;
1087
    }
1088
 
1089
  /* Detect undefined combinations (like ld r31,Z+).  */
1090
  if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin))
1091
    as_warn (_("undefined combination of operands"));
1092
 
1093
  if (opcode->insn_size == 2)
1094
    {
1095
      /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
1096
         (AVR core bug, fixed in the newer devices).  */
1097
      if (!(avr_opt.no_skip_bug ||
1098
            (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW)))
1099
          && AVR_SKIP_P (prev))
1100
        as_warn (_("skipping two-word instruction"));
1101
 
1102
      bfd_putl32 ((bfd_vma) bin, frag);
1103
    }
1104
  else
1105
    bfd_putl16 ((bfd_vma) bin, frag);
1106
 
1107
  prev = bin;
1108
  *line = str;
1109
  return bin;
1110
}
1111
 
1112
/* GAS will call this function for each section at the end of the assembly,
1113
   to permit the CPU backend to adjust the alignment of a section.  */
1114
 
1115
valueT
1116
md_section_align (asection *seg, valueT addr)
1117
{
1118
  int align = bfd_get_section_alignment (stdoutput, seg);
1119
  return ((addr + (1 << align) - 1) & (-1 << align));
1120
}
1121
 
1122
/* If you define this macro, it should return the offset between the
1123
   address of a PC relative fixup and the position from which the PC
1124
   relative adjustment should be made.  On many processors, the base
1125
   of a PC relative instruction is the next instruction, so this
1126
   macro would return the length of an instruction.  */
1127
 
1128
long
1129
md_pcrel_from_section (fixS *fixp, segT sec)
1130
{
1131
  if (fixp->fx_addsy != (symbolS *) NULL
1132
      && (!S_IS_DEFINED (fixp->fx_addsy)
1133
          || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
1134
    return 0;
1135
 
1136
  return fixp->fx_frag->fr_address + fixp->fx_where;
1137
}
1138
 
1139
/* GAS will call this for each fixup.  It should store the correct
1140
   value in the object file.  */
1141
 
1142
void
1143
md_apply_fix (fixS *fixP, valueT * valP, segT seg)
1144
{
1145
  unsigned char *where;
1146
  unsigned long insn;
1147
  long value = *valP;
1148
 
1149
  if (fixP->fx_addsy == (symbolS *) NULL)
1150
    fixP->fx_done = 1;
1151
 
1152
  else if (fixP->fx_pcrel)
1153
    {
1154
      segT s = S_GET_SEGMENT (fixP->fx_addsy);
1155
 
1156
      if (s == seg || s == absolute_section)
1157
        {
1158
          value += S_GET_VALUE (fixP->fx_addsy);
1159
          fixP->fx_done = 1;
1160
        }
1161
    }
1162
 
1163
  /* We don't actually support subtracting a symbol.  */
1164
  if (fixP->fx_subsy != (symbolS *) NULL)
1165
    as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1166
 
1167
  switch (fixP->fx_r_type)
1168
    {
1169
    default:
1170
      fixP->fx_no_overflow = 1;
1171
      break;
1172
    case BFD_RELOC_AVR_7_PCREL:
1173
    case BFD_RELOC_AVR_13_PCREL:
1174
    case BFD_RELOC_32:
1175
    case BFD_RELOC_16:
1176
    case BFD_RELOC_AVR_CALL:
1177
      break;
1178
    }
1179
 
1180
  if (fixP->fx_done)
1181
    {
1182
      /* Fetch the instruction, insert the fully resolved operand
1183
         value, and stuff the instruction back again.  */
1184
      where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
1185
      insn = bfd_getl16 (where);
1186
 
1187
      switch (fixP->fx_r_type)
1188
        {
1189
        case BFD_RELOC_AVR_7_PCREL:
1190
          if (value & 1)
1191
            as_bad_where (fixP->fx_file, fixP->fx_line,
1192
                          _("odd address operand: %ld"), value);
1193
 
1194
          /* Instruction addresses are always right-shifted by 1.  */
1195
          value >>= 1;
1196
          --value;                      /* Correct PC.  */
1197
 
1198
          if (value < -64 || value > 63)
1199
            as_bad_where (fixP->fx_file, fixP->fx_line,
1200
                          _("operand out of range: %ld"), value);
1201
          value = (value << 3) & 0x3f8;
1202
          bfd_putl16 ((bfd_vma) (value | insn), where);
1203
          break;
1204
 
1205
        case BFD_RELOC_AVR_13_PCREL:
1206
          if (value & 1)
1207
            as_bad_where (fixP->fx_file, fixP->fx_line,
1208
                          _("odd address operand: %ld"), value);
1209
 
1210
          /* Instruction addresses are always right-shifted by 1.  */
1211
          value >>= 1;
1212
          --value;                      /* Correct PC.  */
1213
 
1214
          if (value < -2048 || value > 2047)
1215
            {
1216
              /* No wrap for devices with >8K of program memory.  */
1217
              if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap)
1218
                as_bad_where (fixP->fx_file, fixP->fx_line,
1219
                              _("operand out of range: %ld"), value);
1220
            }
1221
 
1222
          value &= 0xfff;
1223
          bfd_putl16 ((bfd_vma) (value | insn), where);
1224
          break;
1225
 
1226
        case BFD_RELOC_32:
1227
          bfd_putl16 ((bfd_vma) value, where);
1228
          break;
1229
 
1230
        case BFD_RELOC_16:
1231
          bfd_putl16 ((bfd_vma) value, where);
1232
          break;
1233
 
1234
        case BFD_RELOC_8:
1235
          if (value > 255 || value < -128)
1236
            as_warn_where (fixP->fx_file, fixP->fx_line,
1237
                           _("operand out of range: %ld"), value);
1238
          *where = value;
1239
          break;
1240
 
1241
        case BFD_RELOC_AVR_16_PM:
1242
          bfd_putl16 ((bfd_vma) (value >> 1), where);
1243
          break;
1244
 
1245
        case BFD_RELOC_AVR_LDI:
1246
          if (value > 255)
1247
            as_bad_where (fixP->fx_file, fixP->fx_line,
1248
                          _("operand out of range: %ld"), value);
1249
          bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1250
          break;
1251
 
1252
        case BFD_RELOC_AVR_6:
1253
          if ((value > 63) || (value < 0))
1254
            as_bad_where (fixP->fx_file, fixP->fx_line,
1255
                          _("operand out of range: %ld"), value);
1256
          bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where);
1257
          break;
1258
 
1259
        case BFD_RELOC_AVR_6_ADIW:
1260
          if ((value > 63) || (value < 0))
1261
            as_bad_where (fixP->fx_file, fixP->fx_line,
1262
                          _("operand out of range: %ld"), value);
1263
          bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where);
1264
          break;
1265
 
1266
        case BFD_RELOC_AVR_LO8_LDI:
1267
          bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1268
          break;
1269
 
1270
        case BFD_RELOC_AVR_HI8_LDI:
1271
          bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where);
1272
          break;
1273
 
1274
        case BFD_RELOC_AVR_MS8_LDI:
1275
          bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where);
1276
          break;
1277
 
1278
        case BFD_RELOC_AVR_HH8_LDI:
1279
          bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
1280
          break;
1281
 
1282
        case BFD_RELOC_AVR_LO8_LDI_NEG:
1283
          bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where);
1284
          break;
1285
 
1286
        case BFD_RELOC_AVR_HI8_LDI_NEG:
1287
          bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where);
1288
          break;
1289
 
1290
        case BFD_RELOC_AVR_MS8_LDI_NEG:
1291
          bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where);
1292
          break;
1293
 
1294
        case BFD_RELOC_AVR_HH8_LDI_NEG:
1295
          bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
1296
          break;
1297
 
1298
        case BFD_RELOC_AVR_LO8_LDI_PM:
1299
          bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where);
1300
          break;
1301
 
1302
        case BFD_RELOC_AVR_HI8_LDI_PM:
1303
          bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where);
1304
          break;
1305
 
1306
        case BFD_RELOC_AVR_HH8_LDI_PM:
1307
          bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where);
1308
          break;
1309
 
1310
        case BFD_RELOC_AVR_LO8_LDI_PM_NEG:
1311
          bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where);
1312
          break;
1313
 
1314
        case BFD_RELOC_AVR_HI8_LDI_PM_NEG:
1315
          bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where);
1316
          break;
1317
 
1318
        case BFD_RELOC_AVR_HH8_LDI_PM_NEG:
1319
          bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where);
1320
          break;
1321
 
1322
        case BFD_RELOC_AVR_CALL:
1323
          {
1324
            unsigned long x;
1325
 
1326
            x = bfd_getl16 (where);
1327
            if (value & 1)
1328
              as_bad_where (fixP->fx_file, fixP->fx_line,
1329
                            _("odd address operand: %ld"), value);
1330
            value >>= 1;
1331
            x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16;
1332
            bfd_putl16 ((bfd_vma) x, where);
1333
            bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
1334
          }
1335
          break;
1336
 
1337
        default:
1338
          as_fatal (_("line %d: unknown relocation type: 0x%x"),
1339
                    fixP->fx_line, fixP->fx_r_type);
1340
          break;
1341
        }
1342
    }
1343
  else
1344
    {
1345
      switch ((int) fixP->fx_r_type)
1346
        {
1347
        case -BFD_RELOC_AVR_HI8_LDI_NEG:
1348
        case -BFD_RELOC_AVR_HI8_LDI:
1349
        case -BFD_RELOC_AVR_LO8_LDI_NEG:
1350
        case -BFD_RELOC_AVR_LO8_LDI:
1351
          as_bad_where (fixP->fx_file, fixP->fx_line,
1352
                        _("only constant expression allowed"));
1353
          fixP->fx_done = 1;
1354
          break;
1355
        default:
1356
          break;
1357
        }
1358
    }
1359
}
1360
 
1361
/* GAS will call this to generate a reloc, passing the resulting reloc
1362
   to `bfd_install_relocation'.  This currently works poorly, as
1363
   `bfd_install_relocation' often does the wrong thing, and instances of
1364
   `tc_gen_reloc' have been written to work around the problems, which
1365
   in turns makes it difficult to fix `bfd_install_relocation'.  */
1366
 
1367
/* If while processing a fixup, a reloc really needs to be created
1368
   then it is done here.  */
1369
 
1370
arelent *
1371
tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED,
1372
              fixS *fixp)
1373
{
1374
  arelent *reloc;
1375
 
1376
  if (fixp->fx_addsy && fixp->fx_subsy)
1377
    {
1378
      long value = 0;
1379
 
1380
      if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1381
          || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1382
        {
1383
          as_bad_where (fixp->fx_file, fixp->fx_line,
1384
              "Difference of symbols in different sections is not supported");
1385
          return NULL;
1386
        }
1387
 
1388
      /* We are dealing with two symbols defined in the same section.
1389
         Let us fix-up them here.  */
1390
      value += S_GET_VALUE (fixp->fx_addsy);
1391
      value -= S_GET_VALUE (fixp->fx_subsy);
1392
 
1393
      /* When fx_addsy and fx_subsy both are zero, md_apply_fix
1394
         only takes it's second operands for the fixup value.  */
1395
      fixp->fx_addsy = NULL;
1396
      fixp->fx_subsy = NULL;
1397
      md_apply_fix (fixp, (valueT *) &value, NULL);
1398
 
1399
      return NULL;
1400
    }
1401
 
1402
  reloc = xmalloc (sizeof (arelent));
1403
 
1404
  reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
1405
  *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1406
 
1407
  reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1408
  reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1409
  if (reloc->howto == (reloc_howto_type *) NULL)
1410
    {
1411
      as_bad_where (fixp->fx_file, fixp->fx_line,
1412
                    _("reloc %d not supported by object file format"),
1413
                    (int) fixp->fx_r_type);
1414
      return NULL;
1415
    }
1416
 
1417
  if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1418
      || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1419
    reloc->address = fixp->fx_offset;
1420
 
1421
  reloc->addend = fixp->fx_offset;
1422
 
1423
  return reloc;
1424
}
1425
 
1426
void
1427
md_assemble (char *str)
1428
{
1429
  struct avr_opcodes_s *opcode;
1430
  char op[11];
1431
 
1432
  str = skip_space (extract_word (str, op, sizeof (op)));
1433
 
1434
  if (!op[0])
1435
    as_bad (_("can't find opcode "));
1436
 
1437
  opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
1438
 
1439
  if (opcode == NULL)
1440
    {
1441
      as_bad (_("unknown opcode `%s'"), op);
1442
      return;
1443
    }
1444
 
1445
  /* Special case for opcodes with optional operands (lpm, elpm) -
1446
     version with operands exists in avr_opcodes[] in the next entry.  */
1447
 
1448
  if (*str && *opcode->constraints == '?')
1449
    ++opcode;
1450
 
1451
  if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
1452
    as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
1453
 
1454
  dwarf2_emit_insn (0);
1455
 
1456
  /* We used to set input_line_pointer to the result of get_operands,
1457
     but that is wrong.  Our caller assumes we don't change it.  */
1458
  {
1459
    char *t = input_line_pointer;
1460
 
1461
    avr_operands (opcode, &str);
1462
    if (*skip_space (str))
1463
      as_bad (_("garbage at end of line"));
1464
    input_line_pointer = t;
1465
  }
1466
}
1467
 
1468
/* Flag to pass `pm' mode between `avr_parse_cons_expression' and
1469
   `avr_cons_fix_new'.  */
1470
static int exp_mod_pm = 0;
1471
 
1472
/* Parse special CONS expression: pm (expression)
1473
   or alternatively: gs (expression).
1474
   These are used for addressing program memory.
1475
   Relocation: BFD_RELOC_AVR_16_PM.  */
1476
 
1477
void
1478
avr_parse_cons_expression (expressionS *exp, int nbytes)
1479
{
1480
  char *tmp;
1481
 
1482
  exp_mod_pm = 0;
1483
 
1484
  tmp = input_line_pointer = skip_space (input_line_pointer);
1485
 
1486
  if (nbytes == 2)
1487
    {
1488
      char *pm_name1 = "pm";
1489
      char *pm_name2 = "gs";
1490
      int len = strlen (pm_name1);
1491
      /* len must be the same for both pm identifiers.  */
1492
 
1493
      if (strncasecmp (input_line_pointer, pm_name1, len) == 0
1494
          || strncasecmp (input_line_pointer, pm_name2, len) == 0)
1495
        {
1496
          input_line_pointer = skip_space (input_line_pointer + len);
1497
 
1498
          if (*input_line_pointer == '(')
1499
            {
1500
              input_line_pointer = skip_space (input_line_pointer + 1);
1501
              exp_mod_pm = 1;
1502
              expression (exp);
1503
 
1504
              if (*input_line_pointer == ')')
1505
                ++input_line_pointer;
1506
              else
1507
                {
1508
                  as_bad (_("`)' required"));
1509
                  exp_mod_pm = 0;
1510
                }
1511
 
1512
              return;
1513
            }
1514
 
1515
          input_line_pointer = tmp;
1516
        }
1517
    }
1518
 
1519
  expression (exp);
1520
}
1521
 
1522
void
1523
avr_cons_fix_new (fragS *frag,
1524
                  int where,
1525
                  int nbytes,
1526
                  expressionS *exp)
1527
{
1528
  if (exp_mod_pm == 0)
1529
    {
1530
      if (nbytes == 1)
1531
        fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_8);
1532
      else if (nbytes == 2)
1533
        fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16);
1534
      else if (nbytes == 4)
1535
        fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32);
1536
      else
1537
        as_bad (_("illegal %srelocation size: %d"), "", nbytes);
1538
    }
1539
  else
1540
    {
1541
      if (nbytes == 2)
1542
        fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_AVR_16_PM);
1543
      else
1544
        as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes);
1545
      exp_mod_pm = 0;
1546
    }
1547
}
1548
 
1549
void
1550
tc_cfi_frame_initial_instructions (void)
1551
{
1552
  /* AVR6 pushes 3 bytes for calls.  */
1553
  int return_size = (avr_mcu->mach == bfd_mach_avr6 ? 3 : 2);
1554
 
1555
  /* The CFA is the caller's stack location before the call insn.  */
1556
  /* Note that the stack pointer is dwarf register number 32.  */
1557
  cfi_add_CFA_def_cfa (32, return_size);
1558
 
1559
  /* Note that AVR consistently uses post-decrement, which means that things
1560
     do not line up the same way as for targers that use pre-decrement.  */
1561
  cfi_add_CFA_offset (DWARF2_DEFAULT_RETURN_COLUMN, 1-return_size);
1562
}

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