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/* tc-xtensa.c -- Assemble Xtensa instructions.

   Copyright 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010

   Free Software Foundation, Inc.

   This file is part of GAS, the GNU Assembler.

   GAS is free software; you can redistribute it and/or modify

   it under the terms of the GNU General Public License as published by

   the Free Software Foundation; either version 3, or (at your option)

   any later version.

   GAS is distributed in the hope that it will be useful,

   but WITHOUT ANY WARRANTY; without even the implied warranty of

   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License

   along with GAS; see the file COPYING.  If not, write to

   the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,

   MA 02110-1301, USA.  */

#include <limits.h>

#include "as.h"

#include "sb.h"

#include "safe-ctype.h"

#include "tc-xtensa.h"

#include "subsegs.h"

#include "xtensa-relax.h"

#include "dwarf2dbg.h"

#include "xtensa-istack.h"

#include "struc-symbol.h"

#include "xtensa-config.h"

/* Provide default values for new configuration settings.  */

#ifndef XSHAL_ABI

#define XSHAL_ABI 0

#endif

#ifndef uint32

#define uint32 unsigned int

#endif

#ifndef int32

#define int32 signed int

#endif

/* Notes:

   Naming conventions (used somewhat inconsistently):

      The xtensa_ functions are exported

      The xg_ functions are internal

   We also have a couple of different extensibility mechanisms.

   1) The idiom replacement:

      This is used when a line is first parsed to

      replace an instruction pattern with another instruction

      It is currently limited to replacements of instructions

      with constant operands.

   2) The xtensa-relax.c mechanism that has stronger instruction

      replacement patterns.  When an instruction's immediate field

      does not fit the next instruction sequence is attempted.

      In addition, "narrow" opcodes are supported this way.  */

/* Define characters with special meanings to GAS.  */

const char comment_chars[] = "#";

const char line_comment_chars[] = "#";

const char line_separator_chars[] = ";";

const char EXP_CHARS[] = "eE";

const char FLT_CHARS[] = "rRsSfFdDxXpP";

/* Flags to indicate whether the hardware supports the density and

   absolute literals options.  */

bfd_boolean density_supported = XCHAL_HAVE_DENSITY;

bfd_boolean absolute_literals_supported = XSHAL_USE_ABSOLUTE_LITERALS;

static vliw_insn cur_vinsn;

unsigned xtensa_num_pipe_stages;

unsigned xtensa_fetch_width = XCHAL_INST_FETCH_WIDTH;

static enum debug_info_type xt_saved_debug_type = DEBUG_NONE;

/* Some functions are only valid in the front end.  This variable

   allows us to assert that we haven't crossed over into the

   back end.  */

static bfd_boolean past_xtensa_end = FALSE;

/* Flags for properties of the last instruction in a segment.  */

#define FLAG_IS_A0_WRITER       0x1

#define FLAG_IS_BAD_LOOPEND     0x2

/* We define a special segment names ".literal" to place literals

   into.  The .fini and .init sections are special because they

   contain code that is moved together by the linker.  We give them

   their own special .fini.literal and .init.literal sections.  */

#define LITERAL_SECTION_NAME            xtensa_section_rename (".literal")

#define LIT4_SECTION_NAME               xtensa_section_rename (".lit4")

#define INIT_SECTION_NAME               xtensa_section_rename (".init")

#define FINI_SECTION_NAME               xtensa_section_rename (".fini")

/* This type is used for the directive_stack to keep track of the

   state of the literal collection pools.  If lit_prefix is set, it is

   used to determine the literal section names; otherwise, the literal

   sections are determined based on the current text section.  The

   lit_seg and lit4_seg fields cache these literal sections, with the

   current_text_seg field used a tag to indicate whether the cached

   values are valid.  */

typedef struct lit_state_struct

{

  char *lit_prefix;

  segT current_text_seg;

  segT lit_seg;

  segT lit4_seg;

} lit_state;

static lit_state default_lit_sections;

/* We keep a list of literal segments.  The seg_list type is the node

   for this list.  The literal_head pointer is the head of the list,

   with the literal_head_h dummy node at the start.  */

typedef struct seg_list_struct

{

  struct seg_list_struct *next;

  segT seg;

} seg_list;

static seg_list literal_head_h;

static seg_list *literal_head = &literal_head_h;

/* Lists of symbols.  We keep a list of symbols that label the current

   instruction, so that we can adjust the symbols when inserting alignment

   for various instructions.  We also keep a list of all the symbols on

   literals, so that we can fix up those symbols when the literals are

   later moved into the text sections.  */

typedef struct sym_list_struct

{

  struct sym_list_struct *next;

  symbolS *sym;

} sym_list;

static sym_list *insn_labels = NULL;

static sym_list *free_insn_labels = NULL;

static sym_list *saved_insn_labels = NULL;

static sym_list *literal_syms;

/* Flags to determine whether to prefer const16 or l32r

   if both options are available.  */

int prefer_const16 = 0;

int prefer_l32r = 0;

/* Global flag to indicate when we are emitting literals.  */

int generating_literals = 0;

/* The following PROPERTY table definitions are copied from

   <elf/xtensa.h> and must be kept in sync with the code there.  */

/* Flags in the property tables to specify whether blocks of memory

   are literals, instructions, data, or unreachable.  For

   instructions, blocks that begin loop targets and branch targets are

   designated.  Blocks that do not allow density, instruction

   reordering or transformation are also specified.  Finally, for

   branch targets, branch target alignment priority is included.

   Alignment of the next block is specified in the current block

   and the size of the current block does not include any fill required

   to align to the next block.  */

#define XTENSA_PROP_LITERAL             0x00000001

#define XTENSA_PROP_INSN                0x00000002

#define XTENSA_PROP_DATA                0x00000004

#define XTENSA_PROP_UNREACHABLE         0x00000008

/* Instruction only properties at beginning of code.  */

#define XTENSA_PROP_INSN_LOOP_TARGET    0x00000010

#define XTENSA_PROP_INSN_BRANCH_TARGET  0x00000020

/* Instruction only properties about code.  */

#define XTENSA_PROP_INSN_NO_DENSITY     0x00000040

#define XTENSA_PROP_INSN_NO_REORDER     0x00000080

/* Historically, NO_TRANSFORM was a property of instructions,

   but it should apply to literals under certain circumstances.  */

#define XTENSA_PROP_NO_TRANSFORM        0x00000100

/*  Branch target alignment information.  This transmits information

    to the linker optimization about the priority of aligning a

    particular block for branch target alignment: None, low priority,

    high priority, or required.  These only need to be checked in

    instruction blocks marked as XTENSA_PROP_INSN_BRANCH_TARGET.

    Common usage is

    switch (GET_XTENSA_PROP_BT_ALIGN (flags))

    case XTENSA_PROP_BT_ALIGN_NONE:

    case XTENSA_PROP_BT_ALIGN_LOW:

    case XTENSA_PROP_BT_ALIGN_HIGH:

    case XTENSA_PROP_BT_ALIGN_REQUIRE:

*/

#define XTENSA_PROP_BT_ALIGN_MASK       0x00000600

/* No branch target alignment.  */

#define XTENSA_PROP_BT_ALIGN_NONE       0x0

/* Low priority branch target alignment.  */

#define XTENSA_PROP_BT_ALIGN_LOW        0x1

/* High priority branch target alignment.  */

#define XTENSA_PROP_BT_ALIGN_HIGH       0x2

/* Required branch target alignment.  */

#define XTENSA_PROP_BT_ALIGN_REQUIRE    0x3

#define GET_XTENSA_PROP_BT_ALIGN(flag) \

  (((unsigned) ((flag) & (XTENSA_PROP_BT_ALIGN_MASK))) >> 9)

#define SET_XTENSA_PROP_BT_ALIGN(flag, align) \

  (((flag) & (~XTENSA_PROP_BT_ALIGN_MASK)) | \

    (((align) << 9) & XTENSA_PROP_BT_ALIGN_MASK))

/* Alignment is specified in the block BEFORE the one that needs

   alignment.  Up to 5 bits.  Use GET_XTENSA_PROP_ALIGNMENT(flags) to

   get the required alignment specified as a power of 2.  Use

   SET_XTENSA_PROP_ALIGNMENT(flags, pow2) to set the required

   alignment.  Be careful of side effects since the SET will evaluate

   flags twice.  Also, note that the SIZE of a block in the property

   table does not include the alignment size, so the alignment fill

   must be calculated to determine if two blocks are contiguous.

   TEXT_ALIGN is not currently implemented but is a placeholder for a

   possible future implementation.  */

#define XTENSA_PROP_ALIGN               0x00000800

#define XTENSA_PROP_ALIGNMENT_MASK      0x0001f000

#define GET_XTENSA_PROP_ALIGNMENT(flag) \

  (((unsigned) ((flag) & (XTENSA_PROP_ALIGNMENT_MASK))) >> 12)

#define SET_XTENSA_PROP_ALIGNMENT(flag, align) \

  (((flag) & (~XTENSA_PROP_ALIGNMENT_MASK)) | \

    (((align) << 12) & XTENSA_PROP_ALIGNMENT_MASK))

#define XTENSA_PROP_INSN_ABSLIT 0x00020000

/* Structure for saving instruction and alignment per-fragment data

   that will be written to the object file.  This structure is

   equivalent to the actual data that will be written out to the file

   but is easier to use.   We provide a conversion to file flags

   in frag_flags_to_number.  */

typedef struct frag_flags_struct frag_flags;

struct frag_flags_struct

{

  /* is_literal should only be used after xtensa_move_literals.

     If you need to check if you are generating a literal fragment,

     then use the generating_literals global.  */

  unsigned is_literal : 1;

  unsigned is_insn : 1;

  unsigned is_data : 1;

  unsigned is_unreachable : 1;

  /* is_specific_opcode implies no_transform.  */

  unsigned is_no_transform : 1;

  struct

  {

    unsigned is_loop_target : 1;

    unsigned is_branch_target : 1; /* Branch targets have a priority.  */

    unsigned bt_align_priority : 2;

    unsigned is_no_density : 1;

    /* no_longcalls flag does not need to be placed in the object file.  */

    unsigned is_no_reorder : 1;

    /* Uses absolute literal addressing for l32r.  */

    unsigned is_abslit : 1;

  } insn;

  unsigned is_align : 1;

  unsigned alignment : 5;

};

/* Structure for saving information about a block of property data

   for frags that have the same flags.  */

struct xtensa_block_info_struct

{

  segT sec;

  bfd_vma offset;

  size_t size;

  frag_flags flags;

  struct xtensa_block_info_struct *next;

};

/* Structure for saving the current state before emitting literals.  */

typedef struct emit_state_struct

{

  const char *name;

  segT now_seg;

  subsegT now_subseg;

  int generating_literals;

} emit_state;

/* Opcode placement information */

typedef unsigned long long bitfield;

#define bit_is_set(bit, bf)     ((bf) & (0x01ll << (bit)))

#define set_bit(bit, bf)        ((bf) |= (0x01ll << (bit)))

#define clear_bit(bit, bf)      ((bf) &= ~(0x01ll << (bit)))

#define MAX_FORMATS 32

typedef struct op_placement_info_struct

{

  int num_formats;

  /* A number describing how restrictive the issue is for this

     opcode.  For example, an opcode that fits lots of different

     formats has a high freedom, as does an opcode that fits

     only one format but many slots in that format.  The most

     restrictive is the opcode that fits only one slot in one

     format.  */

  int issuef;

  xtensa_format narrowest;

  char narrowest_size;

  char narrowest_slot;

  /* formats is a bitfield with the Nth bit set

     if the opcode fits in the Nth xtensa_format.  */

  bitfield formats;

  /* slots[N]'s Mth bit is set if the op fits in the

     Mth slot of the Nth xtensa_format.  */

  bitfield slots[MAX_FORMATS];

  /* A count of the number of slots in a given format

     an op can fit (i.e., the bitcount of the slot field above).  */

  char slots_in_format[MAX_FORMATS];

} op_placement_info, *op_placement_info_table;

op_placement_info_table op_placement_table;

/* Extra expression types.  */

#define O_pltrel        O_md1   /* like O_symbol but use a PLT reloc */

#define O_hi16          O_md2   /* use high 16 bits of symbolic value */

#define O_lo16          O_md3   /* use low 16 bits of symbolic value */

#define O_pcrel         O_md4   /* value is a PC-relative offset */

#define O_tlsfunc       O_md5   /* TLS_FUNC/TLSDESC_FN relocation */

#define O_tlsarg        O_md6   /* TLS_ARG/TLSDESC_ARG relocation */

#define O_tlscall       O_md7   /* TLS_CALL relocation */

#define O_tpoff         O_md8   /* TPOFF relocation */

#define O_dtpoff        O_md9   /* DTPOFF relocation */

struct suffix_reloc_map

{

  char *suffix;

  int length;

  bfd_reloc_code_real_type reloc;

  unsigned char operator;

};

#define SUFFIX_MAP(str, reloc, op) { str, sizeof (str) - 1, reloc, op }

static struct suffix_reloc_map suffix_relocs[] =

{

  SUFFIX_MAP ("l",      BFD_RELOC_LO16,                 O_lo16),

  SUFFIX_MAP ("h",      BFD_RELOC_HI16,                 O_hi16),

  SUFFIX_MAP ("plt",    BFD_RELOC_XTENSA_PLT,           O_pltrel),

  SUFFIX_MAP ("pcrel",  BFD_RELOC_32_PCREL,             O_pcrel),

  SUFFIX_MAP ("tlsfunc", BFD_RELOC_XTENSA_TLS_FUNC,     O_tlsfunc),

  SUFFIX_MAP ("tlsarg", BFD_RELOC_XTENSA_TLS_ARG,       O_tlsarg),

  SUFFIX_MAP ("tlscall", BFD_RELOC_XTENSA_TLS_CALL,     O_tlscall),

  SUFFIX_MAP ("tpoff",  BFD_RELOC_XTENSA_TLS_TPOFF,     O_tpoff),

  SUFFIX_MAP ("dtpoff", BFD_RELOC_XTENSA_TLS_DTPOFF,    O_dtpoff),

  { (char *) 0, 0,        BFD_RELOC_UNUSED,               0 }

};

/* Directives.  */

typedef enum

{

  directive_none = 0,

  directive_literal,

  directive_density,

  directive_transform,

  directive_freeregs,

  directive_longcalls,

  directive_literal_prefix,

  directive_schedule,

  directive_absolute_literals,

  directive_last_directive

} directiveE;

typedef struct

{

  const char *name;

  bfd_boolean can_be_negated;

} directive_infoS;

const directive_infoS directive_info[] =

{

  { "none",             FALSE },

  { "literal",          FALSE },

  { "density",          TRUE },

  { "transform",        TRUE },

  { "freeregs",         FALSE },

  { "longcalls",        TRUE },

  { "literal_prefix",   FALSE },

  { "schedule",         TRUE },

  { "absolute-literals", TRUE }

};

bfd_boolean directive_state[] =

{

  FALSE,                        /* none */

  FALSE,                        /* literal */

#if !XCHAL_HAVE_DENSITY

  FALSE,                        /* density */

#else

  TRUE,                         /* density */

#endif

  TRUE,                         /* transform */

  FALSE,                        /* freeregs */

  FALSE,                        /* longcalls */

  FALSE,                        /* literal_prefix */

  FALSE,                        /* schedule */

#if XSHAL_USE_ABSOLUTE_LITERALS

  TRUE                          /* absolute_literals */

#else

  FALSE                         /* absolute_literals */

#endif

};

/* Directive functions.  */

static void xtensa_begin_directive (int);

static void xtensa_end_directive (int);

static void xtensa_literal_prefix (void);

static void xtensa_literal_position (int);

static void xtensa_literal_pseudo (int);

static void xtensa_frequency_pseudo (int);

static void xtensa_elf_cons (int);

static void xtensa_leb128 (int);

/* Parsing and Idiom Translation.  */

static bfd_reloc_code_real_type xtensa_elf_suffix (char **, expressionS *);

/* Various Other Internal Functions.  */

extern bfd_boolean xg_is_single_relaxable_insn (TInsn *, TInsn *, bfd_boolean);

static bfd_boolean xg_build_to_insn (TInsn *, TInsn *, BuildInstr *);

static void xtensa_mark_literal_pool_location (void);

static addressT get_expanded_loop_offset (xtensa_opcode);

static fragS *get_literal_pool_location (segT);

static void set_literal_pool_location (segT, fragS *);

static void xtensa_set_frag_assembly_state (fragS *);

static void finish_vinsn (vliw_insn *);

static bfd_boolean emit_single_op (TInsn *);

static int total_frag_text_expansion (fragS *);

/* Alignment Functions.  */

static int get_text_align_power (unsigned);

static int get_text_align_max_fill_size (int, bfd_boolean, bfd_boolean);

static int branch_align_power (segT);

/* Helpers for xtensa_relax_frag().  */

static long relax_frag_add_nop (fragS *);

/* Accessors for additional per-subsegment information.  */

static unsigned get_last_insn_flags (segT, subsegT);

static void set_last_insn_flags (segT, subsegT, unsigned, bfd_boolean);

static float get_subseg_total_freq (segT, subsegT);

static float get_subseg_target_freq (segT, subsegT);

static void set_subseg_freq (segT, subsegT, float, float);

/* Segment list functions.  */

static void xtensa_move_literals (void);

static void xtensa_reorder_segments (void);

static void xtensa_switch_to_literal_fragment (emit_state *);

static void xtensa_switch_to_non_abs_literal_fragment (emit_state *);

static void xtensa_switch_section_emit_state (emit_state *, segT, subsegT);

static void xtensa_restore_emit_state (emit_state *);

static segT cache_literal_section (bfd_boolean);

/* Import from elf32-xtensa.c in BFD library.  */

extern asection *xtensa_make_property_section (asection *, const char *);

/* op_placement_info functions.  */

static void init_op_placement_info_table (void);

extern bfd_boolean opcode_fits_format_slot (xtensa_opcode, xtensa_format, int);

static int xg_get_single_size (xtensa_opcode);

static xtensa_format xg_get_single_format (xtensa_opcode);

static int xg_get_single_slot (xtensa_opcode);

/* TInsn and IStack functions.  */

static bfd_boolean tinsn_has_symbolic_operands (const TInsn *);

static bfd_boolean tinsn_has_invalid_symbolic_operands (const TInsn *);

static bfd_boolean tinsn_has_complex_operands (const TInsn *);

static bfd_boolean tinsn_to_insnbuf (TInsn *, xtensa_insnbuf);

static bfd_boolean tinsn_check_arguments (const TInsn *);

static void tinsn_from_chars (TInsn *, char *, int);

static void tinsn_immed_from_frag (TInsn *, fragS *, int);

static int get_num_stack_text_bytes (IStack *);

static int get_num_stack_literal_bytes (IStack *);

/* vliw_insn functions.  */

static void xg_init_vinsn (vliw_insn *);

static void xg_copy_vinsn (vliw_insn *, vliw_insn *);

static void xg_clear_vinsn (vliw_insn *);

static bfd_boolean vinsn_has_specific_opcodes (vliw_insn *);

static void xg_free_vinsn (vliw_insn *);

static bfd_boolean vinsn_to_insnbuf

  (vliw_insn *, char *, fragS *, bfd_boolean);

static void vinsn_from_chars (vliw_insn *, char *);

/* Expression Utilities.  */

bfd_boolean expr_is_const (const expressionS *);

offsetT get_expr_const (const expressionS *);

void set_expr_const (expressionS *, offsetT);

bfd_boolean expr_is_register (const expressionS *);

offsetT get_expr_register (const expressionS *);

void set_expr_symbol_offset (expressionS *, symbolS *, offsetT);

bfd_boolean expr_is_equal (expressionS *, expressionS *);

static void copy_expr (expressionS *, const expressionS *);

/* Section renaming.  */

static void build_section_rename (const char *);

/* ISA imported from bfd.  */

extern xtensa_isa xtensa_default_isa;

extern int target_big_endian;

static xtensa_opcode xtensa_addi_opcode;

static xtensa_opcode xtensa_addmi_opcode;

static xtensa_opcode xtensa_call0_opcode;

static xtensa_opcode xtensa_call4_opcode;

static xtensa_opcode xtensa_call8_opcode;

static xtensa_opcode xtensa_call12_opcode;

static xtensa_opcode xtensa_callx0_opcode;

static xtensa_opcode xtensa_callx4_opcode;

static xtensa_opcode xtensa_callx8_opcode;

static xtensa_opcode xtensa_callx12_opcode;

static xtensa_opcode xtensa_const16_opcode;

static xtensa_opcode xtensa_entry_opcode;

static xtensa_opcode xtensa_extui_opcode;

static xtensa_opcode xtensa_movi_opcode;

static xtensa_opcode xtensa_movi_n_opcode;

static xtensa_opcode xtensa_isync_opcode;

static xtensa_opcode xtensa_j_opcode;

static xtensa_opcode xtensa_jx_opcode;

static xtensa_opcode xtensa_l32r_opcode;

static xtensa_opcode xtensa_loop_opcode;

static xtensa_opcode xtensa_loopnez_opcode;

static xtensa_opcode xtensa_loopgtz_opcode;

static xtensa_opcode xtensa_nop_opcode;

static xtensa_opcode xtensa_nop_n_opcode;

static xtensa_opcode xtensa_or_opcode;

static xtensa_opcode xtensa_ret_opcode;

static xtensa_opcode xtensa_ret_n_opcode;

static xtensa_opcode xtensa_retw_opcode;

static xtensa_opcode xtensa_retw_n_opcode;

static xtensa_opcode xtensa_rsr_lcount_opcode;

static xtensa_opcode xtensa_waiti_opcode;

static int config_max_slots = 0;

/* Command-line Options.  */

bfd_boolean use_literal_section = TRUE;

enum flix_level produce_flix = FLIX_ALL;

static bfd_boolean align_targets = TRUE;

static bfd_boolean warn_unaligned_branch_targets = FALSE;

static bfd_boolean has_a0_b_retw = FALSE;

static bfd_boolean workaround_a0_b_retw = FALSE;

static bfd_boolean workaround_b_j_loop_end = FALSE;

static bfd_boolean workaround_short_loop = FALSE;

static bfd_boolean maybe_has_short_loop = FALSE;

static bfd_boolean workaround_close_loop_end = FALSE;

static bfd_boolean maybe_has_close_loop_end = FALSE;

static bfd_boolean enforce_three_byte_loop_align = FALSE;

/* When workaround_short_loops is TRUE, all loops with early exits must

   have at least 3 instructions.  workaround_all_short_loops is a modifier

   to the workaround_short_loop flag.  In addition to the

   workaround_short_loop actions, all straightline loopgtz and loopnez

   must have at least 3 instructions.  */

static bfd_boolean workaround_all_short_loops = FALSE;

static void

xtensa_setup_hw_workarounds (int earliest, int latest)

{

  if (earliest > latest)

    as_fatal (_("illegal range of target hardware versions"));

  /* Enable all workarounds for pre-T1050.0 hardware.  */

  if (earliest < 105000 || latest < 105000)

    {

      workaround_a0_b_retw |= TRUE;

      workaround_b_j_loop_end |= TRUE;

      workaround_short_loop |= TRUE;

      workaround_close_loop_end |= TRUE;

      workaround_all_short_loops |= TRUE;

      enforce_three_byte_loop_align = TRUE;

    }

}

enum

{

  option_density = OPTION_MD_BASE,

  option_no_density,

  option_flix,

  option_no_generate_flix,

  option_no_flix,

  option_relax,

  option_no_relax,

  option_link_relax,

  option_no_link_relax,

  option_generics,

  option_no_generics,

  option_transform,

  option_no_transform,

  option_text_section_literals,

  option_no_text_section_literals,

  option_absolute_literals,

  option_no_absolute_literals,

  option_align_targets,

  option_no_align_targets,

  option_warn_unaligned_targets,

  option_longcalls,

  option_no_longcalls,

  option_workaround_a0_b_retw,

  option_no_workaround_a0_b_retw,

  option_workaround_b_j_loop_end,

  option_no_workaround_b_j_loop_end,

  option_workaround_short_loop,

  option_no_workaround_short_loop,

  option_workaround_all_short_loops,

  option_no_workaround_all_short_loops,

  option_workaround_close_loop_end,

  option_no_workaround_close_loop_end,

  option_no_workarounds,

  option_rename_section_name,

  option_prefer_l32r,

  option_prefer_const16,

  option_target_hardware

};

const char *md_shortopts = "";

struct option md_longopts[] =

{

  { "density", no_argument, NULL, option_density },

  { "no-density", no_argument, NULL, option_no_density },

  { "flix", no_argument, NULL, option_flix },

  { "no-generate-flix", no_argument, NULL, option_no_generate_flix },

  { "no-allow-flix", no_argument, NULL, option_no_flix },

  /* Both "relax" and "generics" are deprecated and treated as equivalent

     to the "transform" option.  */

  { "relax", no_argument, NULL, option_relax },

  { "no-relax", no_argument, NULL, option_no_relax },

  { "generics", no_argument, NULL, option_generics },

  { "no-generics", no_argument, NULL, option_no_generics },

  { "transform", no_argument, NULL, option_transform },

  { "no-transform", no_argument, NULL, option_no_transform },

  { "text-section-literals", no_argument, NULL, option_text_section_literals },

  { "no-text-section-literals", no_argument, NULL,

    option_no_text_section_literals },

  { "absolute-literals", no_argument, NULL, option_absolute_literals },

  { "no-absolute-literals", no_argument, NULL, option_no_absolute_literals },

  /* This option was changed from -align-target to -target-align

     because it conflicted with the "-al" option.  */

  { "target-align", no_argument, NULL, option_align_targets },

  { "no-target-align", no_argument, NULL, option_no_align_targets },

  { "warn-unaligned-targets", no_argument, NULL,

    option_warn_unaligned_targets },

  { "longcalls", no_argument, NULL, option_longcalls },

  { "no-longcalls", no_argument, NULL, option_no_longcalls },

  { "no-workaround-a0-b-retw", no_argument, NULL,

    option_no_workaround_a0_b_retw },

  { "workaround-a0-b-retw", no_argument, NULL, option_workaround_a0_b_retw },