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/* tc-xtensa.h -- Header file for tc-xtensa.c.
2
   Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2009
3
   Free Software Foundation, Inc.
4
 
5
   This file is part of GAS, the GNU Assembler.
6
 
7
   GAS is free software; you can redistribute it and/or modify
8
   it under the terms of the GNU General Public License as published by
9
   the Free Software Foundation; either version 3, or (at your option)
10
   any later version.
11
 
12
   GAS is distributed in the hope that it will be useful,
13
   but WITHOUT ANY WARRANTY; without even the implied warranty of
14
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15
   GNU General Public License for more details.
16
 
17
   You should have received a copy of the GNU General Public License
18
   along with GAS; see the file COPYING.  If not, write to the Free
19
   Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
20
   02110-1301, USA.  */
21
 
22
#ifndef TC_XTENSA
23
#define TC_XTENSA 1
24
 
25
struct fix;
26
 
27
#ifndef OBJ_ELF
28
#error Xtensa support requires ELF object format
29
#endif
30
 
31
#include "xtensa-isa.h"
32
#include "xtensa-config.h"
33
 
34
#define TARGET_BYTES_BIG_ENDIAN XCHAL_HAVE_BE
35
 
36
 
37
/* Maximum number of opcode slots in a VLIW instruction.  */
38
#define MAX_SLOTS 15
39
 
40
 
41
/* For all xtensa relax states except RELAX_DESIRE_ALIGN and
42
   RELAX_DESIRE_ALIGN_IF_TARGET, the amount a frag might grow is stored
43
   in the fr_var field.  For the two exceptions, fr_var is a float value
44
   that records the frequency with which the following instruction is
45
   executed as a branch target.  The aligner uses this information to
46
   tell which targets are most important to be aligned.  */
47
 
48
enum xtensa_relax_statesE
49
{
50
  RELAX_XTENSA_NONE,
51
 
52
  RELAX_ALIGN_NEXT_OPCODE,
53
  /* Use the first opcode of the next fragment to determine the
54
     alignment requirements.  This is ONLY used for LOOPs currently.  */
55
 
56
  RELAX_CHECK_ALIGN_NEXT_OPCODE,
57
  /* The next non-empty frag contains a loop instruction.  Check to see
58
     if it is correctly aligned, but do not align it.  */
59
 
60
  RELAX_DESIRE_ALIGN_IF_TARGET,
61
  /* These are placed in front of labels and converted to either
62
     RELAX_DESIRE_ALIGN / RELAX_LOOP_END or rs_fill of 0 before
63
     relaxation begins.  */
64
 
65
  RELAX_ADD_NOP_IF_A0_B_RETW,
66
  /* These are placed in front of conditional branches.  Before
67
     relaxation begins, they are turned into either NOPs for branches
68
     immediately followed by RETW or RETW.N or rs_fills of 0.  This is
69
     used to avoid a hardware bug in some early versions of the
70
     processor.  */
71
 
72
  RELAX_ADD_NOP_IF_PRE_LOOP_END,
73
  /* These are placed after JX instructions.  Before relaxation begins,
74
     they are turned into either NOPs, if the JX is one instruction
75
     before a loop end label, or rs_fills of 0.  This is used to avoid a
76
     hardware interlock issue prior to Xtensa version T1040.  */
77
 
78
  RELAX_ADD_NOP_IF_SHORT_LOOP,
79
  /* These are placed after LOOP instructions and turned into NOPs when:
80
     (1) there are less than 3 instructions in the loop; we place 2 of
81
     these in a row to add up to 2 NOPS in short loops; or (2) the
82
     instructions in the loop do not include a branch or jump.
83
     Otherwise they are turned into rs_fills of 0 before relaxation
84
     begins.  This is used to avoid hardware bug PR3830.  */
85
 
86
  RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
87
  /* These are placed after LOOP instructions and turned into NOPs if
88
     there are less than 12 bytes to the end of some other loop's end.
89
     Otherwise they are turned into rs_fills of 0 before relaxation
90
     begins.  This is used to avoid hardware bug PR3830.  */
91
 
92
  RELAX_DESIRE_ALIGN,
93
  /* The next fragment would like its first instruction to NOT cross an
94
     instruction fetch boundary.  */
95
 
96
  RELAX_MAYBE_DESIRE_ALIGN,
97
  /* The next fragment might like its first instruction to NOT cross an
98
     instruction fetch boundary.  These are placed after a branch that
99
     might be relaxed.  If the branch is relaxed, then this frag will be
100
     a branch target and this frag will be changed to RELAX_DESIRE_ALIGN
101
     frag.  */
102
 
103
  RELAX_LOOP_END,
104
  /* This will be turned into a NOP or NOP.N if the previous instruction
105
     is expanded to negate a loop.  */
106
 
107
  RELAX_LOOP_END_ADD_NOP,
108
  /* When the code density option is available, this will generate a
109
     NOP.N marked RELAX_NARROW.  Otherwise, it will create an rs_fill
110
     fragment with a NOP in it.  Once a frag has been converted to
111
     RELAX_LOOP_END_ADD_NOP, it should never be changed back to
112
     RELAX_LOOP_END.  */
113
 
114
  RELAX_LITERAL,
115
  /* Another fragment could generate an expansion here but has not yet.  */
116
 
117
  RELAX_LITERAL_NR,
118
  /* Expansion has been generated by an instruction that generates a
119
     literal.  However, the stretch has NOT been reported yet in this
120
     fragment.  */
121
 
122
  RELAX_LITERAL_FINAL,
123
  /* Expansion has been generated by an instruction that generates a
124
     literal.  */
125
 
126
  RELAX_LITERAL_POOL_BEGIN,
127
  RELAX_LITERAL_POOL_END,
128
  /* Technically these are not relaxations at all but mark a location
129
     to store literals later.  Note that fr_var stores the frchain for
130
     BEGIN frags and fr_var stores now_seg for END frags.  */
131
 
132
  RELAX_NARROW,
133
  /* The last instruction in this fragment (at->fr_opcode) can be
134
     freely replaced with a single wider instruction if a future
135
     alignment desires or needs it.  */
136
 
137
  RELAX_IMMED,
138
  /* The last instruction in this fragment (at->fr_opcode) contains
139
     an immediate or symbol.  If the value does not fit, relax the
140
     opcode using expansions from the relax table.  */
141
 
142
  RELAX_IMMED_STEP1,
143
  /* The last instruction in this fragment (at->fr_opcode) contains a
144
     literal.  It has already been expanded 1 step.  */
145
 
146
  RELAX_IMMED_STEP2,
147
  /* The last instruction in this fragment (at->fr_opcode) contains a
148
     literal.  It has already been expanded 2 steps.  */
149
 
150
  RELAX_IMMED_STEP3,
151
  /* The last instruction in this fragment (at->fr_opcode) contains a
152
     literal.  It has already been expanded 3 steps.  */
153
 
154
  RELAX_SLOTS,
155
  /* There are instructions within the last VLIW instruction that need
156
     relaxation.  Find the relaxation based on the slot info in
157
     xtensa_frag_type.  Relaxations that deal with particular opcodes
158
     are slot-based (e.g., converting a MOVI to an L32R).  Relaxations
159
     that deal with entire instructions, such as alignment, are not
160
     slot-based.  */
161
 
162
  RELAX_FILL_NOP,
163
  /* This marks the location of a pipeline stall.  We can fill these guys
164
     in for alignment of any size.  */
165
 
166
  RELAX_UNREACHABLE,
167
  /* This marks the location as unreachable.  The assembler may widen or
168
     narrow this area to meet alignment requirements of nearby
169
     instructions.  */
170
 
171
  RELAX_MAYBE_UNREACHABLE,
172
  /* This marks the location as possibly unreachable.  These are placed
173
     after a branch that may be relaxed into a branch and jump. If the
174
     branch is relaxed, then this frag will be converted to a
175
     RELAX_UNREACHABLE frag.  */
176
 
177
  RELAX_ORG,
178
  /* This marks the location as having previously been an rs_org frag.
179
     rs_org frags are converted to fill-zero frags immediately after
180
     relaxation.  However, we need to remember where they were so we can
181
     prevent the linker from changing the size of any frag between the
182
     section start and the org frag.  */
183
 
184
  RELAX_NONE
185
};
186
 
187
/* This is used as a stopper to bound the number of steps that
188
   can be taken.  */
189
#define RELAX_IMMED_MAXSTEPS (RELAX_IMMED_STEP3 - RELAX_IMMED)
190
 
191
struct xtensa_frag_type
192
{
193
  /* Info about the current state of assembly, e.g., transform,
194
     absolute_literals, etc.  These need to be passed to the backend and
195
     then to the object file.
196
 
197
     When is_assembly_state_set is false, the frag inherits some of the
198
     state settings from the previous frag in this segment.  Because it
199
     is not possible to intercept all fragment closures (frag_more and
200
     frag_append_1_char can close a frag), we use a pass after initial
201
     assembly to fill in the assembly states.  */
202
 
203
  unsigned int is_assembly_state_set : 1;
204
  unsigned int is_no_density : 1;
205
  unsigned int is_no_transform : 1;
206
  unsigned int use_longcalls : 1;
207
  unsigned int use_absolute_literals : 1;
208
 
209
  /* Inhibits relaxation of machine-dependent alignment frags the
210
     first time through a relaxation....  */
211
  unsigned int relax_seen : 1;
212
 
213
  /* Information that is needed in the object file and set when known.  */
214
  unsigned int is_literal : 1;
215
  unsigned int is_loop_target : 1;
216
  unsigned int is_branch_target : 1;
217
  unsigned int is_insn : 1;
218
  unsigned int is_unreachable : 1;
219
 
220
  unsigned int is_specific_opcode : 1; /* also implies no_transform */
221
 
222
  unsigned int is_align : 1;
223
  unsigned int is_text_align : 1;
224
  unsigned int alignment : 5;
225
 
226
  /* A frag with this bit set is the first in a loop that actually
227
     contains an instruction.  */
228
  unsigned int is_first_loop_insn : 1;
229
 
230
  /* A frag with this bit set is a branch that we are using to
231
     align branch targets as if it were a normal narrow instruction.  */
232
  unsigned int is_aligning_branch : 1;
233
 
234
  /* For text fragments that can generate literals at relax time, this
235
     variable points to the frag where the literal will be stored.  For
236
     literal frags, this variable points to the nearest literal pool
237
     location frag.  This literal frag will be moved to after this
238
     location.  For RELAX_LITERAL_POOL_BEGIN frags, this field points
239
     to the frag immediately before the corresponding RELAX_LITERAL_POOL_END
240
     frag, to make moving frags for this literal pool efficient.  */
241
  fragS *literal_frag;
242
 
243
  /* The destination segment for literal frags.  (Note that this is only
244
     valid after xtensa_move_literals.)  This field is also used for
245
     LITERAL_POOL_END frags.  */
246
  segT lit_seg;
247
 
248
  /* Frag chain for LITERAL_POOL_BEGIN frags.  */
249
  struct frchain *lit_frchain;
250
 
251
  /* For the relaxation scheme, some literal fragments can have their
252
     expansions modified by an instruction that relaxes.  */
253
  int text_expansion[MAX_SLOTS];
254
  int literal_expansion[MAX_SLOTS];
255
  int unreported_expansion;
256
 
257
  /* For slots that have a free register for relaxation, record that
258
     register.  */
259
  expressionS free_reg[MAX_SLOTS];
260
 
261
  /* For text fragments that can generate literals at relax time:  */
262
  fragS *literal_frags[MAX_SLOTS];
263
  enum xtensa_relax_statesE slot_subtypes[MAX_SLOTS];
264
  symbolS *slot_symbols[MAX_SLOTS];
265
  offsetT slot_offsets[MAX_SLOTS];
266
 
267
  /* When marking frags after this one in the chain as no transform,
268
     cache the last one in the chain, so that we can skip to the
269
     end of the chain.  */
270
  fragS *no_transform_end;
271
};
272
 
273
 
274
/* For VLIW support, we need to know what slot a fixup applies to.  */
275
typedef struct xtensa_fix_data_struct
276
{
277
  int slot;
278
  symbolS *X_add_symbol;
279
  offsetT X_add_number;
280
} xtensa_fix_data;
281
 
282
 
283
/* Structure to record xtensa-specific symbol information.  */
284
typedef struct xtensa_symfield_type
285
{
286
  unsigned int is_loop_target : 1;
287
  unsigned int is_branch_target : 1;
288
  symbolS *next_expr_symbol;
289
} xtensa_symfield_type;
290
 
291
 
292
/* Structure for saving information about a block of property data
293
   for frags that have the same flags.   The forward reference is
294
   in this header file.  The actual definition is in tc-xtensa.c.  */
295
struct xtensa_block_info_struct;
296
typedef struct xtensa_block_info_struct xtensa_block_info;
297
 
298
 
299
/* Property section types.  */
300
typedef enum
301
{
302
  xt_literal_sec,
303
  xt_prop_sec,
304
  max_xt_sec
305
} xt_section_type;
306
 
307
typedef struct xtensa_segment_info_struct
308
{
309
  fragS *literal_pool_loc;
310
  xtensa_block_info *blocks[max_xt_sec];
311
} xtensa_segment_info;
312
 
313
 
314
extern const char *xtensa_target_format (void);
315
extern void xtensa_init_fix_data (struct fix *);
316
extern void xtensa_frag_init (fragS *);
317
extern int xtensa_force_relocation (struct fix *);
318
extern int xtensa_validate_fix_sub (struct fix *);
319
extern void xtensa_frob_label (struct symbol *);
320
extern void xtensa_end (void);
321
extern void xtensa_post_relax_hook (void);
322
extern void xtensa_file_arch_init (bfd *);
323
extern void xtensa_flush_pending_output (void);
324
extern bfd_boolean xtensa_fix_adjustable (struct fix *);
325
extern void xtensa_symbol_new_hook (symbolS *);
326
extern long xtensa_relax_frag (fragS *, long, int *);
327
extern void xtensa_elf_section_change_hook (void);
328
extern int xtensa_unrecognized_line (int);
329
extern bfd_boolean xtensa_check_inside_bundle (void);
330
extern void xtensa_handle_align (fragS *);
331
extern char *xtensa_section_rename (char *);
332
 
333
#define TARGET_FORMAT                   xtensa_target_format ()
334
#define TARGET_ARCH                     bfd_arch_xtensa
335
#define TC_SEGMENT_INFO_TYPE            xtensa_segment_info
336
#define TC_SYMFIELD_TYPE                struct xtensa_symfield_type
337
#define TC_FIX_TYPE                     xtensa_fix_data
338
#define TC_INIT_FIX_DATA(x)             xtensa_init_fix_data (x)
339
#define TC_FRAG_TYPE                    struct xtensa_frag_type
340
#define TC_FRAG_INIT(frag)              xtensa_frag_init (frag)
341
#define TC_FORCE_RELOCATION(fix)        xtensa_force_relocation (fix)
342
#define TC_FORCE_RELOCATION_SUB_SAME(fix, seg) \
343
  (! SEG_NORMAL (seg) || xtensa_force_relocation (fix))
344
#define TC_VALIDATE_FIX_SUB(fix, seg)   xtensa_validate_fix_sub (fix)
345
#define NO_PSEUDO_DOT                   xtensa_check_inside_bundle ()
346
#define tc_canonicalize_symbol_name(s)  xtensa_section_rename (s)
347
#define tc_canonicalize_section_name(s) xtensa_section_rename (s)
348
#define tc_init_after_args()            xtensa_file_arch_init (stdoutput)
349
#define tc_fix_adjustable(fix)          xtensa_fix_adjustable (fix)
350
#define tc_frob_label(sym)              xtensa_frob_label (sym)
351
#define tc_unrecognized_line(ch)        xtensa_unrecognized_line (ch)
352
#define tc_symbol_new_hook(sym)         xtensa_symbol_new_hook (sym)
353
#define md_do_align(a,b,c,d,e)          xtensa_flush_pending_output ()
354
#define md_elf_section_change_hook      xtensa_elf_section_change_hook
355
#define md_end                          xtensa_end
356
#define md_flush_pending_output()       xtensa_flush_pending_output ()
357
#define md_operand(x)
358
#define TEXT_SECTION_NAME               xtensa_section_rename (".text")
359
#define DATA_SECTION_NAME               xtensa_section_rename (".data")
360
#define BSS_SECTION_NAME                xtensa_section_rename (".bss")
361
#define HANDLE_ALIGN(fragP)             xtensa_handle_align (fragP)
362
#define MAX_MEM_FOR_RS_ALIGN_CODE       1
363
 
364
 
365
/* The renumber_section function must be mapped over all the sections
366
   after calling xtensa_post_relax_hook.  That function is static in
367
   write.c so it cannot be called from xtensa_post_relax_hook itself.  */
368
 
369
#define md_post_relax_hook \
370
  do \
371
    { \
372
      int i = 0; \
373
      xtensa_post_relax_hook (); \
374
      bfd_map_over_sections (stdoutput, renumber_sections, &i); \
375
    } \
376
  while (0)
377
 
378
 
379
/* Because xtensa relaxation can insert a new literal into the middle of
380
   fragment and thus require re-running the relaxation pass on the
381
   section, we need an explicit flag here.  We explicitly use the name
382
   "stretched" here to avoid changing the source code in write.c.  */
383
 
384
#define md_relax_frag(segment, fragP, stretch) \
385
  xtensa_relax_frag (fragP, stretch, &stretched)
386
 
387
/* Only allow call frame debug info optimization when linker relaxation is
388
   not enabled as otherwise we could generate the DWARF directives without
389
   the relocs necessary to patch them up.  */
390
#define md_allow_eh_opt (linkrelax == 0)
391
 
392
#define LOCAL_LABELS_FB 1
393
#define WORKING_DOT_WORD 1
394
#define DOUBLESLASH_LINE_COMMENTS
395
#define TC_HANDLES_FX_DONE
396
#define TC_FINALIZE_SYMS_BEFORE_SIZE_SEG 0
397
#define TC_LINKRELAX_FIXUP(SEG) 0
398
#define MD_APPLY_SYM_VALUE(FIX) 0
399
#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0
400
 
401
/* Use line number format that is amenable to linker relaxation.  */
402
#define DWARF2_USE_FIXED_ADVANCE_PC (linkrelax != 0)
403
 
404
 
405
/* Resource reservation info functions.  */
406
 
407
/* Returns the number of copies of a particular unit.  */
408
typedef int (*unit_num_copies_func) (void *, xtensa_funcUnit);
409
 
410
/* Returns the number of units the opcode uses.  */
411
typedef int (*opcode_num_units_func) (void *, xtensa_opcode);
412
 
413
/* Given an opcode and an index into the opcode's funcUnit list,
414
   returns the unit used for the index.  */
415
typedef int (*opcode_funcUnit_use_unit_func) (void *, xtensa_opcode, int);
416
 
417
/* Given an opcode and an index into the opcode's funcUnit list,
418
   returns the cycle during which the unit is used.  */
419
typedef int (*opcode_funcUnit_use_stage_func) (void *, xtensa_opcode, int);
420
 
421
/* The above typedefs parameterize the resource_table so that the
422
   optional scheduler doesn't need its own resource reservation system.
423
 
424
   For simple resource checking, which is all that happens normally,
425
   the functions will be as follows (with some wrapping to make the
426
   interface more convenient):
427
 
428
   unit_num_copies_func = xtensa_funcUnit_num_copies
429
   opcode_num_units_func = xtensa_opcode_num_funcUnit_uses
430
   opcode_funcUnit_use_unit_func = xtensa_opcode_funcUnit_use->unit
431
   opcode_funcUnit_use_stage_func = xtensa_opcode_funcUnit_use->stage
432
 
433
   Of course the optional scheduler has its own reservation table
434
   and functions.  */
435
 
436
int opcode_funcUnit_use_unit (void *, xtensa_opcode, int);
437
int opcode_funcUnit_use_stage (void *, xtensa_opcode, int);
438
 
439
typedef struct
440
{
441
  void *data;
442
  int cycles;
443
  int allocated_cycles;
444
  int num_units;
445
  unit_num_copies_func unit_num_copies;
446
  opcode_num_units_func opcode_num_units;
447
  opcode_funcUnit_use_unit_func opcode_unit_use;
448
  opcode_funcUnit_use_stage_func opcode_unit_stage;
449
  unsigned char **units;
450
} resource_table;
451
 
452
resource_table *new_resource_table
453
  (void *, int, int, unit_num_copies_func, opcode_num_units_func,
454
   opcode_funcUnit_use_unit_func, opcode_funcUnit_use_stage_func);
455
void resize_resource_table (resource_table *, int);
456
void clear_resource_table (resource_table *);
457
bfd_boolean resources_available (resource_table *, xtensa_opcode, int);
458
void reserve_resources (resource_table *, xtensa_opcode, int);
459
void release_resources (resource_table *, xtensa_opcode, int);
460
 
461
#endif /* TC_XTENSA */

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