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1 179 jshamlet
@c Copyright (C) 1991, 1992, 1993, 1994, 1995, 2003, 2008, 2011
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@c Free Software Foundation, Inc.
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@c This is part of the GAS manual.
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@c For copying conditions, see the file as.texinfo.
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@ifset GENERIC
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@page
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@end ifset
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@node H8/300-Dependent
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@chapter H8/300 Dependent Features
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11
@cindex H8/300 support
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@menu
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* H8/300 Options::              Options
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* H8/300 Syntax::               Syntax
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* H8/300 Floating Point::       Floating Point
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* H8/300 Directives::           H8/300 Machine Directives
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* H8/300 Opcodes::              Opcodes
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@end menu
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20
@node H8/300 Options
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@section Options
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23
@cindex H8/300 options
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@cindex options, H8/300
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The Renesas H8/300 version of @code{@value{AS}} has one
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machine-dependent option:
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@table @code
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@item -h-tick-hex
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Support H'00 style hex constants in addition to 0x00 style.
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32
@end table
33
 
34
@node H8/300 Syntax
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@section Syntax
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@menu
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* H8/300-Chars::                Special Characters
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* H8/300-Regs::                 Register Names
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* H8/300-Addressing::           Addressing Modes
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@end menu
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@node H8/300-Chars
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@subsection Special Characters
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@cindex line comment character, H8/300
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@cindex H8/300 line comment character
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@samp{;} is the line comment character.
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49
@cindex line separator, H8/300
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@cindex statement separator, H8/300
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@cindex H8/300 line separator
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@samp{$} can be used instead of a newline to separate statements.
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Therefore @emph{you may not use @samp{$} in symbol names} on the H8/300.
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@node H8/300-Regs
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@subsection Register Names
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58
@cindex H8/300 registers
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@cindex register names, H8/300
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You can use predefined symbols of the form @samp{r@var{n}h} and
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@samp{r@var{n}l} to refer to the H8/300 registers as sixteen 8-bit
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general-purpose registers.  @var{n} is a digit from @samp{0} to
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@samp{7}); for instance, both @samp{r0h} and @samp{r7l} are valid
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register names.
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66
You can also use the eight predefined symbols @samp{r@var{n}} to refer
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to the H8/300 registers as 16-bit registers (you must use this form for
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addressing).
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On the H8/300H, you can also use the eight predefined symbols
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@samp{er@var{n}} (@samp{er0} @dots{} @samp{er7}) to refer to the 32-bit
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general purpose registers.
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The two control registers are called @code{pc} (program counter; a
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16-bit register, except on the H8/300H where it is 24 bits) and
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@code{ccr} (condition code register; an 8-bit register).  @code{r7} is
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used as the stack pointer, and can also be called @code{sp}.
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@node H8/300-Addressing
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@subsection Addressing Modes
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@cindex addressing modes, H8/300
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@cindex H8/300 addressing modes
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@value{AS} understands the following addressing modes for the H8/300:
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@table @code
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@item r@var{n}
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Register direct
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89
@item @@r@var{n}
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Register indirect
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92
@need 1200
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@item @@(@var{d}, r@var{n})
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@itemx @@(@var{d}:16, r@var{n})
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@itemx @@(@var{d}:24, r@var{n})
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Register indirect: 16-bit or 24-bit displacement @var{d} from register
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@var{n}.  (24-bit displacements are only meaningful on the H8/300H.)
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@item @@r@var{n}+
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Register indirect with post-increment
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102
@item @@-r@var{n}
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Register indirect with pre-decrement
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@item @code{@@}@var{aa}
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@itemx @code{@@}@var{aa}:8
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@itemx @code{@@}@var{aa}:16
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@itemx @code{@@}@var{aa}:24
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Absolute address @code{aa}.  (The address size @samp{:24} only makes
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sense on the H8/300H.)
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@item #@var{xx}
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@itemx #@var{xx}:8
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@itemx #@var{xx}:16
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@itemx #@var{xx}:32
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Immediate data @var{xx}.  You may specify the @samp{:8}, @samp{:16}, or
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@samp{:32} for clarity, if you wish; but @code{@value{AS}} neither
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requires this nor uses it---the data size required is taken from
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context.
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@item @code{@@}@code{@@}@var{aa}
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@itemx @code{@@}@code{@@}@var{aa}:8
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Memory indirect.  You may specify the @samp{:8} for clarity, if you
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wish; but @code{@value{AS}} neither requires this nor uses it.
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@end table
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127
@node H8/300 Floating Point
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@section Floating Point
129
 
130
@cindex floating point, H8/300 (@sc{ieee})
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@cindex H8/300 floating point (@sc{ieee})
132
The H8/300 family has no hardware floating point, but the @code{.float}
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directive generates @sc{ieee} floating-point numbers for compatibility
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with other development tools.
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136
@page
137
@node H8/300 Directives
138
@section H8/300 Machine Directives
139
 
140
@cindex H8/300 machine directives (none)
141
@cindex machine directives, H8/300 (none)
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@cindex @code{word} directive, H8/300
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@cindex @code{int} directive, H8/300
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@code{@value{AS}} has the following machine-dependent directives for
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the H8/300:
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@table @code
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@cindex H8/300H, assembling for
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@item .h8300h
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Recognize and emit additional instructions for the H8/300H variant, and
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also make @code{.int} emit 32-bit numbers rather than the usual (16-bit)
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for the H8/300 family.
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@item .h8300s
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Recognize and emit additional instructions for the H8S variant, and
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also make @code{.int} emit 32-bit numbers rather than the usual (16-bit)
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for the H8/300 family.
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@item .h8300hn
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Recognize and emit additional instructions for the H8/300H variant in
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normal mode, and also make @code{.int} emit 32-bit numbers rather than
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the usual (16-bit) for the H8/300 family.
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@item .h8300sn
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Recognize and emit additional instructions for the H8S variant in
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normal mode, and also make @code{.int} emit 32-bit numbers rather than
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the usual (16-bit) for the H8/300 family.
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@end table
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170
On the H8/300 family (including the H8/300H) @samp{.word} directives
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generate 16-bit numbers.
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173
@node H8/300 Opcodes
174
@section Opcodes
175
 
176
@cindex H8/300 opcode summary
177
@cindex opcode summary, H8/300
178
@cindex mnemonics, H8/300
179
@cindex instruction summary, H8/300
180
For detailed information on the H8/300 machine instruction set, see
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@cite{H8/300 Series Programming Manual}.  For information specific to
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the H8/300H, see @cite{H8/300H Series Programming Manual} (Renesas).
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@code{@value{AS}} implements all the standard H8/300 opcodes.  No additional
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pseudo-instructions are needed on this family.
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@ifset SMALL
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@c this table, due to the multi-col faking and hardcoded order, looks silly
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@c except in smallbook.  See comments below "@set SMALL" near top of this file.
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191
The following table summarizes the H8/300 opcodes, and their arguments.
192
Entries marked @samp{*} are opcodes used only on the H8/300H.
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194
@smallexample
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@c Using @group seems to use the normal baselineskip, not the smallexample
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@c baselineskip; looks approx doublespaced.
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         @i{Legend:}
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            Rs   @r{source register}
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            Rd   @r{destination register}
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            abs  @r{absolute address}
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            imm  @r{immediate data}
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         disp:N  @r{N-bit displacement from a register}
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        pcrel:N  @r{N-bit displacement relative to program counter}
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   add.b #imm,rd              *  andc #imm,ccr
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   add.b rs,rd                   band #imm,rd
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   add.w rs,rd                   band #imm,@@rd
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*  add.w #imm,rd                 band #imm,@@abs:8
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*  add.l rs,rd                   bra  pcrel:8
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*  add.l #imm,rd              *  bra  pcrel:16
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   adds #imm,rd                  bt   pcrel:8
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   addx #imm,rd               *  bt   pcrel:16
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   addx rs,rd                    brn  pcrel:8
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   and.b #imm,rd              *  brn  pcrel:16
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   and.b rs,rd                   bf   pcrel:8
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*  and.w rs,rd                *  bf   pcrel:16
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*  and.w #imm,rd                 bhi  pcrel:8
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*  and.l #imm,rd              *  bhi  pcrel:16
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*  and.l rs,rd                   bls  pcrel:8
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@page
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*  bls  pcrel:16                 bld  #imm,rd
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   bcc  pcrel:8                  bld  #imm,@@rd
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*  bcc  pcrel:16                 bld  #imm,@@abs:8
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   bhs  pcrel:8                  bnot #imm,rd
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*  bhs  pcrel:16                 bnot #imm,@@rd
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   bcs  pcrel:8                  bnot #imm,@@abs:8
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*  bcs  pcrel:16                 bnot rs,rd
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   blo  pcrel:8                  bnot rs,@@rd
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*  blo  pcrel:16                 bnot rs,@@abs:8
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   bne  pcrel:8                  bor  #imm,rd
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*  bne  pcrel:16                 bor  #imm,@@rd
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   beq  pcrel:8                  bor  #imm,@@abs:8
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*  beq  pcrel:16                 bset #imm,rd
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   bvc  pcrel:8                  bset #imm,@@rd
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*  bvc  pcrel:16                 bset #imm,@@abs:8
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   bvs  pcrel:8                  bset rs,rd
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*  bvs  pcrel:16                 bset rs,@@rd
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   bpl  pcrel:8                  bset rs,@@abs:8
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*  bpl  pcrel:16                 bsr  pcrel:8
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   bmi  pcrel:8                  bsr  pcrel:16
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*  bmi  pcrel:16                 bst  #imm,rd
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   bge  pcrel:8                  bst  #imm,@@rd
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*  bge  pcrel:16                 bst  #imm,@@abs:8
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   blt  pcrel:8                  btst #imm,rd
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*  blt  pcrel:16                 btst #imm,@@rd
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   bgt  pcrel:8                  btst #imm,@@abs:8
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*  bgt  pcrel:16                 btst rs,rd
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   ble  pcrel:8                  btst rs,@@rd
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*  ble  pcrel:16                 btst rs,@@abs:8
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   bclr #imm,rd                  bxor #imm,rd
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   bclr #imm,@@rd                 bxor #imm,@@rd
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   bclr #imm,@@abs:8              bxor #imm,@@abs:8
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   bclr rs,rd                    cmp.b #imm,rd
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   bclr rs,@@rd                   cmp.b rs,rd
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   bclr rs,@@abs:8                cmp.w rs,rd
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   biand #imm,rd                 cmp.w rs,rd
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   biand #imm,@@rd             *  cmp.w #imm,rd
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   biand #imm,@@abs:8          *  cmp.l #imm,rd
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   bild #imm,rd               *  cmp.l rs,rd
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   bild #imm,@@rd                 daa  rs
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   bild #imm,@@abs:8              das  rs
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   bior #imm,rd                  dec.b rs
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   bior #imm,@@rd              *  dec.w #imm,rd
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   bior #imm,@@abs:8           *  dec.l #imm,rd
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   bist #imm,rd                  divxu.b rs,rd
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   bist #imm,@@rd              *  divxu.w rs,rd
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   bist #imm,@@abs:8           *  divxs.b rs,rd
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   bixor #imm,rd              *  divxs.w rs,rd
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   bixor #imm,@@rd                eepmov
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   bixor #imm,@@abs:8          *  eepmovw
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@page
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*  exts.w rd                     mov.w rs,@@abs:16
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*  exts.l rd                  *  mov.l #imm,rd
274
*  extu.w rd                  *  mov.l rs,rd
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*  extu.l rd                  *  mov.l @@rs,rd
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   inc  rs                    *  mov.l @@(disp:16,rs),rd
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*  inc.w #imm,rd              *  mov.l @@(disp:24,rs),rd
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*  inc.l #imm,rd              *  mov.l @@rs+,rd
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   jmp  @@rs                   *  mov.l @@abs:16,rd
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   jmp  abs                   *  mov.l @@abs:24,rd
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   jmp  @@@@abs:8               *  mov.l rs,@@rd
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   jsr  @@rs                   *  mov.l rs,@@(disp:16,rd)
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   jsr  abs                   *  mov.l rs,@@(disp:24,rd)
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   jsr  @@@@abs:8               *  mov.l rs,@@-rd
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   ldc  #imm,ccr              *  mov.l rs,@@abs:16
286
   ldc  rs,ccr                *  mov.l rs,@@abs:24
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*  ldc  @@abs:16,ccr              movfpe @@abs:16,rd
288
*  ldc  @@abs:24,ccr              movtpe rs,@@abs:16
289
*  ldc  @@(disp:16,rs),ccr        mulxu.b rs,rd
290
*  ldc  @@(disp:24,rs),ccr     *  mulxu.w rs,rd
291
*  ldc  @@rs+,ccr              *  mulxs.b rs,rd
292
*  ldc  @@rs,ccr               *  mulxs.w rs,rd
293
*  mov.b @@(disp:24,rs),rd        neg.b rs
294
*  mov.b rs,@@(disp:24,rd)     *  neg.w rs
295
   mov.b @@abs:16,rd           *  neg.l rs
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   mov.b rs,rd                   nop
297
   mov.b @@abs:8,rd               not.b rs
298
   mov.b rs,@@abs:8            *  not.w rs
299
   mov.b rs,rd                *  not.l rs
300
   mov.b #imm,rd                 or.b #imm,rd
301
   mov.b @@rs,rd                  or.b rs,rd
302
   mov.b @@(disp:16,rs),rd     *  or.w #imm,rd
303
   mov.b @@rs+,rd              *  or.w rs,rd
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   mov.b @@abs:8,rd            *  or.l #imm,rd
305
   mov.b rs,@@rd               *  or.l rs,rd
306
   mov.b rs,@@(disp:16,rd)        orc  #imm,ccr
307
   mov.b rs,@@-rd                 pop.w rs
308
   mov.b rs,@@abs:8            *  pop.l rs
309
   mov.w rs,@@rd                  push.w rs
310
*  mov.w @@(disp:24,rs),rd     *  push.l rs
311
*  mov.w rs,@@(disp:24,rd)        rotl.b rs
312
*  mov.w @@abs:24,rd           *  rotl.w rs
313
*  mov.w rs,@@abs:24           *  rotl.l rs
314
   mov.w rs,rd                   rotr.b rs
315
   mov.w #imm,rd              *  rotr.w rs
316
   mov.w @@rs,rd               *  rotr.l rs
317
   mov.w @@(disp:16,rs),rd        rotxl.b rs
318
   mov.w @@rs+,rd              *  rotxl.w rs
319
   mov.w @@abs:16,rd           *  rotxl.l rs
320
   mov.w rs,@@(disp:16,rd)        rotxr.b rs
321
   mov.w rs,@@-rd              *  rotxr.w rs
322
@page
323
*  rotxr.l rs                 *  stc  ccr,@@(disp:24,rd)
324
   bpt                        *  stc  ccr,@@-rd
325
   rte                        *  stc  ccr,@@abs:16
326
   rts                        *  stc  ccr,@@abs:24
327
   shal.b rs                     sub.b rs,rd
328
*  shal.w rs                     sub.w rs,rd
329
*  shal.l rs                  *  sub.w #imm,rd
330
   shar.b rs                  *  sub.l rs,rd
331
*  shar.w rs                  *  sub.l #imm,rd
332
*  shar.l rs                     subs #imm,rd
333
   shll.b rs                     subx #imm,rd
334
*  shll.w rs                     subx rs,rd
335
*  shll.l rs                  *  trapa #imm
336
   shlr.b rs                     xor  #imm,rd
337
*  shlr.w rs                     xor  rs,rd
338
*  shlr.l rs                  *  xor.w #imm,rd
339
   sleep                      *  xor.w rs,rd
340
   stc  ccr,rd                *  xor.l #imm,rd
341
*  stc  ccr,@@rs               *  xor.l rs,rd
342
*  stc  ccr,@@(disp:16,rd)        xorc #imm,ccr
343
@end smallexample
344
@end ifset
345
 
346
@cindex size suffixes, H8/300
347
@cindex H8/300 size suffixes
348
Four H8/300 instructions (@code{add}, @code{cmp}, @code{mov},
349
@code{sub}) are defined with variants using the suffixes @samp{.b},
350
@samp{.w}, and @samp{.l} to specify the size of a memory operand.
351
@code{@value{AS}} supports these suffixes, but does not require them;
352
since one of the operands is always a register, @code{@value{AS}} can
353
deduce the correct size.
354
 
355
For example, since @code{r0} refers to a 16-bit register,
356
@example
357
mov    r0,@@foo
358
@exdent is equivalent to
359
mov.w  r0,@@foo
360
@end example
361
 
362
If you use the size suffixes, @code{@value{AS}} issues a warning when
363
the suffix and the register size do not match.

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