OpenCores
URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [gnu/] [binutils/] [include/] [gdb/] [sim-h8300.h] - Blame information for rev 303

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 17 khays
/* This file defines the interface between the h8300 simulator and gdb.
2 166 khays
   Copyright (C) 2002, 2007-2012 Free Software Foundation, Inc.
3 17 khays
 
4
   This file is part of GDB.
5
 
6
   This program is free software; you can redistribute it and/or modify
7
   it under the terms of the GNU General Public License as published by
8
   the Free Software Foundation; either version 3 of the License, or
9
   (at your option) any later version.
10
 
11
   This program is distributed in the hope that it will be useful,
12
   but WITHOUT ANY WARRANTY; without even the implied warranty of
13
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
   GNU General Public License for more details.
15
 
16
   You should have received a copy of the GNU General Public License
17
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
18
 
19
#if !defined (SIM_H8300_H)
20
#define SIM_H8300_H
21
 
22
#ifdef __cplusplus
23
extern "C" { //}
24
#endif
25
 
26
/* The simulator makes use of the following register information. */
27
 
28
  enum sim_h8300_regs
29
  {
30
    /* Registers common to all the H8 variants. */
31
    /* Start here: */
32
    SIM_H8300_R0_REGNUM,
33
    SIM_H8300_R1_REGNUM,
34
    SIM_H8300_R2_REGNUM,
35
    SIM_H8300_R3_REGNUM,
36
    SIM_H8300_R4_REGNUM,
37
    SIM_H8300_R5_REGNUM,
38
    SIM_H8300_R6_REGNUM,
39
    SIM_H8300_R7_REGNUM,
40
 
41
    SIM_H8300_CCR_REGNUM,  /* Contains processor status */
42
    SIM_H8300_PC_REGNUM,   /* Contains program counter */
43
    /* End here */
44
 
45
    SIM_H8300_EXR_REGNUM,  /* Contains extended processor status
46
                              H8S and higher */
47
    SIM_H8300_MACL_REGNUM, /* Lower part of MAC register (26xx only)*/
48
    SIM_H8300_MACH_REGNUM, /* High part of MAC register (26xx only) */
49
 
50
    SIM_H8300_CYCLE_REGNUM,
51
    SIM_H8300_INST_REGNUM,
52
    SIM_H8300_TICK_REGNUM
53
  };
54
 
55
  enum
56
  {
57
    SIM_H8300_ARG_FIRST_REGNUM = SIM_H8300_R0_REGNUM, /* first reg in which an arg
58
                                                         may be passed */
59
    SIM_H8300_ARG_LAST_REGNUM = SIM_H8300_R3_REGNUM,  /* last  reg in which an arg
60
                                                         may be passed */
61
    SIM_H8300_FP_REGNUM = SIM_H8300_R6_REGNUM, /* Contain address of executing
62
                                                  stack frame */
63
    SIM_H8300_SP_REGNUM = SIM_H8300_R7_REGNUM  /* Contains address of top of stack */
64
  };
65
 
66
  enum
67
  {
68
    SIM_H8300_NUM_COMMON_REGS = 10,
69
    SIM_H8300_S_NUM_REGS = 13,
70
    SIM_H8300_NUM_REGS = 16
71
  };
72
 
73
#ifdef __cplusplus
74
}
75
#endif
76
 
77
#endif                          /* SIM_H8300_H */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.