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[/] [open8_urisc/] [trunk/] [gnu/] [binutils/] [include/] [opcode/] [ChangeLog] - Blame information for rev 24

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Line No. Rev Author Line
1 17 khays
2011-05-31  Paul Brook  
2
 
3
        * opcode/arm.h (ARM_ARCH_V7R_IDIV): Define.
4
 
5
2011-04-18  Julian Brown  
6
 
7
        * arm.h (ARM_AEXT_V7_ARM): Remove ARM_EXT_OS from bitmask.
8
 
9
2011-04-11  Dan McDonald  
10
 
11
        PR gas/12296
12
        * arm.h (ARM_AEXT_V7_ARM): Add ARM_EXT_OS.
13
 
14
2011-03-22  Eric B. Weddington  
15
 
16
        * avr.h (AVR_ISA_SPMX,AVR_ISA_DES,AVR_ISA_M256,AVR_ISA_XMEGA):
17
        New instruction set flags.
18
        (AVR_INSN): Add new instructions for SPM Z+, DES for XMEGA.
19
 
20
2011-02-28  Maciej W. Rozycki  
21
 
22
        * mips.h (M_PREF_AB): New enum value.
23
 
24
2011-02-12  Mike Frysinger  
25
 
26
        * bfin.h (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2, M_IH,
27
        M_IU): Define.
28
        (is_macmod_pmove, is_macmod_hmove): New functions.
29
 
30
2011-02-11  Mike Frysinger  
31
 
32
        * bfin.h: Add OPCODE_BFIN_H ifdef multiple include protection.
33
 
34
2011-02-04  Bernd Schmidt  
35
 
36
        * tic6x-opcode-table.h (cmtl, ll, sl): Available on C64XP.
37
        * tic6x.h (TIC6X_INSN_ATOMIC): Remove.
38
 
39
2010-12-31  John David Anglin  
40
 
41
        PR gas/11395
42
        * hppa.h (pa_opcodes): Revert last change.  Exchange 32 and 64-bit
43
        "bb" entries.
44
 
45
2010-12-26  John David Anglin  
46
 
47
        PR gas/11395
48
        * hppa.h: Clear "d" bit in "add" and "sub" patterns.
49
 
50
2010-12-18  Richard Sandiford  
51
 
52
        * mips.h: Update commentary after last commit.
53
 
54
2010-12-18  Mingjie Xing  
55
 
56
        * mips.h (OP_*_OFFSET_A, OP_*_OFFSET_B, OP_*_OFFSET_C)
57
        (OP_*_RZ, OP_*_FZ, INSN2_M_FP_D, INSN2_WRITE_GPR_Z, INSN2_WRITE_FPR_Z)
58
        (INSN2_READ_GPR_Z, INSN2_READ_FPR_Z, INSN2_READ_GPR_D): Define.
59
 
60
2010-11-23  Richard Sandiford  
61
 
62
        * mips.h: Fix previous commit.
63
 
64
2010-11-23  Maciej W. Rozycki  
65
 
66
        * mips.h (INSN_CHIP_MASK): Update according to INSN_LOONGSON_3A.
67
        (INSN_LOONGSON_3A): Clear bit 31.
68
 
69
2010-11-15  Matthew Gretton-Dann  
70
 
71
        PR gas/12198
72
        * arm.h (ARM_AEXT_V6M_ONLY): New define.
73
        (ARM_AEXT_V6M): Rewrite in terms of ARM_AEXT_V6M_ONLY.
74
        (ARM_ARCH_V6M_ONLY): New define.
75
 
76
2010-11-11  Mingming Sun  
77
 
78
        * mips.h (INSN_LOONGSON_3A): Defined.
79
        (CPU_LOONGSON_3A): Defined.
80
        (OPCODE_IS_MEMBER): Add LOONGSON_3A.
81
 
82
2010-10-09  Matt Rice  
83
 
84
        * cgen.h (CGEN_ATTR, CGEN_ATTR_TYPE): Rename bool attribute to bool_.
85
        (CGEN_ATTR_BOOLS, CGEN_ATTR_CGEN_INSN_ALIAS_VALUE): Likewise.
86
 
87
2010-09-23  Matthew Gretton-Dann  
88
 
89
        * arm.h (ARM_EXT_VIRT): New define.
90
        (ARM_ARCH_V7A_IDIV_MP_SEC): Rename...
91
        (ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): ...to this and include Virtualization
92
        Extensions.
93
 
94
2010-09-23  Matthew Gretton-Dann  
95
 
96
        * arm.h (ARM_AEXT_ADIV): New define.
97
        (ARM_ARCH_V7A_IDIV_MP_SEC): Likewise.
98
 
99
2010-09-23  Matthew Gretton-Dann  
100
 
101
        * arm.h (ARM_EXT_OS): New define.
102
        (ARM_AEXT_V6SM): Likewise.
103
        (ARM_ARCH_V6SM): Likewise.
104
 
105
2010-09-23  Matthew Gretton-Dann  
106
 
107
        * arm.h (ARM_EXT_MP): Add.
108
        (ARM_ARCH_V7A_MP): Likewise.
109
 
110
2010-09-22  Mike Frysinger  
111
 
112
        * bfin.h: Declare pseudoChr structs/defines.
113
 
114
2010-09-21  Mike Frysinger  
115
 
116
        * bfin.h: Strip trailing whitespace.
117
 
118
2010-07-29  DJ Delorie  
119
 
120
        * rx.h (RX_Operand_Type): Add TwoReg.
121
        (RX_Opcode_ID): Remove ediv and ediv2.
122
 
123
2010-07-27  DJ Delorie  
124
 
125
        * rx.h (RX_Opcode_ID): Add nop2 and nop3 for statistics.
126
 
127
2010-07-23  Naveen.H.S  
128
            Ina Pandit  
129
 
130
        * v850.h: Define PROCESSOR_MASK, PROCESSOR_OPTION_EXTENSION,
131
        PROCESSOR_OPTION_ALIAS, PROCESSOR_V850E2, PROCESSOR_V850E2V3 and
132
        PROCESSOR_V850E2_ALL.
133
        Remove PROCESSOR_V850EA support.
134
        (v850_operand): Define V850_OPERAND_EP, V850_OPERAND_FLOAT_CC,
135
        V850_OPERAND_VREG, V850E_IMMEDIATE16, V850E_IMMEDIATE16HI,
136
        V850E_IMMEDIATE23, V850E_IMMEDIATE32, V850_OPERAND_SIGNED,
137
        V850_OPERAND_DISP, V850_PCREL, V850_REG_EVEN, V850E_PUSH_POP,
138
        V850_NOT_IMM0, V850_NOT_SA, V850_OPERAND_BANG and
139
        V850_OPERAND_PERCENT.
140
        Update V850_OPERAND_SRG, V850_OPERAND_CC, V850_OPERAND_RELAX and
141
        V850_NOT_R0.
142
        Remove V850_OPERAND_SIGNED, V850_OPERAND_EP, V850_OPERAND_DISP
143
        and V850E_PUSH_POP
144
 
145
2010-07-06  Maciej W. Rozycki  
146
 
147
        * mips.h (MIPS16_INSN_UNCOND_BRANCH): New macro.
148
        (MIPS16_INSN_BRANCH): Rename to...
149
        (MIPS16_INSN_COND_BRANCH): ... this.
150
 
151
2010-07-03  Alan Modra  
152
 
153
        * ppc.h (PPC_OPCODE_32, PPC_OPCODE_BOOKE64, PPC_OPCODE_CLASSIC): Delete.
154
        Renumber other PPC_OPCODE defines.
155
 
156
2010-07-03  Alan Modra  
157
 
158
        * ppc.h (PPC_OPCODE_COMMON): Expand comment.
159
 
160
2010-06-29  Alan Modra  
161
 
162
        * maxq.h: Delete file.
163
 
164
2010-06-14  Sebastian Andrzej Siewior  
165
 
166
        * ppc.h (PPC_OPCODE_E500): Define.
167
 
168
2010-05-26  Catherine Moore  
169
 
170
        * opcode/mips.h (INSN_MIPS16): Remove.
171
 
172
2010-04-21  Joseph Myers  
173
 
174
        * tic6x-insn-formats.h (s_branch): Correct typo in bitmask.
175
 
176
2010-04-15  Nick Clifton  
177
 
178
        * alpha.h: Update copyright notice to use GPLv3.
179
        * arc.h: Likewise.
180
        * arm.h: Likewise.
181
        * avr.h: Likewise.
182
        * bfin.h: Likewise.
183
        * cgen.h: Likewise.
184
        * convex.h: Likewise.
185
        * cr16.h: Likewise.
186
        * cris.h: Likewise.
187
        * crx.h: Likewise.
188
        * d10v.h: Likewise.
189
        * d30v.h: Likewise.
190
        * dlx.h: Likewise.
191
        * h8300.h: Likewise.
192
        * hppa.h: Likewise.
193
        * i370.h: Likewise.
194
        * i386.h: Likewise.
195
        * i860.h: Likewise.
196
        * i960.h: Likewise.
197
        * ia64.h: Likewise.
198
        * m68hc11.h: Likewise.
199
        * m68k.h: Likewise.
200
        * m88k.h: Likewise.
201
        * maxq.h: Likewise.
202
        * mips.h: Likewise.
203
        * mmix.h: Likewise.
204
        * mn10200.h: Likewise.
205
        * mn10300.h: Likewise.
206
        * msp430.h: Likewise.
207
        * np1.h: Likewise.
208
        * ns32k.h: Likewise.
209
        * or32.h: Likewise.
210
        * pdp11.h: Likewise.
211
        * pj.h: Likewise.
212
        * pn.h: Likewise.
213
        * ppc.h: Likewise.
214
        * pyr.h: Likewise.
215
        * rx.h: Likewise.
216
        * s390.h: Likewise.
217
        * score-datadep.h: Likewise.
218
        * score-inst.h: Likewise.
219
        * sparc.h: Likewise.
220
        * spu-insns.h: Likewise.
221
        * spu.h: Likewise.
222
        * tic30.h: Likewise.
223
        * tic4x.h: Likewise.
224
        * tic54x.h: Likewise.
225
        * tic80.h: Likewise.
226
        * v850.h: Likewise.
227
        * vax.h: Likewise.
228
 
229
2010-03-25  Joseph Myers  
230
 
231
        * tic6x-control-registers.h, tic6x-insn-formats.h,
232
        tic6x-opcode-table.h, tic6x.h: New.
233
 
234
2010-02-25  Wu Zhangjin  
235
 
236
        * mips.h: (LOONGSON2F_NOP_INSN): New macro.
237
 
238
2010-02-08  Philipp Tomsich  
239
 
240
        * opcode/ppc.h (PPC_OPCODE_TITAN): Define.
241
 
242
2010-01-14  H.J. Lu  
243
 
244
        * ia64.h (ia64_find_opcode): Remove argument name.
245
        (ia64_find_next_opcode): Likewise.
246
        (ia64_dis_opcode): Likewise.
247
        (ia64_free_opcode): Likewise.
248
        (ia64_find_dependency): Likewise.
249
 
250
2009-11-22  Doug Evans  
251
 
252
        * cgen.h: Include bfd_stdint.h.
253
        (CGEN_INSN_LGSINT, CGEN_INSN_LGUINT): New types.
254
 
255
2009-11-18  Paul Brook  
256
 
257
        * arm.h (FPU_VFP_V4_SP_D16, FPU_ARCH_VFP_V4_SP_D16): Define.
258
 
259
2009-11-17  Paul Brook  
260
        Daniel Jacobowitz  
261
 
262
        * arm.h (ARM_EXT_V6_DSP): Define.
263
        (ARM_AEXT_V6T2, ARM_AEXT_NOTM): Include ARM_EXT_V6_DSP.
264
        (ARM_AEXT_V7EM, ARM_ARCH_V7EM): Define.
265
 
266
2009-11-04  DJ Delorie  
267
 
268
        * rx.h (rx_decode_opcode) (mvtipl): Add.
269
        (mvtcp, mvfcp, opecp): Remove.
270
 
271
2009-11-02  Paul Brook  
272
 
273
        * arm.h (FPU_VFP_EXT_V3xD, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA,
274
        FPU_VFP_EXT_FMA, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4): Define.
275
        (FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3_FP16, FPU_ARCH_VFP_V3xD,
276
        FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_VFP_V4, FPU_ARCH_VFP_V4D16,
277
        FPU_ARCH_NEON_VFP_V4): Define.
278
 
279
2009-10-23  Doug Evans  
280
 
281
        * cgen-bitset.h: Delete, moved to ../cgen/bitset.h.
282
        * cgen.h: Update.  Improve multi-inclusion macro name.
283
 
284
2009-10-02  Peter Bergner  
285
 
286
        * ppc.h (PPC_OPCODE_476): Define.
287
 
288
2009-10-01  Peter Bergner  
289
 
290
        * ppc.h (PPC_OPCODE_A2): Rename from PPC_OPCODE_PPCA2.
291
 
292
2009-09-29  DJ Delorie  
293
 
294
        * rx.h: New file.
295
 
296
2009-09-22  Peter Bergner  
297
 
298
        * ppc.h (ppc_cpu_t): Typedef to uint64_t.
299
 
300
2009-09-21  Ben Elliston  
301
 
302
        * ppc.h (PPC_OPCODE_PPCA2): New.
303
 
304
2009-09-05  Martin Thuresson  
305
 
306
        * ia64.h (struct ia64_operand): Renamed member class to op_class.
307
 
308
2009-08-29  Martin Thuresson  
309
 
310
        * tic30.h (template): Rename type template to
311
        insn_template. Updated code to use new name.
312
        * tic54x.h (template): Rename type template to
313
        insn_template.
314
 
315
2009-08-20  Nick Hudson  
316
 
317
        * hppa.h (pa_opcodes): Add a pa10 bb without FLAG_STRICT.
318
 
319
2009-06-11  Anthony Green  
320
 
321
        * moxie.h (MOXIE_F3_PCREL): Define.
322
        (moxie_form3_opc_info): Grow.
323
 
324
2009-06-06  Anthony Green  
325
 
326
        * moxie.h (MOXIE_F1_M): Define.
327
 
328
2009-04-15  Anthony Green  
329
 
330
        * moxie.h: Created.
331
 
332
2009-04-06  DJ Delorie  
333
 
334
        * h8300.h: Add relaxation attributes to MOVA opcodes.
335
 
336
2009-03-10  Alan Modra  
337
 
338
        * ppc.h (ppc_parse_cpu): Declare.
339
 
340
2009-03-02  Qinwei  
341
 
342
        * score-inst.h (score_insn_type, score_data_type): Add Ra_I9_I5
343
        and _IMM11 for mbitclr and mbitset.
344
        * score-datadep.h: Update dependency information.
345
 
346
2009-02-26  Peter Bergner  
347
 
348
        * ppc.h (PPC_OPCODE_POWER7): New.
349
 
350
2009-02-06  Doug Evans  
351
 
352
        * i386.h: Add comment regarding sse* insns and prefixes.
353
 
354
2009-02-03  Sandip Matte  
355
 
356
        * mips.h (INSN_XLR): Define.
357
        (INSN_CHIP_MASK): Update.
358
        (CPU_XLR): Define.
359
        (OPCODE_IS_MEMBER): Update.
360
        (M_MSGSND, M_MSGLD, M_MSGLD_T, M_MSGWAIT, M_MSGWAIT_T): Define.
361
 
362
2009-01-28  Doug Evans  
363
 
364
        * opcode/i386.h: Add multiple inclusion protection.
365
        (EAX_REG_NUM,ECX_REG_NUM,EDX_REGNUM,EBX_REG_NUM,ESI_REG_NUM)
366
        (EDI_REG_NUM): New macros.
367
        (MODRM_MOD_FIELD,MODRM_REG_FIELD,MODRM_RM_FIELD): New macros.
368
        (SIB_SCALE_FIELD,SIB_INDEX_FIELD,SIB_BASE_FIELD): New macros.
369
        (REX_PREFIX_P): New macro.
370
 
371
2009-01-09  Peter Bergner  
372
 
373
        * ppc.h (struct powerpc_opcode): New field "deprecated".
374
        (PPC_OPCODE_NOPOWER4): Delete.
375
 
376
2008-11-28  Joshua Kinard  
377
 
378
        * mips.h: Define CPU_R14000, CPU_R16000.
379
        (OPCODE_IS_MEMBER): Include R14000, R16000 in test.
380
 
381
2008-11-18  Catherine Moore  
382
 
383
        * arm.h (FPU_NEON_FP16): New.
384
        (FPU_ARCH_NEON_FP16): New.
385
 
386
2008-11-06  Chao-ying Fu  
387
 
388
        * mips.h: Doucument '1' for 5-bit sync type.
389
 
390
2008-08-28  H.J. Lu  
391
 
392
        * ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB.  Update
393
        IA64_RS_CR.
394
 
395
2008-08-01  Peter Bergner  
396
 
397
        * ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New.
398
 
399
2008-07-30  Michael J. Eager  
400
 
401
        * ppc.h (PPC_OPCODE_405): Define.
402
        (PPC_OPERAND_FSL, PPC_OPERAND_FCR, PPC_OPERAND_UDI): Define.
403
 
404
2008-06-13  Peter Bergner  
405
 
406
        * ppc.h (ppc_cpu_t): New typedef.
407
        (struct powerpc_opcode ): Use it.
408
        (struct powerpc_operand ): Likewise.
409
        (struct powerpc_macro ): Likewise.
410
 
411
2008-06-12  Adam Nemet  
412
 
413
        * mips.h: Document new field descriptors +x, +X, +p, +P, +s, +S.
414
        Update comment before MIPS16 field descriptors to mention MIPS16.
415
        (OP_SH_BBITIND, OP_MASK_BBITIND): New bit mask and shift count for
416
        BBIT.
417
        (OP_SH_CINSPOS, OP_MASK_CINSPOS, OP_SH_CINSLM1, OP_MASK_CINSLM1):
418
        New bit masks and shift counts for cins and exts.
419
 
420
        * mips.h: Document new field descriptors +Q.
421
        (OP_SH_SEQI, OP_MASK_SEQI): New bit mask and shift count for SEQI.
422
 
423
2008-04-28  Adam Nemet  
424
 
425
        * mips.h (INSN_MACRO): Move it up to the the pinfo macros.
426
        (INSN2_M_FP_S, INSN2_M_FP_D): New pinfo2 macros.
427
 
428
2008-04-14  Edmar Wienskoski  
429
 
430
        * ppc.h: (PPC_OPCODE_E500MC): New.
431
 
432
2008-04-03  H.J. Lu  
433
 
434
        * i386.h (MAX_OPERANDS): Set to 5.
435
        (MAX_MNEM_SIZE): Changed to 20.
436
 
437
2008-03-28  Eric B. Weddington  
438
 
439
        * avr.h (AVR_ISA_TINY3): Define new opcode set for attiny167.
440
 
441
2008-03-09  Paul Brook  
442
 
443
        * arm.h (FPU_VFP_EXT_D32, FPU_VFP_V3D16, FPU_ARCH_VFP_V3D16): Define.
444
 
445
2008-03-04  Paul Brook  
446
 
447
        * arm.h (ARM_EXT_V6M, ARM_EXT_BARRIER, ARM_EXT_THUMB_MSR): Define.
448
        (ARM_AEXT_V6T2, ARM_AEXT_V7_ARM, ARM_AEXT_V7M): Use new flags.
449
        (ARM_AEXT_V6M, ARM_ARCH_V6M): Define.
450
 
451
2008-02-27  Denis Vlasenko  
452
            Nick Clifton  
453
 
454
        PR 3134
455
        * h8300.h (h8_opcodes): Add an encoding for a mov.l instruction
456
        with a 32-bit displacement but without the top bit of the 4th byte
457
        set.
458
 
459
2008-02-18  M R Swami Reddy 
460
 
461
        * cr16.h (cr16_num_optab): Declared.
462
 
463
2008-02-14  Hakan Ardo  
464
 
465
        PR gas/2626
466
        * avr.h (AVR_ISA_2xxe): Define.
467
 
468
2008-02-04  Adam Nemet  
469
 
470
        * mips.h: Update copyright.
471
        (INSN_CHIP_MASK): New macro.
472
        (INSN_OCTEON): New macro.
473
        (CPU_OCTEON): New macro.
474
        (OPCODE_IS_MEMBER): Handle Octeon instructions.
475
 
476
2008-01-23  Eric B. Weddington  
477
 
478
        * avr.h (AVR_ISA_RF401): Add new opcode set for at86rf401.
479
 
480
2008-01-03  Eric B. Weddington  
481
 
482
        * avr.h (AVR_ISA_USB162): Add new opcode set.
483
        (AVR_ISA_AVR3): Likewise.
484
 
485
2007-11-29  Mark Shinwell  
486
 
487
        * mips.h (INSN_LOONGSON_2E): New.
488
        (INSN_LOONGSON_2F): New.
489
        (CPU_LOONGSON_2E): New.
490
        (CPU_LOONGSON_2F): New.
491
        (OPCODE_IS_MEMBER): Update for Loongson-2E and -2F flags.
492
 
493
2007-11-29  Mark Shinwell  
494
 
495
        * mips.h (INSN_ISA*): Redefine certain values as an
496
        enumeration.  Update comments.
497
        (mips_isa_table): New.
498
        (ISA_MIPS*): Redefine to match enumeration.
499
        (OPCODE_IS_MEMBER): Modify to correctly test new INSN_ISA*
500
        values.
501
 
502
2007-08-08  Ben Elliston  
503
 
504
        * ppc.h (PPC_OPCODE_PPCPS): New.
505
 
506
2007-07-03  Nathan Sidwell  
507
 
508
        * m68k.h: Document j K & E.
509
 
510
2007-06-29  M R Swami Reddy  
511
 
512
        * cr16.h: New file for CR16 target.
513
 
514
2007-05-02  Alan Modra  
515
 
516
        * ppc.h (PPC_OPERAND_PLUS1): Update comment.
517
 
518
2007-04-23  Nathan Sidwell  
519
 
520
        * m68k.h (mcfisa_c): New.
521
        (mcfusp, mcf_mask): Adjust.
522
 
523
2007-04-20  Alan Modra  
524
 
525
        * ppc.h (struct powerpc_operand): Replace "bits" with "bitm".
526
        (num_powerpc_operands): Declare.
527
        (PPC_OPERAND_SIGNED et al): Redefine as hex.
528
        (PPC_OPERAND_PLUS1): Define.
529
 
530
2007-03-21  H.J. Lu  
531
 
532
        * i386.h (REX_MODE64): Renamed to ...
533
        (REX_W): This.
534
        (REX_EXTX): Renamed to ...
535
        (REX_R): This.
536
        (REX_EXTY): Renamed to ...
537
        (REX_X): This.
538
        (REX_EXTZ): Renamed to ...
539
        (REX_B): This.
540
 
541
2007-03-15  H.J. Lu  
542
 
543
        * i386.h: Add entries from config/tc-i386.h and move tables
544
        to opcodes/i386-opc.h.
545
 
546
2007-03-13  H.J. Lu  
547
 
548
        * i386.h (FloatDR): Removed.
549
        (i386_optab): Use FloatD and FloatD|FloatR instead of FloatDR.
550
 
551
2007-03-01  Alan Modra  
552
 
553
        * spu-insns.h: Add soma double-float insns.
554
 
555
2007-02-20  Thiemo Seufer  
556
            Chao-Ying Fu  
557
 
558
        * mips.h (OP_SH_BP, OP_MASK_BP): Add support for balign instruction.
559
        (INSN_DSPR2): Add flag for DSP R2 instructions.
560
        (M_BALIGN): New macro.
561
 
562
2007-02-14  Alan Modra  
563
 
564
        * i386.h (i386_optab): Replace all occurrences of Seg2ShortForm
565
        and Seg3ShortFrom with Shortform.
566
 
567
2007-02-11  H.J. Lu  
568
 
569
        PR gas/4027
570
        * i386.h (i386_optab): Put the real "test" before the pseudo
571
        one.
572
 
573
2007-01-08  Kazu Hirata  
574
 
575
        * m68k.h (m68010up): OR fido_a.
576
 
577
2006-12-25  Kazu Hirata  
578
 
579
        * m68k.h (fido_a): New.
580
 
581
2006-12-24  Kazu Hirata  
582
 
583
        * m68k.h (mcfmac, mcfemac, cfloat, mcfhwdiv, mcfisa_a,
584
        mcfisa_aa, mcfisa_b, mcfusp, mcf_mask): Double the defined
585
        values.
586
 
587
2006-11-08  H.J. Lu  
588
 
589
        * i386.h (i386_optab): Replace CpuPNI with CpuSSE3.
590
 
591
2006-10-31  Mei Ligang  
592
 
593
        * score-inst.h (enum score_insn_type): Add Insn_internal.
594
 
595
2006-10-25  Trevor Smigiel  
596
            Yukishige Shibata  
597
            Nobuhisa Fujinami  
598
            Takeaki Fukuoka  
599
            Alan Modra  
600
 
601
        * spu-insns.h: New file.
602
        * spu.h: New file.
603
 
604
2006-10-24  Andrew Pinski  
605
 
606
        * ppc.h (PPC_OPCODE_CELL): Define.
607
 
608
2006-10-23  Dwarakanath Rajagopal  
609
 
610
        * i386.h :  Modify opcode to support for the change in POPCNT opcode
611
        in amdfam10 architecture.
612
 
613
2006-09-28  H.J. Lu  
614
 
615
        * i386.h: Replace CpuMNI with CpuSSSE3.
616
 
617
2006-09-26  Mark Shinwell  
618
            Joseph Myers  
619
            Ian Lance Taylor  
620
            Ben Elliston  
621
 
622
        * arm.h (ARM_CEXT_IWMMXT2, ARM_ARCH_IWMMXT2): Define.
623
 
624
2006-09-17  Mei Ligang  
625
 
626
        * score-datadep.h: New file.
627
        * score-inst.h: New file.
628
 
629
2006-07-14  H.J. Lu  
630
 
631
        * i386.h (i386_optab): Remove InvMem from maskmovq, movhlps,
632
        movlhps, movmskps, pextrw, pmovmskb, movmskpd, maskmovdqu,
633
        movdq2q and movq2dq.
634
 
635
2006-07-10 Dwarakanath Rajagopal        
636
           Michael Meissner             
637
 
638
        * i386.h: Add amdfam10 new instructions (SSE4a and ABM instructions).
639
 
640
2006-06-12  H.J. Lu  
641
 
642
        * i386.h (i386_optab): Add "nop" with memory reference.
643
 
644
2006-06-12  H.J. Lu  
645
 
646
        * i386.h (i386_optab): Update comment for 64bit NOP.
647
 
648
2006-06-06  Ben Elliston  
649
            Anton Blanchard  
650
 
651
        * ppc.h (PPC_OPCODE_POWER6): Define.
652
        Adjust whitespace.
653
 
654
2006-06-05  Thiemo Seufer  
655
 
656
        * mips.h: Improve description of MT flags.
657
 
658
2006-05-25  Richard Sandiford  
659
 
660
        * m68k.h (mcf_mask): Define.
661
 
662
2006-05-05  Thiemo Seufer  
663
            David Ung  
664
 
665
        * mips.h (enum): Add macro M_CACHE_AB.
666
 
667
2006-05-04  Thiemo Seufer  
668
            Nigel Stephens  
669
            David Ung  
670
 
671
        * mips.h: Add INSN_SMARTMIPS define.
672
 
673
2006-04-30  Thiemo Seufer  
674
            David Ung  
675
 
676
        * mips.h: Defines udi bits and masks.  Add description of
677
        characters which may appear in the args field of udi
678
        instructions.
679
 
680
2006-04-26  Thiemo Seufer  
681
 
682
        * mips.h: Improve comments describing the bitfield instruction
683
        fields.
684
 
685
2006-04-26  Julian Brown  
686
 
687
        * arm.h (FPU_VFP_EXT_V3): Define constant.
688
        (FPU_NEON_EXT_V1): Likewise.
689
        (FPU_VFP_HARD): Update.
690
        (FPU_VFP_V3): Define macro.
691
        (FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_PLUS_NEON_V1): Define macros.
692
 
693
2006-04-07  Joerg Wunsch  
694
 
695
        * avr.h (AVR_ISA_PWMx): New.
696
 
697
2006-03-28  Nathan Sidwell  
698
 
699
        * m68k.h (cpu_m68k, cpu_cf, cpu_m68000, cpu_m68008, cpu_m68010,
700
        cpu_m68020, cpu_m68ec030, cpu_m68040, cpu_m68060, cpu_m68851,
701
        cpu_m68881, cpu_m68882, cpu_cpu32, cpu_cf5200, cpu_cf5206e,
702
        cpu_cf5208, cpu_cf521x, cpu_cf5213, cpu_cf5249, cpu_cf528x,
703
        cpu_cf5307, cpu_cf5329, cpu_cf5407, cpu_cf547x, cpu_cf548x): Remove.
704
 
705
2006-03-10  Paul Brook  
706
 
707
        * arm.h (ARM_AEXT_V7_ARM): Include v6ZK extensions.
708
 
709
2006-03-04  John David Anglin  
710
 
711
        * hppa.h (pa_opcodes): Reorder bb opcodes so that pa10 opcodes come
712
        first.  Correct mask of bb "B" opcode.
713
 
714
2006-02-27  H.J. Lu 
715
 
716
        * i386.h (i386_optab): Support Intel Merom New Instructions.
717
 
718
2006-02-24  Paul Brook  
719
 
720
        * arm.h: Add V7 feature bits.
721
 
722
2006-02-23  H.J. Lu  
723
 
724
        * ia64.h (ia64_opnd): Add IA64_OPND_IMMU5b.
725
 
726
2006-01-31  Paul Brook  
727
        Richard Earnshaw 
728
 
729
        * arm.h: Use ARM_CPU_FEATURE.
730
        (ARM_AEXT_*, FPU_ENDIAN_PURE, FPU_VFP_HARD): New.
731
        (arm_feature_set): Change to a structure.
732
        (ARM_CPU_HAS_FEATURE, ARM_MERGE_FEATURE_SETS, ARM_CLEAR_FEATURE,
733
        ARM_FEATURE): New macros.
734
 
735
2005-12-07  Hans-Peter Nilsson  
736
 
737
        * cris.h (MOVE_M_TO_PREG_OPCODE, MOVE_M_TO_PREG_ZBITS)
738
        (MOVE_PC_INCR_OPCODE_PREFIX, MOVE_PC_INCR_OPCODE_SUFFIX): New macros.
739
        (ADD_PC_INCR_OPCODE): Don't define.
740
 
741
2005-12-06  H.J. Lu  
742
 
743
        PR gas/1874
744
        * i386.h (i386_optab): Add 64bit support for monitor and mwait.
745
 
746
2005-11-14  David Ung  
747
 
748
        * mips.h: Assign 'm'/'M' codes to MIPS16e save/restore
749
        instructions.  Define MIPS16_ALL_ARGS and MIPS16_ALL_STATICS for
750
        save/restore encoding of the args field.
751
 
752
2005-10-28  Dave Brolley  
753
 
754
        Contribute the following changes:
755
        2005-02-16  Dave Brolley  
756
 
757
        * cgen-bitset.h: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
758
        cgen_isa_mask_* to cgen_bitset_*.
759
        * cgen.h: Likewise.
760
 
761
        2003-10-21  Richard Sandiford  
762
 
763
        * cgen.h (CGEN_BITSET_ATTR_VALUE): Fix definition.
764
        (CGEN_ATTR_ENTRY): Change "value" to type "unsigned".
765
        (CGEN_CPU_TABLE): Make isas a ponter.
766
 
767
        2003-09-29  Dave Brolley  
768
 
769
        * cgen.h (CGEN_ATTR_VALUE_BITSET_TYPE): New typedef.
770
        (CGEN_ATTR_VALUE_ENUM_TYPE): Ditto.
771
        (CGEN_ATTR_VALUE_TYPE): Use these new typedefs.
772
 
773
        2002-12-13  Dave Brolley  
774
 
775
        * cgen.h (symcat.h): #include it.
776
        (cgen-bitset.h): #include it.
777
        (CGEN_ATTR_VALUE_TYPE): Now a union.
778
        (CGEN_ATTR_VALUE): Reference macros generated in opcodes/-desc.h.
779
        (CGEN_ATTR_ENTRY): 'value' now unsigned.
780
        (cgen_cpu_desc): 'isas' now (CGEN_ISA_MASK*).
781
        * cgen-bitset.h: New file.
782
 
783
2005-09-30  Catherine Moore  
784
 
785
        * bfin.h: New file.
786
 
787
2005-10-24  Jan Beulich  
788
 
789
        * ia64.h (enum ia64_opnd): Move memory operand out of set of
790
        indirect operands.
791
 
792
2005-10-16  John David Anglin  
793
 
794
        * hppa.h (pa_opcodes): Add two fcmp opcodes.  Reorder ftest opcodes.
795
        Add FLAG_STRICT to pa10 ftest opcode.
796
 
797
2005-10-12  John David Anglin  
798
 
799
        * hppa.h (pa_opcodes): Remove lha entries.
800
 
801
2005-10-08  John David Anglin  
802
 
803
        * hppa.h (FLAG_STRICT): Revise comment.
804
        (pa_opcode): Revise ordering rules.  Add/move strict pa10 variants
805
        before corresponding pa11 opcodes.  Add strict pa10 register-immediate
806
        entries for "fdc".
807
 
808
2005-09-30  Catherine Moore  
809
 
810
        * bfin.h: New file.
811
 
812
2005-09-24  John David Anglin  
813
 
814
        * hppa.h (pa_opcodes): Add new "fdc" and "fic" opcode entries.
815
 
816
2005-09-06  Chao-ying Fu  
817
 
818
        * mips.h (OP_SH_MT_U, OP_MASK_MT_U, OP_SH_MT_H, OP_MASK_MT_H,
819
        OP_SH_MTACC_T, OP_MASK_MTACC_T, OP_SH_MTACC_D, OP_MASK_MTACC_D): New
820
        define.
821
        Document !, $, *, &, g, +t, +T operand formats for MT instructions.
822
        (INSN_ASE_MASK): Update to include INSN_MT.
823
        (INSN_MT): New define for MT ASE.
824
 
825
2005-08-25  Chao-ying Fu  
826
 
827
        * mips.h (OP_SH_DSPACC, OP_MASK_DSPACC, OP_SH_DSPACC_S,
828
        OP_MASK_DSPACC_S, OP_SH_DSPSFT, OP_MASK_DSPSFT, OP_SH_DSPSFT_7,
829
        OP_MASK_DSPSFT_7, OP_SH_SA3, OP_MASK_SA3, OP_SH_SA4, OP_MASK_SA4,
830
        OP_SH_IMM8, OP_MASK_IMM8, OP_SH_IMM10, OP_MASK_IMM10, OP_SH_WRDSP,
831
        OP_MASK_WRDSP, OP_SH_RDDSP, OP_MASK_RDDSP): New define.
832
        Document 3, 4, 5, 6, 7, 8, 9, 0, :, ', @ operand formats for DSP
833
        instructions.
834
        (INSN_DSP): New define for DSP ASE.
835
 
836
2005-08-18  Alan Modra  
837
 
838
        * a29k.h: Delete.
839
 
840
2005-08-15  Daniel Jacobowitz  
841
 
842
        * ppc.h (PPC_OPCODE_E300): Define.
843
 
844
2005-08-12 Martin Schwidefsky  
845
 
846
        * s390.h (s390_opcode_cpu_val): Add enum for cpu type z9-109.
847
 
848
2005-07-28  John David Anglin  
849
 
850
        PR gas/336
851
        * hppa.h (pa_opcodes): Allow 0 immediates in PA 2.0 variants of pdtlb
852
        and pitlb.
853
 
854
2005-07-27  Jan Beulich  
855
 
856
        * i386.h (i386_optab): Add comment to movd. Use LongMem for all
857
        movd-s. Add NoRex64 to movq-s dealing only with mmx or xmm registers.
858
        Add movq-s as 64-bit variants of movd-s.
859
 
860
2005-07-18  John David Anglin  
861
 
862
        * hppa.h: Fix punctuation in comment.
863
 
864
        * hppa.h (pa_opcode):  Add rules for opcode ordering.  Check first for
865
        implicit space-register addressing.  Set space-register bits on opcodes
866
        using implicit space-register addressing.  Add various missing pa20
867
        long-immediate opcodes.  Remove various opcodes using implicit 3-bit
868
        space-register addressing.  Use "fE" instead of "fe" in various
869
        fstw opcodes.
870
 
871
2005-07-18  Jan Beulich  
872
 
873
        * i386.h (i386_optab): Operands of aam and aad are unsigned.
874
 
875
2007-07-15  H.J. Lu 
876
 
877
        * i386.h (i386_optab): Support Intel VMX Instructions.
878
 
879
2005-07-10  John David Anglin  
880
 
881
        * hppa.h (pa_opcode): Don't set FLAG_STRICT in pa10 loads and stores.
882
 
883
2005-07-05  Jan Beulich  
884
 
885
        * i386.h (i386_optab): Add new insns.
886
 
887
2005-07-01  Nick Clifton  
888
 
889
        * sparc.h: Add typedefs to structure declarations.
890
 
891
2005-06-20  H.J. Lu  
892
 
893
        PR 1013
894
        * i386.h (i386_optab): Update comments for 64bit addressing on
895
        mov. Allow 64bit addressing for mov and movq.
896
 
897
2005-06-11  John David Anglin  
898
 
899
        * hppa.h (pa_opcodes): Use cM and cX instead of cm and cx,
900
        respectively, in various floating-point load and store patterns.
901
 
902
2005-05-23  John David Anglin  
903
 
904
        * hppa.h (FLAG_STRICT): Correct comment.
905
        (pa_opcodes): Update load and store entries to allow both PA 1.X and
906
        PA 2.0 mneumonics when equivalent.  Entries with cache control
907
        completers now require PA 1.1.  Adjust whitespace.
908
 
909
2005-05-19  Anton Blanchard  
910
 
911
        * ppc.h (PPC_OPCODE_POWER5): Define.
912
 
913
2005-05-10  Nick Clifton  
914
 
915
        * Update the address and phone number of the FSF organization in
916
        the GPL notices in the following files:
917
        a29k.h, alpha.h, arc.h, arm.h, avr.h, cgen.h, convex.h, cris.h,
918
        crx.h, d10v.h, d30v.h, dlx.h, h8300.h, hppa.h, i370.h, i386.h,
919
        i860.h, i960.h, m68hc11.h, m68k.h, m88k.h, maxq.h, mips.h, mmix.h,
920
        mn10200.h, mn10300.h, msp430.h, np1.h, ns32k.h, or32.h, pdp11.h,
921
        pj.h, pn.h, ppc.h, pyr.h, s390.h, sparc.h, tic30.h, tic4x.h,
922
        tic54x.h, tic80.h, v850.h, vax.h
923
 
924
2005-05-09  Jan Beulich  
925
 
926
        * i386.h (i386_optab): Add ht and hnt.
927
 
928
2005-04-18  Mark Kettenis  
929
 
930
        * i386.h: Insert hyphens into selected VIA PadLock extensions.
931
        Add xcrypt-ctr.  Provide aliases without hyphens.
932
 
933
2005-04-13  H.J. Lu  
934
 
935
        Moved from ../ChangeLog
936
 
937
        2005-04-12  Paul Brook  
938
        * m88k.h: Rename psr macros to avoid conflicts.
939
 
940
        2005-03-12  Zack Weinberg  
941
        * arm.h: Adjust comments for ARM_EXT_V4T and ARM_EXT_V5T.
942
        Add ARM_EXT_V6T2, ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2,
943
        and ARM_ARCH_V6ZKT2.
944
 
945
        2004-11-29  Tomer Levi  
946
        * crx.h (enum operand_type): Rename rbase_cst4 to rbase_dispu4.
947
        Remove redundant instruction types.
948
        (struct argument): X_op - new field.
949
        (struct cst4_entry): Remove.
950
        (no_op_insn): Declare.
951
 
952
        2004-11-05  Tomer Levi  
953
        * crx.h (enum argtype): Rename types, remove unused types.
954
 
955
        2004-10-27  Tomer Levi  
956
        * crx.h (enum reg): Rearrange registers, remove 'ccfg' and `'pc'.
957
        (enum reg_type): Remove CRX_PC_REGTYPE, CRX_MTPR_REGTYPE.
958
        (enum operand_type): Rearrange operands, edit comments.
959
        replace us with ui for unsigned immediate.
960
        replace d with disps/dispu/dispe for signed/unsigned/escaped
961
        displacements (respectively).
962
        replace rbase_ridx_scl2_dispu with rindex_disps for register index.
963
        (instruction type): Add NO_TYPE_INS.
964
        (instruction flags): Add USER_REG, CST4MAP, NO_SP, NO_RPTR.
965
        (operand_entry): New field - 'flags'.
966
        (operand flags): New.
967
 
968
        2004-10-21  Tomer Levi  
969
        * crx.h (operand_type): Remove redundant types i3, i4,
970
        i5, i8, i12.
971
        Add new unsigned immediate types us3, us4, us5, us16.
972
 
973
2005-04-12  Mark Kettenis  
974
 
975
        * i386.h (i386_optab): Mark VIA PadLock instructions as ImmExt and
976
        adjust them accordingly.
977
 
978
2005-04-01  Jan Beulich  
979
 
980
        * i386.h (i386_optab): Add rdtscp.
981
 
982
2005-03-29  H.J. Lu  
983
 
984
        * i386.h (i386_optab): Don't allow the `l' suffix for moving
985
        between memory and segment register. Allow movq for moving between
986
        general-purpose register and segment register.
987
 
988
2005-02-09  Jan Beulich  
989
 
990
        PR gas/707
991
        * i386.h (i386_optab): Add x_Suf to fbld and fbstp. Add w_Suf and
992
        FloatMF to fldcw, fstcw, fnstcw, and the memory formas of fstsw and
993
        fnstsw.
994
 
995
2006-02-07  Nathan Sidwell  
996
 
997
        * m68k.h (m68008, m68ec030, m68882): Remove.
998
        (m68k_mask): New.
999
        (cpu_m68k, cpu_cf): New.
1000
        (mcf5200, mcf5206e, mcf521x, mcf5249, mcf528x, mcf5307, mcf5407,
1001
        mcf5470, mcf5480): Rename to cpu_. Add m680x0 variants.
1002
 
1003
2005-01-25  Alexandre Oliva  
1004
 
1005
        2004-11-10  Alexandre Oliva  
1006
        * cgen.h (enum cgen_parse_operand_type): Add
1007
        CGEN_PARSE_OPERAND_SYMBOLIC.
1008
 
1009
2005-01-21  Fred Fish  
1010
 
1011
        * mips.h: Change INSN_ALIAS to INSN2_ALIAS.
1012
        Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1013
        Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1014
 
1015
2005-01-19  Fred Fish  
1016
 
1017
        * mips.h (struct mips_opcode): Add new pinfo2 member.
1018
        (INSN_ALIAS): New define for opcode table entries that are
1019
        specific instances of another entry, such as 'move' for an 'or'
1020
        with a zero operand.
1021
        (INSN_READ_MDMX_ACC): Redefine from 0 to 0x2.
1022
        (INSN_WRITE_MDMX_ACC): Redefine from 0 to 0x4.
1023
 
1024
2004-12-09  Ian Lance Taylor  
1025
 
1026
        * mips.h (CPU_RM9000): Define.
1027
        (OPCODE_IS_MEMBER): Handle CPU_RM9000.
1028
 
1029
2004-11-25 Jan Beulich  
1030
 
1031
        * i386.h: CpuNo64 mov can't reasonably have a 'q' suffix. Moves
1032
        to/from test registers are illegal in 64-bit mode. Add missing
1033
        NoRex64 to sidt. fxsave/fxrstor now allow for a 'q' suffix
1034
        (previously one had to explicitly encode a rex64 prefix). Re-enable
1035
        lahf/sahf in 64-bit mode as at least some Athlon64/Opteron steppings
1036
        support it there. Add cmpxchg16b as per Intel's 64-bit documentation.
1037
 
1038
2004-11-23 Jan Beulich  
1039
 
1040
        * i386.h (i386_optab): paddq and psubq, even in their MMX form, are
1041
        available only with SSE2. Change the MMX additions introduced by SSE
1042
        and 3DNow!A to CpuMMX2 (rather than CpuMMX). Indicate the 3DNow!A
1043
        instructions by their now designated identifier (since combining i686
1044
        and 3DNow! does not really imply 3DNow!A).
1045
 
1046
2004-11-19  Alan Modra  
1047
 
1048
        * msp430.h (struct rcodes_s, MSP430_RLC, msp430_rcodes,
1049
        struct hcodes_s, msp430_hcodes): Move to gas/config/tc-msp430.c.
1050
 
1051
2004-11-08  Inderpreet Singh   
1052
            Vineet Sharma      
1053
 
1054
        * maxq.h: New file: Disassembly information for the maxq port.
1055
 
1056
2004-11-05  H.J. Lu  
1057
 
1058
        * i386.h (i386_optab): Put back "movzb".
1059
 
1060
2004-11-04  Hans-Peter Nilsson  
1061
 
1062
        * cris.h (enum cris_insn_version_usage): Tweak formatting and
1063
        comments.  Remove member cris_ver_sim.  Add members
1064
        cris_ver_sim_v0_10, cris_ver_v0_10, cris_ver_v3_10,
1065
        cris_ver_v8_10, cris_ver_v10, cris_ver_v10p.
1066
        (struct cris_support_reg, struct cris_cond15): New types.
1067
        (cris_conds15): Declare.
1068
        (JUMP_PC_INCR_OPCODE_V32, BA_DWORD_OPCODE, NOP_OPCODE_COMMON)
1069
        (NOP_OPCODE_ZBITS_COMMON, LAPC_DWORD_OPCODE, LAPC_DWORD_Z_BITS)
1070
        (NOP_OPCODE_V32, NOP_Z_BITS_V32): New macros.
1071
        (NOP_Z_BITS): Define in terms of NOP_OPCODE.
1072
        (cris_imm_oprnd_size_type): New members SIZE_FIELD_SIGNED and
1073
        SIZE_FIELD_UNSIGNED.
1074
 
1075
2004-11-04 Jan Beulich  
1076
 
1077
        * i386.h (sldx_Suf): Remove.
1078
        (FP, l_FP, sl_FP, x_FP): Don't imply IgnoreSize.
1079
        (q_FP): Define, implying no REX64.
1080
        (x_FP, sl_FP): Imply FloatMF.
1081
        (i386_optab): Split reg and mem forms of moving from segment registers
1082
        so that the memory forms can ignore the 16-/32-bit operand size
1083
        distinction. Adjust a few others for Intel mode. Remove *FP uses from
1084
        all non-floating-point instructions. Unite 32- and 64-bit forms of
1085
        movsx, movzx, and movd. Adjust floating point operations for the above
1086
        changes to the *FP macros. Add DefaultSize to floating point control
1087
        insns operating on larger memory ranges. Remove left over comments
1088
        hinting at certain insns being Intel-syntax ones where the ones
1089
        actually meant are already gone.
1090
 
1091
2004-10-07  Tomer Levi  
1092
 
1093
        * crx.h: Add COPS_REG_INS - Coprocessor Special register
1094
        instruction type.
1095
 
1096
2004-09-30  Paul Brook  
1097
 
1098
        * arm.h (ARM_EXT_V6K, ARM_EXT_V6Z): Define.
1099
        (ARM_ARCH_V6K, ARM_ARCH_V6Z, ARM_ARCH_V6ZK): Define.
1100
 
1101
2004-09-11  Theodore A. Roth  
1102
 
1103
        * avr.h: Add support for
1104
        atmega48, atmega88, atmega168, attiny13, attiny2313, at90can128.
1105
 
1106
2004-09-09  Segher Boessenkool  
1107
 
1108
        * ppc.h (PPC_OPERAND_OPTIONAL): Fix comment.
1109
 
1110
2004-08-24  Dmitry Diky  
1111
 
1112
        * msp430.h (msp430_opc): Add new instructions.
1113
        (msp430_rcodes): Declare new instructions.
1114
        (msp430_hcodes): Likewise..
1115
 
1116
2004-08-13  Nick Clifton  
1117
 
1118
        PR/301
1119
        * h8300.h (O_JSR): Do not allow VECIND addressing for non-SX
1120
        processors.
1121
 
1122
2004-08-30  Michal Ludvig  
1123
 
1124
        * i386.h (i386_optab): Added montmul/xsha1/xsha256 insns.
1125
 
1126
2004-07-22  H.J. Lu  
1127
 
1128
        * i386.h (i386_optab): Allow cs/ds in 64bit for branch hints.
1129
 
1130
2004-07-21  Jan Beulich  
1131
 
1132
        * i386.h: Adjust instruction descriptions to better match the
1133
        specification.
1134
 
1135
2004-07-16  Richard Earnshaw  
1136
 
1137
        * arm.h: Remove all old content.  Replace with architecture defines
1138
        from gas/config/tc-arm.c.
1139
 
1140
2004-07-09  Andreas Schwab  
1141
 
1142
        * m68k.h: Fix comment.
1143
 
1144
2004-07-07  Tomer Levi  
1145
 
1146
        * crx.h: New file.
1147
 
1148
2004-06-24  Alan Modra  
1149
 
1150
        * i386.h (i386_optab): Remove fildd, fistpd and fisttpd.
1151
 
1152
2004-05-24  Peter Barada  
1153
 
1154
        * m68k.h: Add 'size' to m68k_opcode.
1155
 
1156
2004-05-05  Peter Barada  
1157
 
1158
        * m68k.h: Switch from ColdFire chip name to core variant.
1159
 
1160
2004-04-22  Peter Barada  
1161
 
1162
        * m68k.h: Add mcfmac/mcfemac definitions.  Update operand
1163
        descriptions for new EMAC cases.
1164
        Remove ColdFire macmw/macml/msacmw/msacmw hacks and properly
1165
        handle Motorola MAC syntax.
1166
        Allow disassembly of ColdFire V4e object files.
1167
 
1168
2004-03-16  Alan Modra  
1169
 
1170
        * ppc.h (PPC_OPERAND_GPR_0): Define.  Bump other operand defines.
1171
 
1172
2004-03-12  Jakub Jelinek  
1173
 
1174
        * i386.h (i386_optab): Remove CpuNo64 from sysenter and sysexit.
1175
 
1176
2004-03-12  Michal Ludvig  
1177
 
1178
        * i386.h (i386_optab): Added xstore as an alias for xstorerng.
1179
 
1180
2004-03-12  Michal Ludvig  
1181
 
1182
        * i386.h (i386_optab): Added xstore/xcrypt insns.
1183
 
1184
2004-02-09  Anil Paranjpe  
1185
 
1186
        * h8300.h (32bit ldc/stc): Add relaxing support.
1187
 
1188
2004-01-12  Anil Paranjpe  
1189
 
1190
        * h8300.h (BITOP): Pass MEMRELAX flag.
1191
 
1192
2004-01-09  Anil Paranjpe  
1193
 
1194
        * h8300.h (BITOP): Dissallow operations on @aa:16 and @aa:32
1195
        except for the H8S.
1196
 
1197
For older changes see ChangeLog-9103
1198
 
1199
Local Variables:
1200
mode: change-log
1201
left-margin: 8
1202
fill-column: 74
1203
version-control: never
1204
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