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1 17 khays
/* ARM assembler/disassembler support.
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   Copyright 2004, 2010, 2011 Free Software Foundation, Inc.
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   This file is part of GDB and GAS.
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   GDB and GAS are free software; you can redistribute it and/or
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   modify it under the terms of the GNU General Public License as
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   published by the Free Software Foundation; either version 3, or (at
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   your option) any later version.
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   GDB and GAS are distributed in the hope that it will be useful, but
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   WITHOUT ANY WARRANTY; without even the implied warranty of
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   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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   General Public License for more details.
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   You should have received a copy of the GNU General Public License
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   along with GDB or GAS; see the file COPYING3.  If not, write to the
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   Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
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   MA 02110-1301, USA.  */
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/* The following bitmasks control CPU extensions:  */
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#define ARM_EXT_V1       0x00000001     /* All processors (core set).  */
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#define ARM_EXT_V2       0x00000002     /* Multiply instructions.  */
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#define ARM_EXT_V2S      0x00000004     /* SWP instructions.       */
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#define ARM_EXT_V3       0x00000008     /* MSR MRS.                */
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#define ARM_EXT_V3M      0x00000010     /* Allow long multiplies.  */
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#define ARM_EXT_V4       0x00000020     /* Allow half word loads.  */
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#define ARM_EXT_V4T      0x00000040     /* Thumb.                  */
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#define ARM_EXT_V5       0x00000080     /* Allow CLZ, etc.         */
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#define ARM_EXT_V5T      0x00000100     /* Improved interworking.  */
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#define ARM_EXT_V5ExP    0x00000200     /* DSP core set.           */
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#define ARM_EXT_V5E      0x00000400     /* DSP Double transfers.   */
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#define ARM_EXT_V5J      0x00000800     /* Jazelle extension.      */
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#define ARM_EXT_V6       0x00001000     /* ARM V6.                 */
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#define ARM_EXT_V6K      0x00002000     /* ARM V6K.                */
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/*                       0x00004000        Was ARM V6Z.            */
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#define ARM_EXT_V6T2     0x00008000     /* Thumb-2.                */
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#define ARM_EXT_DIV      0x00010000     /* Integer division.       */
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/* The 'M' in Arm V7M stands for Microcontroller.
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   On earlier architecture variants it stands for Multiply.  */
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#define ARM_EXT_V5E_NOTM 0x00020000     /* Arm V5E but not Arm V7M. */
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#define ARM_EXT_V6_NOTM  0x00040000     /* Arm V6 but not Arm V7M. */
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#define ARM_EXT_V7       0x00080000     /* Arm V7.                 */
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#define ARM_EXT_V7A      0x00100000     /* Arm V7A.                */
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#define ARM_EXT_V7R      0x00200000     /* Arm V7R.                */
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#define ARM_EXT_V7M      0x00400000     /* Arm V7M.                */
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#define ARM_EXT_V6M      0x00800000     /* ARM V6M.                 */
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#define ARM_EXT_BARRIER  0x01000000     /* DSB/DMB/ISB.             */
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#define ARM_EXT_THUMB_MSR 0x02000000    /* Thumb MSR/MRS.           */
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#define ARM_EXT_V6_DSP 0x04000000       /* ARM v6 (DSP-related),
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                                           not in v7-M.  */
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#define ARM_EXT_MP       0x08000000     /* Multiprocessing Extensions.  */
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#define ARM_EXT_SEC      0x10000000     /* Security extensions.  */
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#define ARM_EXT_OS       0x20000000     /* OS Extensions.  */
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#define ARM_EXT_ADIV     0x40000000     /* Integer divide extensions in ARM 
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                                           state.  */
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#define ARM_EXT_VIRT     0x80000000     /* Virtualization extensions.  */
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59
/* Co-processor space extensions.  */
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#define ARM_CEXT_XSCALE   0x00000001    /* Allow MIA etc.          */
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#define ARM_CEXT_MAVERICK 0x00000002    /* Use Cirrus/DSP coprocessor.  */
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#define ARM_CEXT_IWMMXT   0x00000004    /* Intel Wireless MMX technology coprocessor.   */
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#define ARM_CEXT_IWMMXT2  0x00000008    /* Intel Wireless MMX technology coprocessor version 2.   */
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65
#define FPU_ENDIAN_PURE  0x80000000     /* Pure-endian doubles.       */
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#define FPU_ENDIAN_BIG   0              /* Double words-big-endian.   */
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#define FPU_FPA_EXT_V1   0x40000000     /* Base FPA instruction set.  */
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#define FPU_FPA_EXT_V2   0x20000000     /* LFM/SFM.                   */
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#define FPU_MAVERICK     0x10000000     /* Cirrus Maverick.           */
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#define FPU_VFP_EXT_V1xD 0x08000000     /* Base VFP instruction set.  */
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#define FPU_VFP_EXT_V1   0x04000000     /* Double-precision insns.    */
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#define FPU_VFP_EXT_V2   0x02000000     /* ARM10E VFPr1.              */
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#define FPU_VFP_EXT_V3xD 0x01000000     /* VFPv3 single-precision.    */
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#define FPU_VFP_EXT_V3   0x00800000     /* VFPv3 double-precision.    */
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#define FPU_NEON_EXT_V1  0x00400000     /* Neon (SIMD) insns.         */
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#define FPU_VFP_EXT_D32  0x00200000     /* Registers D16-D31.         */
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#define FPU_VFP_EXT_FP16 0x00100000     /* Half-precision extensions. */
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#define FPU_NEON_EXT_FMA 0x00080000     /* Neon fused multiply-add    */
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#define FPU_VFP_EXT_FMA  0x00040000     /* VFP fused multiply-add     */
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/* Architectures are the sum of the base and extensions.  The ARM ARM (rev E)
82
   defines the following: ARMv3, ARMv3M, ARMv4xM, ARMv4, ARMv4TxM, ARMv4T,
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   ARMv5xM, ARMv5, ARMv5TxM, ARMv5T, ARMv5TExP, ARMv5TE.  To these we add
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   three more to cover cores prior to ARM6.  Finally, there are cores which
85
   implement further extensions in the co-processor space.  */
86
#define ARM_AEXT_V1                       ARM_EXT_V1
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#define ARM_AEXT_V2     (ARM_AEXT_V1    | ARM_EXT_V2)
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#define ARM_AEXT_V2S    (ARM_AEXT_V2    | ARM_EXT_V2S)
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#define ARM_AEXT_V3     (ARM_AEXT_V2S   | ARM_EXT_V3)
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#define ARM_AEXT_V3M    (ARM_AEXT_V3    | ARM_EXT_V3M)
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#define ARM_AEXT_V4xM   (ARM_AEXT_V3    | ARM_EXT_V4)
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#define ARM_AEXT_V4     (ARM_AEXT_V3M   | ARM_EXT_V4)
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#define ARM_AEXT_V4TxM  (ARM_AEXT_V4xM  | ARM_EXT_V4T)
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#define ARM_AEXT_V4T    (ARM_AEXT_V4    | ARM_EXT_V4T)
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#define ARM_AEXT_V5xM   (ARM_AEXT_V4xM  | ARM_EXT_V5)
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#define ARM_AEXT_V5     (ARM_AEXT_V4    | ARM_EXT_V5)
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#define ARM_AEXT_V5TxM  (ARM_AEXT_V5xM  | ARM_EXT_V4T | ARM_EXT_V5T)
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#define ARM_AEXT_V5T    (ARM_AEXT_V5    | ARM_EXT_V4T | ARM_EXT_V5T)
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#define ARM_AEXT_V5TExP (ARM_AEXT_V5T   | ARM_EXT_V5ExP)
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#define ARM_AEXT_V5TE   (ARM_AEXT_V5TExP | ARM_EXT_V5E)
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#define ARM_AEXT_V5TEJ  (ARM_AEXT_V5TE  | ARM_EXT_V5J)
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#define ARM_AEXT_V6     (ARM_AEXT_V5TEJ | ARM_EXT_V6)
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#define ARM_AEXT_V6K    (ARM_AEXT_V6    | ARM_EXT_V6K)
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#define ARM_AEXT_V6Z    (ARM_AEXT_V6K   | ARM_EXT_SEC)
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#define ARM_AEXT_V6ZK   (ARM_AEXT_V6K   | ARM_EXT_SEC)
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#define ARM_AEXT_V6T2   (ARM_AEXT_V6 \
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    | ARM_EXT_V6T2 | ARM_EXT_V6_NOTM | ARM_EXT_THUMB_MSR \
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    | ARM_EXT_V6_DSP )
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#define ARM_AEXT_V6KT2  (ARM_AEXT_V6T2 | ARM_EXT_V6K)
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#define ARM_AEXT_V6ZT2  (ARM_AEXT_V6T2 | ARM_EXT_SEC)
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#define ARM_AEXT_V6ZKT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K | ARM_EXT_SEC)
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#define ARM_AEXT_V7_ARM (ARM_AEXT_V6KT2 | ARM_EXT_V7 | ARM_EXT_BARRIER)
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#define ARM_AEXT_V7A    (ARM_AEXT_V7_ARM | ARM_EXT_V7A)
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#define ARM_AEXT_V7R    (ARM_AEXT_V7_ARM | ARM_EXT_V7R | ARM_EXT_DIV)
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#define ARM_AEXT_NOTM \
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  (ARM_AEXT_V4 | ARM_EXT_V5ExP | ARM_EXT_V5J | ARM_EXT_V6_NOTM \
117
   | ARM_EXT_V6_DSP )
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#define ARM_AEXT_V6M_ONLY \
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  ((ARM_EXT_BARRIER | ARM_EXT_V6M | ARM_EXT_THUMB_MSR) & ~(ARM_AEXT_NOTM))
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#define ARM_AEXT_V6M \
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  ((ARM_AEXT_V6K | ARM_AEXT_V6M_ONLY) & ~(ARM_AEXT_NOTM))
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#define ARM_AEXT_V6SM (ARM_AEXT_V6M | ARM_EXT_OS)
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#define ARM_AEXT_V7M \
124
  ((ARM_AEXT_V7_ARM | ARM_EXT_V6M | ARM_EXT_V7M | ARM_EXT_DIV) \
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   & ~(ARM_AEXT_NOTM))
126
#define ARM_AEXT_V7 (ARM_AEXT_V7A & ARM_AEXT_V7R & ARM_AEXT_V7M)
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#define ARM_AEXT_V7EM \
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  (ARM_AEXT_V7M | ARM_EXT_V5ExP | ARM_EXT_V6_DSP)
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130
/* Processors with specific extensions in the co-processor space.  */
131
#define ARM_ARCH_XSCALE ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE)
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#define ARM_ARCH_IWMMXT \
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 ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT)
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#define ARM_ARCH_IWMMXT2        \
135
 ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT | ARM_CEXT_IWMMXT2)
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137
#define FPU_VFP_V1xD    (FPU_VFP_EXT_V1xD | FPU_ENDIAN_PURE)
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#define FPU_VFP_V1      (FPU_VFP_V1xD | FPU_VFP_EXT_V1)
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#define FPU_VFP_V2      (FPU_VFP_V1 | FPU_VFP_EXT_V2)
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#define FPU_VFP_V3D16   (FPU_VFP_V2 | FPU_VFP_EXT_V3xD | FPU_VFP_EXT_V3)
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#define FPU_VFP_V3      (FPU_VFP_V3D16 | FPU_VFP_EXT_D32)
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#define FPU_VFP_V3xD    (FPU_VFP_V1xD | FPU_VFP_EXT_V2 | FPU_VFP_EXT_V3xD)
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#define FPU_VFP_V4D16   (FPU_VFP_V3D16 | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)
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#define FPU_VFP_V4      (FPU_VFP_V3 | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)
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#define FPU_VFP_V4_SP_D16 (FPU_VFP_V3xD | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)
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#define FPU_VFP_HARD    (FPU_VFP_EXT_V1xD | FPU_VFP_EXT_V1 | FPU_VFP_EXT_V2 \
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                         | FPU_VFP_EXT_V3xD | FPU_VFP_EXT_FMA | FPU_NEON_EXT_FMA \
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                         | FPU_VFP_EXT_V3 | FPU_NEON_EXT_V1 | FPU_VFP_EXT_D32)
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#define FPU_FPA         (FPU_FPA_EXT_V1 | FPU_FPA_EXT_V2)
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151
/* Deprecated.  */
152
#define FPU_ARCH_VFP    ARM_FEATURE (0, FPU_ENDIAN_PURE)
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154
#define FPU_ARCH_FPE    ARM_FEATURE (0, FPU_FPA_EXT_V1)
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#define FPU_ARCH_FPA    ARM_FEATURE (0, FPU_FPA)
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157
#define FPU_ARCH_VFP_V1xD ARM_FEATURE (0, FPU_VFP_V1xD)
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#define FPU_ARCH_VFP_V1   ARM_FEATURE (0, FPU_VFP_V1)
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#define FPU_ARCH_VFP_V2   ARM_FEATURE (0, FPU_VFP_V2)
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#define FPU_ARCH_VFP_V3D16      ARM_FEATURE (0, FPU_VFP_V3D16)
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#define FPU_ARCH_VFP_V3D16_FP16 \
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  ARM_FEATURE (0, FPU_VFP_V3D16 | FPU_VFP_EXT_FP16)
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#define FPU_ARCH_VFP_V3   ARM_FEATURE (0, FPU_VFP_V3)
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#define FPU_ARCH_VFP_V3_FP16    ARM_FEATURE (0, FPU_VFP_V3 | FPU_VFP_EXT_FP16)
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#define FPU_ARCH_VFP_V3xD       ARM_FEATURE (0, FPU_VFP_V3xD)
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#define FPU_ARCH_VFP_V3xD_FP16  ARM_FEATURE (0, FPU_VFP_V3xD | FPU_VFP_EXT_FP16)
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#define FPU_ARCH_NEON_V1  ARM_FEATURE (0, FPU_NEON_EXT_V1)
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#define FPU_ARCH_VFP_V3_PLUS_NEON_V1 \
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  ARM_FEATURE (0, FPU_VFP_V3 | FPU_NEON_EXT_V1)
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#define FPU_ARCH_NEON_FP16 \
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  ARM_FEATURE (0, FPU_VFP_V3 | FPU_NEON_EXT_V1 | FPU_VFP_EXT_FP16)
172
#define FPU_ARCH_VFP_HARD ARM_FEATURE (0, FPU_VFP_HARD)
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#define FPU_ARCH_VFP_V4 ARM_FEATURE(0, FPU_VFP_V4)
174
#define FPU_ARCH_VFP_V4D16 ARM_FEATURE(0, FPU_VFP_V4D16)
175
#define FPU_ARCH_VFP_V4_SP_D16 ARM_FEATURE(0, FPU_VFP_V4_SP_D16)
176
#define FPU_ARCH_NEON_VFP_V4 \
177
  ARM_FEATURE(0, FPU_VFP_V4 | FPU_NEON_EXT_V1 | FPU_NEON_EXT_FMA)
178
 
179
#define FPU_ARCH_ENDIAN_PURE ARM_FEATURE (0, FPU_ENDIAN_PURE)
180
 
181
#define FPU_ARCH_MAVERICK ARM_FEATURE (0, FPU_MAVERICK)
182
 
183
#define ARM_ARCH_V1     ARM_FEATURE (ARM_AEXT_V1, 0)
184
#define ARM_ARCH_V2     ARM_FEATURE (ARM_AEXT_V2, 0)
185
#define ARM_ARCH_V2S    ARM_FEATURE (ARM_AEXT_V2S, 0)
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#define ARM_ARCH_V3     ARM_FEATURE (ARM_AEXT_V3, 0)
187
#define ARM_ARCH_V3M    ARM_FEATURE (ARM_AEXT_V3M, 0)
188
#define ARM_ARCH_V4xM   ARM_FEATURE (ARM_AEXT_V4xM, 0)
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#define ARM_ARCH_V4     ARM_FEATURE (ARM_AEXT_V4, 0)
190
#define ARM_ARCH_V4TxM  ARM_FEATURE (ARM_AEXT_V4TxM, 0)
191
#define ARM_ARCH_V4T    ARM_FEATURE (ARM_AEXT_V4T, 0)
192
#define ARM_ARCH_V5xM   ARM_FEATURE (ARM_AEXT_V5xM, 0)
193
#define ARM_ARCH_V5     ARM_FEATURE (ARM_AEXT_V5, 0)
194
#define ARM_ARCH_V5TxM  ARM_FEATURE (ARM_AEXT_V5TxM, 0)
195
#define ARM_ARCH_V5T    ARM_FEATURE (ARM_AEXT_V5T, 0)
196
#define ARM_ARCH_V5TExP ARM_FEATURE (ARM_AEXT_V5TExP, 0)
197
#define ARM_ARCH_V5TE   ARM_FEATURE (ARM_AEXT_V5TE, 0)
198
#define ARM_ARCH_V5TEJ  ARM_FEATURE (ARM_AEXT_V5TEJ, 0)
199
#define ARM_ARCH_V6     ARM_FEATURE (ARM_AEXT_V6, 0)
200
#define ARM_ARCH_V6K    ARM_FEATURE (ARM_AEXT_V6K, 0)
201
#define ARM_ARCH_V6Z    ARM_FEATURE (ARM_AEXT_V6Z, 0)
202
#define ARM_ARCH_V6ZK   ARM_FEATURE (ARM_AEXT_V6ZK, 0)
203
#define ARM_ARCH_V6T2   ARM_FEATURE (ARM_AEXT_V6T2, 0)
204
#define ARM_ARCH_V6KT2  ARM_FEATURE (ARM_AEXT_V6KT2, 0)
205
#define ARM_ARCH_V6ZT2  ARM_FEATURE (ARM_AEXT_V6ZT2, 0)
206
#define ARM_ARCH_V6ZKT2 ARM_FEATURE (ARM_AEXT_V6ZKT2, 0)
207
#define ARM_ARCH_V6M    ARM_FEATURE (ARM_AEXT_V6M, 0)
208
#define ARM_ARCH_V6SM   ARM_FEATURE (ARM_AEXT_V6SM, 0)
209
#define ARM_ARCH_V7     ARM_FEATURE (ARM_AEXT_V7, 0)
210
#define ARM_ARCH_V7A    ARM_FEATURE (ARM_AEXT_V7A, 0)
211
#define ARM_ARCH_V7R    ARM_FEATURE (ARM_AEXT_V7R, 0)
212
#define ARM_ARCH_V7M    ARM_FEATURE (ARM_AEXT_V7M, 0)
213
#define ARM_ARCH_V7EM   ARM_FEATURE (ARM_AEXT_V7EM, 0)
214
 
215
/* Some useful combinations:  */
216
#define ARM_ARCH_NONE   ARM_FEATURE (0, 0)
217
#define FPU_NONE        ARM_FEATURE (0, 0)
218
#define ARM_ANY         ARM_FEATURE (-1, 0)     /* Any basic core.  */
219
#define FPU_ANY_HARD    ARM_FEATURE (0, FPU_FPA | FPU_VFP_HARD | FPU_MAVERICK)
220
#define ARM_ARCH_THUMB2 ARM_FEATURE (ARM_EXT_V6T2 | ARM_EXT_V7 | ARM_EXT_V7A | ARM_EXT_V7R | ARM_EXT_V7M | ARM_EXT_DIV, 0)
221
/* v7-a+sec.  */
222
#define ARM_ARCH_V7A_SEC ARM_FEATURE (ARM_AEXT_V7A | ARM_EXT_SEC, 0)
223
/* v7-a+mp+sec.  */
224
#define ARM_ARCH_V7A_MP_SEC \
225
                        ARM_FEATURE (ARM_AEXT_V7A | ARM_EXT_MP | ARM_EXT_SEC, \
226
                                     0)
227
/* v7-a+idiv+mp+sec+virt.  */
228
#define ARM_ARCH_V7A_IDIV_MP_SEC_VIRT \
229
                        ARM_FEATURE (ARM_AEXT_V7A | ARM_EXT_MP | ARM_EXT_SEC \
230
                                     | ARM_EXT_DIV | ARM_EXT_ADIV \
231
                                     | ARM_EXT_VIRT, 0)
232
/* v7-r+idiv.  */
233
#define ARM_ARCH_V7R_IDIV       ARM_FEATURE (ARM_AEXT_V7R | ARM_EXT_ADIV, 0)
234
/* Features that are present in v6M and v6S-M but not other v6 cores.  */
235
#define ARM_ARCH_V6M_ONLY ARM_FEATURE (ARM_AEXT_V6M_ONLY, 0)
236
 
237
/* There are too many feature bits to fit in a single word, so use a
238
   structure.  For simplicity we put all core features in one word and
239
   everything else in the other.  */
240
typedef struct
241
{
242
  unsigned long core;
243
  unsigned long coproc;
244
} arm_feature_set;
245
 
246
#define ARM_CPU_HAS_FEATURE(CPU,FEAT) \
247
  (((CPU).core & (FEAT).core) != 0 || ((CPU).coproc & (FEAT).coproc) != 0)
248
 
249
#define ARM_MERGE_FEATURE_SETS(TARG,F1,F2)      \
250
  do {                                          \
251
    (TARG).core = (F1).core | (F2).core;        \
252
    (TARG).coproc = (F1).coproc | (F2).coproc;  \
253
  } while (0)
254
 
255
#define ARM_CLEAR_FEATURE(TARG,F1,F2)           \
256
  do {                                          \
257
    (TARG).core = (F1).core &~ (F2).core;       \
258
    (TARG).coproc = (F1).coproc &~ (F2).coproc; \
259
  } while (0)
260
 
261
#define ARM_FEATURE(core, coproc) {(core), (coproc)}

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