OpenCores
URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [gnu/] [binutils/] [include/] [opcode/] [pn.h] - Blame information for rev 279

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 17 khays
/* Print GOULD PN (PowerNode) instructions for GDB, the GNU debugger.
2
   Copyright 1986, 1987, 1989, 1991, 2010 Free Software Foundation, Inc.
3
 
4
   This file is part of GDB.
5
 
6
   GDB is free software; you can redistribute it and/or modify
7
   it under the terms of the GNU General Public License as published by
8
   the Free Software Foundation; either version 3, or (at your option)
9
   any later version.
10
 
11
   GDB is distributed in the hope that it will be useful,
12
   but WITHOUT ANY WARRANTY; without even the implied warranty of
13
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
   GNU General Public License for more details.
15
 
16
   You should have received a copy of the GNU General Public License
17
   along with GDB; see the file COPYING3.  If not, write to
18
   the Free Software Foundation, 51 Franklin Street - Fifth Floor,
19
   Boston, MA 02110-1301, USA.  */
20
 
21
struct gld_opcode
22
{
23
  char *name;
24
  unsigned long opcode;
25
  unsigned long mask;
26
  char *args;
27
  int length;
28
};
29
 
30
/* We store four bytes of opcode for all opcodes because that
31
   is the most any of them need.  The actual length of an instruction
32
   is always at least 2 bytes, and at most four.  The length of the
33
   instruction is based on the opcode.
34
 
35
   The mask component is a mask saying which bits must match
36
   particular opcode in order for an instruction to be an instance
37
   of that opcode.
38
 
39
   The args component is a string containing characters
40
   that are used to format the arguments to the instruction. */
41
 
42
/* Kinds of operands:
43
   r  Register in first field
44
   R  Register in second field
45
   b  Base register in first field
46
   B  Base register in second field
47
   v  Vector register in first field
48
   V  Vector register in first field
49
   A  Optional address register (base register)
50
   X  Optional index register
51
   I  Immediate data (16bits signed)
52
   O  Offset field (16bits signed)
53
   h  Offset field (15bits signed)
54
   d  Offset field (14bits signed)
55
   S  Shift count field
56
 
57
   any other characters are printed as is...
58
*/
59
 
60
/* The assembler requires that this array be sorted as follows:
61
   all instances of the same mnemonic must be consecutive.
62
   All instances of the same mnemonic with the same number of operands
63
   must be consecutive.
64
 */
65
struct gld_opcode gld_opcodes[] =
66
{
67
{ "abm",        0xa0080000,     0xfc080000,     "f,xOA,X",      4 },
68
{ "abr",        0x18080000,     0xfc0c0000,     "r,f",          2 },
69
{ "aci",        0xfc770000,     0xfc7f8000,     "r,I",          4 },
70
{ "adfd",       0xe0080002,     0xfc080002,     "r,xOA,X",      4 },
71
{ "adfw",       0xe0080000,     0xfc080000,     "r,xOA,X",      4 },
72
{ "adi",        0xc8010000,     0xfc7f0000,     "r,I",          4 },
73
{ "admb",       0xb8080000,     0xfc080000,     "r,xOA,X",      4 },
74
{ "admd",       0xb8000002,     0xfc080002,     "r,xOA,X",      4 },
75
{ "admh",       0xb8000001,     0xfc080001,     "r,xOA,X",      4 },
76
{ "admw",       0xb8000000,     0xfc080000,     "r,xOA,X",      4 },
77
{ "adr",        0x38000000,     0xfc0f0000,     "r,R",          2 },
78
{ "adrfd",      0x38090000,     0xfc0f0000,     "r,R",          2 },
79
{ "adrfw",      0x38010000,     0xfc0f0000,     "r,R",          2 },
80
{ "adrm",       0x38080000,     0xfc0f0000,     "r,R",          2 },
81
{ "ai",         0xfc030000,     0xfc07ffff,     "I",            4 },
82
{ "anmb",       0x84080000,     0xfc080000,     "r,xOA,X",      4 },
83
{ "anmd",       0x84000002,     0xfc080002,     "r,xOA,X",      4 },
84
{ "anmh",       0x84000001,     0xfc080001,     "r,xOA,X",      4 },
85
{ "anmw",       0x84000000,     0xfc080000,     "r,xOA,X",      4 },
86
{ "anr",        0x04000000,     0xfc0f0000,     "r,R",          2 },
87
{ "armb",       0xe8080000,     0xfc080000,     "r,xOA,X",      4 },
88
{ "armd",       0xe8000002,     0xfc080002,     "r,xOA,X",      4 },
89
{ "armh",       0xe8000001,     0xfc080001,     "r,xOA,X",      4 },
90
{ "armw",       0xe8000000,     0xfc080000,     "r,xOA,X",      4 },
91
{ "bcf",        0xf0000000,     0xfc080000,     "I,xOA,X",      4 },
92
{ "bct",        0xec000000,     0xfc080000,     "I,xOA,X",      4 },
93
{ "bei",        0x00060000,     0xffff0000,     "",             2 },
94
{ "bft",        0xf0000000,     0xff880000,     "xOA,X",        4 },
95
{ "bib",        0xf4000000,     0xfc780000,     "r,xOA",        4 },
96
{ "bid",        0xf4600000,     0xfc780000,     "r,xOA",        4 },
97
{ "bih",        0xf4200000,     0xfc780000,     "r,xOA",        4 },
98
{ "biw",        0xf4400000,     0xfc780000,     "r,xOA",        4 },
99
{ "bl",         0xf8800000,     0xff880000,     "xOA,X",        4 },
100
{ "bsub",       0x5c080000,     0xff8f0000,     "",             2 },
101
{ "bsubm",      0x28080000,     0xfc080000,     "",             4 },
102
{ "bu",         0xec000000,     0xff880000,     "xOA,X",        4 },
103
{ "call",       0x28080000,     0xfc0f0000,     "",             2 },
104
{ "callm",      0x5c080000,     0xff880000,     "",             4 },
105
{ "camb",       0x90080000,     0xfc080000,     "r,xOA,X",      4 },
106
{ "camd",       0x90000002,     0xfc080002,     "r,xOA,X",      4 },
107
{ "camh",       0x90000001,     0xfc080001,     "r,xOA,X",      4 },
108
{ "camw",       0x90000000,     0xfc080000,     "r.xOA,X",      4 },
109
{ "car",        0x10000000,     0xfc0f0000,     "r,R",          2 },
110
{ "cd",         0xfc060000,     0xfc070000,     "r,f",          4 },
111
{ "cea",        0x000f0000,     0xffff0000,     "",             2 },
112
{ "ci",         0xc8050000,     0xfc7f0000,     "r,I",          4 },
113
{ "cmc",        0x040a0000,     0xfc7f0000,     "r",            2 },
114
{ "cmmb",       0x94080000,     0xfc080000,     "r,xOA,X",      4 },
115
{ "cmmd",       0x94000002,     0xfc080002,     "r,xOA,X",      4 },
116
{ "cmmh",       0x94000001,     0xfc080001,     "r,xOA,X",      4 },
117
{ "cmmw",       0x94000000,     0xfc080000,     "r,xOA,X",      4 },
118
{ "cmr",        0x14000000,     0xfc0f0000,     "r,R",          2 },
119
{ "daci",       0xfc7f0000,     0xfc7f8000,     "r,I",          4 },
120
{ "dae",        0x000e0000,     0xffff0000,     "",             2 },
121
{ "dai",        0xfc040000,     0xfc07ffff,     "I",            4 },
122
{ "dci",        0xfc6f0000,     0xfc7f8000,     "r,I",          4 },
123
{ "di",         0xfc010000,     0xfc07ffff,     "I",            4 },
124
{ "dvfd",       0xe4000002,     0xfc080002,     "r,xOA,X",      4 },
125
{ "dvfw",       0xe4000000,     0xfc080000,     "r,xOA,X",      4 },
126
{ "dvi",        0xc8040000,     0xfc7f0000,     "r,I",          4 },
127
{ "dvmb",       0xc4080000,     0xfc080000,     "r,xOA,X",      4 },
128
{ "dvmh",       0xc4000001,     0xfc080001,     "r,xOA,X",      4 },
129
{ "dvmw",       0xc4000000,     0xfc080000,     "r,xOA,X",      4 },
130
{ "dvr",        0x380a0000,     0xfc0f0000,     "r,R",          2 },
131
{ "dvrfd",      0x380c0000,     0xfc0f0000,     "r,R",          4 },
132
{ "dvrfw",      0x38040000,     0xfc0f0000,     "r,xOA,X",      4 },
133
{ "eae",        0x00080000,     0xffff0000,     "",             2 },
134
{ "eci",        0xfc670000,     0xfc7f8080,     "r,I",          4 },
135
{ "ecwcs",      0xfc4f0000,     0xfc7f8000,     "",             4 },
136
{ "ei",         0xfc000000,     0xfc07ffff,     "I",            4 },
137
{ "eomb",       0x8c080000,     0xfc080000,     "r,xOA,X",      4 },
138
{ "eomd",       0x8c000002,     0xfc080002,     "r,xOA,X",      4 },
139
{ "eomh",       0x8c000001,     0xfc080001,     "r,xOA,X",      4 },
140
{ "eomw",       0x8c000000,     0xfc080000,     "r,xOA,X",      4 },
141
{ "eor",        0x0c000000,     0xfc0f0000,     "r,R",          2 },
142
{ "eorm",       0x0c080000,     0xfc0f0000,     "r,R",          2 },
143
{ "es",         0x00040000,     0xfc7f0000,     "r",            2 },
144
{ "exm",        0xa8000000,     0xff880000,     "xOA,X",        4 },
145
{ "exr",        0xc8070000,     0xfc7f0000,     "r",            2 },
146
{ "exrr",       0xc8070002,     0xfc7f0002,     "r",            2 },
147
{ "fixd",       0x380d0000,     0xfc0f0000,     "r,R",          2 },
148
{ "fixw",       0x38050000,     0xfc0f0000,     "r,R",          2 },
149
{ "fltd",       0x380f0000,     0xfc0f0000,     "r,R",          2 },
150
{ "fltw",       0x38070000,     0xfc0f0000,     "r,R",          2 },
151
{ "grio",       0xfc3f0000,     0xfc7f8000,     "r,I",          4 },
152
{ "halt",       0x00000000,     0xffff0000,     "",             2 },
153
{ "hio",        0xfc370000,     0xfc7f8000,     "r,I",          4 },
154
{ "jwcs",       0xfa080000,     0xff880000,     "xOA,X",        4 },
155
{ "la",         0x50000000,     0xfc000000,     "r,xOA,X",      4 },
156
{ "labr",       0x58080000,     0xfc080000,     "b,xOA,X",      4 },
157
{ "lb",         0xac080000,     0xfc080000,     "r,xOA,X",      4 },
158
{ "lcs",        0x00030000,     0xfc7f0000,     "r",            2 },
159
{ "ld",         0xac000002,     0xfc080002,     "r,xOA,X",      4 },
160
{ "lear",       0x80000000,     0xfc080000,     "r,xOA,X",      4 },
161
{ "lf",         0xcc000000,     0xfc080000,     "r,xOA,X",      4 },
162
{ "lfbr",       0xcc080000,     0xfc080000,     "b,xOA,X",      4 },
163
{ "lh",         0xac000001,     0xfc080001,     "r,xOA,X",      4 },
164
{ "li",         0xc8000000,     0xfc7f0000,     "r,I",          4 },
165
{ "lmap",       0x2c070000,     0xfc7f0000,     "r",            2 },
166
{ "lmb",        0xb0080000,     0xfc080000,     "r,xOA,X",      4 },
167
{ "lmd",        0xb0000002,     0xfc080002,     "r,xOA,X",      4 },
168
{ "lmh",        0xb0000001,     0xfc080001,     "r,xOA,X",      4 },
169
{ "lmw",        0xb0000000,     0xfc080000,     "r,xOA,X",      4 },
170
{ "lnb",        0xb4080000,     0xfc080000,     "r,xOA,X",      4 },
171
{ "lnd",        0xb4000002,     0xfc080002,     "r,xOA,X",      4 },
172
{ "lnh",        0xb4000001,     0xfc080001,     "r,xOA,X",      4 },
173
{ "lnw",        0xb4000000,     0xfc080000,     "r,xOA,X",      4 },
174
{ "lpsd",       0xf9800000,     0xff880000,     "r,xOA,X",      4 },
175
{ "lpsdcm",     0xfa800000,     0xff880000,     "r,xOA,X",      4 },
176
{ "lw",         0xac000000,     0xfc080000,     "r,xOA,X",      4 },
177
{ "lwbr",       0x5c000000,     0xfc080000,     "b,xOA,X",      4 },
178
{ "mpfd",       0xe4080002,     0xfc080002,     "r,xOA,X",      4 },
179
{ "mpfw",       0xe4080000,     0xfc080000,     "r,xOA,X",      4 },
180
{ "mpi",        0xc8030000,     0xfc7f0000,     "r,I",          4 },
181
{ "mpmb",       0xc0080000,     0xfc080000,     "r,xOA,X",      4 },
182
{ "mpmh",       0xc0000001,     0xfc080001,     "r,xOA,X",      4 },
183
{ "mpmw",       0xc0000000,     0xfc080000,     "r,xOA,X",      4 },
184
{ "mpr",        0x38020000,     0xfc0f0000,     "r,R",          2 },
185
{ "mprfd",      0x380e0000,     0xfc0f0000,     "r,R",          2 },
186
{ "mprfw",      0x38060000,     0xfc0f0000,     "r,R",          2 },
187
{ "nop",        0x00020000,     0xffff0000,     "",             2 },
188
{ "ormb",       0x88080000,     0xfc080000,     "r,xOA,X",      4 },
189
{ "ormd",       0x88000002,     0xfc080002,     "r,xOA,X",      4 },
190
{ "ormh",       0x88000001,     0xfc080001,     "r,xOA,X",      4 },
191
{ "ormw",       0x88000000,     0xfc080000,     "r,xOA,X",      4 },
192
{ "orr",        0x08000000,     0xfc0f0000,     "r,R",          2 },
193
{ "orrm",       0x08080000,     0xfc0f0000,     "r,R",          2 },
194
{ "rdsts",      0x00090000,     0xfc7f0000,     "r",            2 },
195
{ "return",     0x280e0000,     0xfc7f0000,     "",             2 },
196
{ "ri",         0xfc020000,     0xfc07ffff,     "I",            4 },
197
{ "rnd",        0x00050000,     0xfc7f0000,     "r",            2 },
198
{ "rpswt",      0x040b0000,     0xfc7f0000,     "r",            2 },
199
{ "rschnl",     0xfc2f0000,     0xfc7f8000,     "r,I",          4 },
200
{ "rsctl",      0xfc470000,     0xfc7f8000,     "r,I",          4 },
201
{ "rwcs",       0x000b0000,     0xfc0f0000,     "r,R",          2 },
202
{ "sacz",       0x10080000,     0xfc0f0000,     "r,R",          2 },
203
{ "sbm",        0x98080000,     0xfc080000,     "f,xOA,X",      4 },
204
{ "sbr",        0x18000000,     0xfc0c0000,     "r,f",          4 },
205
{ "sea",        0x000d0000,     0xffff0000,     "",             2 },
206
{ "setcpu",     0x2c090000,     0xfc7f0000,     "r",            2 },
207
{ "sio",        0xfc170000,     0xfc7f8000,     "r,I",          4 },
208
{ "sipu",       0x000a0000,     0xffff0000,     "",             2 },
209
{ "sla",        0x1c400000,     0xfc600000,     "r,S",          2 },
210
{ "slad",       0x20400000,     0xfc600000,     "r,S",          2 },
211
{ "slc",        0x24400000,     0xfc600000,     "r,S",          2 },
212
{ "sll",        0x1c600000,     0xfc600000,     "r,S",          2 },
213
{ "slld",       0x20600000,     0xfc600000,     "r,S",          2 },
214
{ "smc",        0x04070000,     0xfc070000,     "",             2 },
215
{ "sra",        0x1c000000,     0xfc600000,     "r,S",          2 },
216
{ "srad",       0x20000000,     0xfc600000,     "r,S",          2 },
217
{ "src",        0x24000000,     0xfc600000,     "r,S",          2 },
218
{ "srl",        0x1c200000,     0xfc600000,     "r,S",          2 },
219
{ "srld",       0x20200000,     0xfc600000,     "r,S",          2 },
220
{ "stb",        0xd4080000,     0xfc080000,     "r,xOA,X",      4 },
221
{ "std",        0xd4000002,     0xfc080002,     "r,xOA,X",      4 },
222
{ "stf",        0xdc000000,     0xfc080000,     "r,xOA,X",      4 },
223
{ "stfbr",      0x54000000,     0xfc080000,     "b,xOA,X",      4 },
224
{ "sth",        0xd4000001,     0xfc080001,     "r,xOA,X",      4 },
225
{ "stmb",       0xd8080000,     0xfc080000,     "r,xOA,X",      4 },
226
{ "stmd",       0xd8000002,     0xfc080002,     "r,xOA,X",      4 },
227
{ "stmh",       0xd8000001,     0xfc080001,     "r,xOA,X",      4 },
228
{ "stmw",       0xd8000000,     0xfc080000,     "r,xOA,X",      4 },
229
{ "stpio",      0xfc270000,     0xfc7f8000,     "r,I",          4 },
230
{ "stw",        0xd4000000,     0xfc080000,     "r,xOA,X",      4 },
231
{ "stwbr",      0x54000000,     0xfc080000,     "b,xOA,X",      4 },
232
{ "suabr",      0x58000000,     0xfc080000,     "b,xOA,X",      4 },
233
{ "sufd",       0xe0000002,     0xfc080002,     "r,xOA,X",      4 },
234
{ "sufw",       0xe0000000,     0xfc080000,     "r,xOA,X",      4 },
235
{ "sui",        0xc8020000,     0xfc7f0000,     "r,I",          4 },
236
{ "sumb",       0xbc080000,     0xfc080000,     "r,xOA,X",      4 },
237
{ "sumd",       0xbc000002,     0xfc080002,     "r,xOA,X",      4 },
238
{ "sumh",       0xbc000001,     0xfc080001,     "r,xOA,X",      4 },
239
{ "sumw",       0xbc000000,     0xfc080000,     "r,xOA,X",      4 },
240
{ "sur",        0x3c000000,     0xfc0f0000,     "r,R",          2 },
241
{ "surfd",      0x380b0000,     0xfc0f0000,     "r,xOA,X",      4 },
242
{ "surfw",      0x38030000,     0xfc0f0000,     "r,R",          2 },
243
{ "surm",       0x3c080000,     0xfc0f0000,     "r,R",          2 },
244
{ "svc",        0xc8060000,     0xffff0000,     "",             4 },
245
{ "tbm",        0xa4080000,     0xfc080000,     "f,xOA,X",      4 },
246
{ "tbr",        0x180c0000,     0xfc0c0000,     "r,f",          2 },
247
{ "tbrr",       0x2c020000,     0xfc0f0000,     "r,B",          2 },
248
{ "tccr",       0x28040000,     0xfc7f0000,     "",             2 },
249
{ "td",         0xfc050000,     0xfc070000,     "r,f",          4 },
250
{ "tio",        0xfc1f0000,     0xfc7f8000,     "r,I",          4 },
251
{ "tmapr",      0x2c0a0000,     0xfc0f0000,     "r,R",          2 },
252
{ "tpcbr",      0x280c0000,     0xfc7f0000,     "r",            2 },
253
{ "trbr",       0x2c010000,     0xfc0f0000,     "b,R",          2 },
254
{ "trc",        0x2c030000,     0xfc0f0000,     "r,R",          2 },
255
{ "trcc",       0x28050000,     0xfc7f0000,     "",             2 },
256
{ "trcm",       0x2c0b0000,     0xfc0f0000,     "r,R",          2 },
257
{ "trn",        0x2c040000,     0xfc0f0000,     "r,R",          2 },
258
{ "trnm",       0x2c0c0000,     0xfc0f0000,     "r,R",          2 },
259
{ "trr",        0x2c000000,     0xfc0f0000,     "r,R",          2 },
260
{ "trrm",       0x2c080000,     0xfc0f0000,     "r,R",          2 },
261
{ "trsc",       0x2c0e0000,     0xfc0f0000,     "r,R",          2 },
262
{ "trsw",       0x28000000,     0xfc7f0000,     "r",            2 },
263
{ "tscr",       0x2c0f0000,     0xfc0f0000,     "r,R",          2 },
264
{ "uei",        0x00070000,     0xffff0000,     "",             2 },
265
{ "wait",       0x00010000,     0xffff0000,     "",             2 },
266
{ "wcwcs",      0xfc5f0000,     0xfc7f8000,     "",             4 },
267
{ "wwcs",       0x000c0000,     0xfc0f0000,     "r,R",          2 },
268
{ "xcbr",       0x28020000,     0xfc0f0000,     "b,B",          2 },
269
{ "xcr",        0x2c050000,     0xfc0f0000,     "r,R",          2 },
270
{ "xcrm",       0x2c0d0000,     0xfc0f0000,     "r,R",          2 },
271
{ "zbm",        0x9c080000,     0xfc080000,     "f,xOA,X",      4 },
272
{ "zbr",        0x18040000,     0xfc0c0000,     "r,f",          2 },
273
{ "zmb",        0xf8080000,     0xfc080000,     "r,xOA,X",      4 },
274
{ "zmd",        0xf8000002,     0xfc080002,     "r,xOA,X",      4 },
275
{ "zmh",        0xf8000001,     0xfc080001,     "r,xOA,X",      4 },
276
{ "zmw",        0xf8000000,     0xfc080000,     "r,xOA,X",      4 },
277
{ "zr",         0x0c000000,     0xfc0f0000,     "r",            2 },
278
};
279
 
280
int numopcodes = sizeof(gld_opcodes) / sizeof(gld_opcodes[0]);
281
 
282
struct gld_opcode *endop = gld_opcodes + sizeof(gld_opcodes) /
283
                sizeof(gld_opcodes[0]);

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.