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[/] [open8_urisc/] [trunk/] [gnu/] [binutils/] [ld/] [testsuite/] [ld-arm/] [mixed-app-v5.d] - Blame information for rev 98

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Line No. Rev Author Line
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tmpdir/mixed-app-v5:     file format elf32-(little|big)arm
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architecture: arm, flags 0x00000112:
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EXEC_P, HAS_SYMS, D_PAGED
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start address 0x.*
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Disassembly of section .plt:
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.* <.plt>:
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 .*:    e52de004        push    {lr}            ; \(str lr, \[sp, #-4\]!\)
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 .*:    e59fe004        ldr     lr, \[pc, #4\]  ; .* <_start-0x28>
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 .*:    e08fe00e        add     lr, pc, lr
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 .*:    e5bef008        ldr     pc, \[lr, #8\]!
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 .*:    .*
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 .*:    e28fc6.*        add     ip, pc, #.*
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 .*:    e28cca.*        add     ip, ip, #.*     ; 0x.*
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 .*:    e5bcf.*         ldr     pc, \[ip, #.*\]!.*
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 .*:    e28fc6.*        add     ip, pc, #.*
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 .*:    e28cca.*        add     ip, ip, #.*     ; 0x.*
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 .*:    e5bcf.*         ldr     pc, \[ip, #.*\]!.*
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Disassembly of section .text:
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.* <_start>:
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 .*:    e1a0c00d        mov     ip, sp
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 .*:    e92dd800        push    {fp, ip, lr, pc}
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 .*:    eb000004        bl      .* 
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 .*:    e89d6800        ldm     sp, {fp, sp, lr}
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 .*:    e12fff1e        bx      lr
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 .*:    e1a00000        nop                     ; \(mov r0, r0\)
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 .*:    e1a00000        nop                     ; \(mov r0, r0\)
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 .*:    e1a00000        nop                     ; \(mov r0, r0\)
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.* :
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 .*:    e1a0c00d        mov     ip, sp
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 .*:    e92dd800        push    {fp, ip, lr, pc}
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 .*:    ebffffee        bl      .*
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 .*:    e89d6800        ldm     sp, {fp, sp, lr}
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 .*:    e12fff1e        bx      lr
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 .*:    e1a00000        nop                     ; \(mov r0, r0\)
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 .*:    e1a00000        nop                     ; \(mov r0, r0\)
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 .*:    e1a00000        nop                     ; \(mov r0, r0\)
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.* :
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 .*:    e12fff1e        bx      lr
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 .*:    e1a00000        nop                     ; \(mov r0, r0\)
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 .*:    e1a00000        nop                     ; \(mov r0, r0\)
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 .*:    e1a00000        nop                     ; \(mov r0, r0\)
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.* :
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 .*:    b500            push    {lr}
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 .*:    f7ff efc.       blx     .* <_start-0x..>
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 .*:    bd00            pop     {pc}
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 .*:    4770            bx      lr
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 .*:    46c0            nop                     ; \(mov r8, r8\)
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 .*:    46c0            nop                     ; \(mov r8, r8\)
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 .*:    46c0            nop                     ; \(mov r8, r8\)

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