URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [gnu/] [binutils/] [ld/] [testsuite/] [ld-elf/] [loadaddr3.t] - Blame information for rev 53

Details | Compare with Previous | View Log


 
MEMORY
{
  rom (rx) : ORIGIN = 0x100, LENGTH = 0x100
  ram (rwx) : ORIGIN = 0x200, LENGTH = 0x100
 
}
 
SECTIONS
{
  .text : {*(.text .text.*)} >rom
  .data : {data_load = LOADADDR (.data);
           data_start = ADDR (.data);
           *(.data .data.*)} >ram AT>rom
  /DISCARD/ : { *(.*) }
}

Line No.	Rev	Author	Line
1	53	khays
2			`MEMORY`
3			`{`
4			`rom (rx) : ORIGIN = 0x100, LENGTH = 0x100`
5			`ram (rwx) : ORIGIN = 0x200, LENGTH = 0x100`
6
7			`}`
8
9			`SECTIONS`
10			`{`
11			`.text : {(.text .text.)} >rom`
12			`.data : {data_load = LOADADDR (.data);`
13			`data_start = ADDR (.data);`
14			`(.data .data.)} >ram AT>rom`
15			`/DISCARD/ : { (.) }`
16			`}`

Browse

Tools

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [gnu/] [binutils/] [ld/] [testsuite/] [ld-elf/] [loadaddr3.t] - Blame information for rev 53