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[/] [open8_urisc/] [trunk/] [gnu/] [binutils/] [ld/] [testsuite/] [ld-mips-elf/] [mips16-intermix-1.s] - Blame information for rev 146

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        .text
        .align  2
        .globl  __start
        .set    nomips16
        .ent    __start
__start:
        .frame  $sp,56,$31              # vars= 0, regs= 3/2, args= 24, gp= 0
        .mask   0x80030000,-24
        .fmask  0x00f00000,-8
        .set    noreorder
        .set    nomacro
 
        addiu   $sp,$sp,-56
        sw      $31,32($sp)
        sw      $17,28($sp)
        sw      $16,24($sp)
        sdc1    $f22,48($sp)
        sdc1    $f20,40($sp)
        jal     m32_l
        move    $4,$17
 
        move    $4,$17
        jal     m16_l
        move    $16,$2
 
        addu    $16,$16,$2
        jal     m32_d
        mov.d   $f12,$f22
 
        addu    $16,$16,$2
        jal     m16_d
        mov.d   $f12,$f22
 
        move    $4,$17
        mfc1    $7,$f22
        mfc1    $6,$f23
        jal     m32_ld
        addu    $16,$16,$2
 
        move    $4,$17
        mfc1    $7,$f22
        mfc1    $6,$f23
        jal     m16_ld
        addu    $16,$16,$2
 
        move    $6,$17
        mov.d   $f12,$f22
        jal     m32_dl
        addu    $16,$16,$2
 
        move    $6,$17
        mov.d   $f12,$f22
        jal     m16_dl
        addu    $16,$16,$2
 
        move    $6,$17
        move    $7,$17
        sdc1    $f22,16($sp)
        mov.d   $f12,$f22
        jal     m32_dlld
        addu    $16,$16,$2
 
        move    $6,$17
        move    $7,$17
        mov.d   $f12,$f22
        sdc1    $f22,16($sp)
        jal     m16_dlld
        addu    $16,$16,$2
 
        move    $4,$17
        jal     m32_d_l
        addu    $16,$16,$2
 
        move    $4,$17
        jal     m16_d_l
        mov.d   $f20,$f0
 
        move    $4,$17
        mfc1    $7,$f22
        mfc1    $6,$f23
        jal     f32
        add.d   $f20,$f20,$f0
 
        move    $4,$17
        add.d   $f20,$f20,$f0
        mfc1    $7,$f22
        jal     f16
        mfc1    $6,$f23
 
        add.d   $f20,$f20,$f0
        lw      $31,32($sp)
        trunc.w.d $f0,$f20
        lw      $17,28($sp)
        mfc1    $3,$f0
        addu    $2,$3,$16
        lw      $16,24($sp)
        ldc1    $f22,48($sp)
        ldc1    $f20,40($sp)
        j       $31
        addiu   $sp,$sp,56
 
        .set    macro
        .set    reorder
        .end    __start

Line No.	Rev	Author	Line
1	84	khays	`.text`
2			`.align 2`
3			`.globl __start`
4			`.set nomips16`
5			`.ent __start`
6			`__start:`
7			`.frame $sp,56,$31 # vars= 0, regs= 3/2, args= 24, gp= 0`
8			`.mask 0x80030000,-24`
9			`.fmask 0x00f00000,-8`
10			`.set noreorder`
11			`.set nomacro`
12
13			`addiu $sp,$sp,-56`
14			`sw $31,32($sp)`
15			`sw $17,28($sp)`
16			`sw $16,24($sp)`
17			`sdc1 $f22,48($sp)`
18			`sdc1 $f20,40($sp)`
19			`jal m32_l`
20			`move $4,$17`
21
22			`move $4,$17`
23			`jal m16_l`
24			`move $16,$2`
25
26			`addu $16,$16,$2`
27			`jal m32_d`
28			`mov.d $f12,$f22`
29
30			`addu $16,$16,$2`
31			`jal m16_d`
32			`mov.d $f12,$f22`
33
34			`move $4,$17`
35			`mfc1 $7,$f22`
36			`mfc1 $6,$f23`
37			`jal m32_ld`
38			`addu $16,$16,$2`
39
40			`move $4,$17`
41			`mfc1 $7,$f22`
42			`mfc1 $6,$f23`
43			`jal m16_ld`
44			`addu $16,$16,$2`
45
46			`move $6,$17`
47			`mov.d $f12,$f22`
48			`jal m32_dl`
49			`addu $16,$16,$2`
50
51			`move $6,$17`
52			`mov.d $f12,$f22`
53			`jal m16_dl`
54			`addu $16,$16,$2`
55
56			`move $6,$17`
57			`move $7,$17`
58			`sdc1 $f22,16($sp)`
59			`mov.d $f12,$f22`
60			`jal m32_dlld`
61			`addu $16,$16,$2`
62
63			`move $6,$17`
64			`move $7,$17`
65			`mov.d $f12,$f22`
66			`sdc1 $f22,16($sp)`
67			`jal m16_dlld`
68			`addu $16,$16,$2`
69
70			`move $4,$17`
71			`jal m32_d_l`
72			`addu $16,$16,$2`
73
74			`move $4,$17`
75			`jal m16_d_l`
76			`mov.d $f20,$f0`
77
78			`move $4,$17`
79			`mfc1 $7,$f22`
80			`mfc1 $6,$f23`
81			`jal f32`
82			`add.d $f20,$f20,$f0`
83
84			`move $4,$17`
85			`add.d $f20,$f20,$f0`
86			`mfc1 $7,$f22`
87			`jal f16`
88			`mfc1 $6,$f23`
89
90			`add.d $f20,$f20,$f0`
91			`lw $31,32($sp)`
92			`trunc.w.d $f0,$f20`
93			`lw $17,28($sp)`
94			`mfc1 $3,$f0`
95			`addu $2,$3,$16`
96			`lw $16,24($sp)`
97			`ldc1 $f22,48($sp)`
98			`ldc1 $f20,40($sp)`
99			`j $31`
100			`addiu $sp,$sp,56`
101
102			`.set macro`
103			`.set reorder`
104			`.end __start`

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[/] [open8_urisc/] [trunk/] [gnu/] [binutils/] [ld/] [testsuite/] [ld-mips-elf/] [mips16-intermix-1.s] - Blame information for rev 146