OpenCores
URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [gnu/] [binutils/] [ld/] [testsuite/] [ld-powerpc/] [tlsopt3_32.d] - Blame information for rev 146

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 95 khays
#source: tlsopt3_32.s
2
#source: tlslib32.s
3
#as: -a32
4
#ld: -melf32ppc
5
#objdump: -dr
6
#target: powerpc*-*-*
7
 
8
.*: +file format elf32-powerpc
9
 
10
Disassembly of section \.text:
11
 
12
0+1800094 <__tls_get_addr>:
13
 1800094:       4e 80 00 20     blr
14
 
15
Disassembly of section \.no_opt3:
16
 
17
0+1800098 <\.no_opt3>:
18
 1800098:       38 6d ff ec     addi    r3,r13,-20
19
 180009c:       48 00 00 0c     b       .*
20
 18000a0:       38 6d ff f4     addi    r3,r13,-12
21
 18000a4:       48 00 00 0c     b       .*
22
 18000a8:       4b ff ff ed     bl      1800094 <__tls_get_addr>
23
 18000ac:       48 00 00 08     b       .*
24
 18000b0:       4b ff ff e5     bl      1800094 <__tls_get_addr>
25
#pass

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.