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[/] [open8_urisc/] [trunk/] [gnu/] [binutils/] [ld/] [testsuite/] [ld-spu/] [ovl2.d] - Blame information for rev 118

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Line No. Rev Author Line
1 110 khays
#source: ovl2.s
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#ld: -N -T ovl2.lnk -T ovl.lnk --emit-relocs
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#objdump: -D -r
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.*elf32-spu
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Disassembly of section \.text:
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00000100 <_start>:
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.*      brsl    \$0,.* <00000000\.ovl_call\.f1_a1>.*
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.*SPU_REL16     f1_a1
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.*      brsl    \$0,.* <00000000\.ovl_call\.setjmp>.*
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.*SPU_REL16     setjmp
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.*      br      100 <_start>    # 100
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.*SPU_REL16     _start
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0000010c :
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.*      bi      \$0
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00000110 :
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.*      bi      \$0
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.*00 00 03 40.*
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.*SPU_ADDR32    \.ov_a1\+0x14
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        \.\.\.
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#...
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00000320 <00000000\.ovl_call.f1_a1>:
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.*      ila     \$78,1
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.*      lnop
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.*      ila     \$79,1040       # 410
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.*      bra?    .* <__ovly_load>.*
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00000330 <00000000\.ovl_call.setjmp>:
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.*      ila     \$78,0
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.*      lnop
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.*      ila     \$79,268        # 10c
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.*      bra?    .* <__ovly_load>.*
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00000340 <00000000\.ovl_call\.13:5>:
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.*      ila     \$78,1
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.*      lnop
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.*      ila     \$79,1044       # 414
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.*      bra?    .* <__ovly_load>.*
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00000350 <_SPUEAR_f1_a2>:
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.*      ila     \$78,2
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.*      lnop
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.*      ila     \$79,1040       # 410
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.*      bra?    .* <__ovly_load>.*
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#00000318 <00000000\.ovl_call.f1_a1>:
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#.*     bra?sl  \$75,.* <__ovly_load>.*
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#.*00 04 04 00.*
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#
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#00000320 <00000000\.ovl_call.setjmp>:
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#.*     bra?sl  \$75,.* <__ovly_load>.*
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#.*00 00 01 0c.*
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#
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#00000328 <_SPUEAR_f1_a2>:
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#.*     bra?sl  \$75,.* <__ovly_load>.*
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#.*00 08 04 00.*
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Disassembly of section \.ov_a1:
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00000400 <00000001\.ovl_call\.14:6>:
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.*      ila     \$78,2
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.*      lnop
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.*      ila     \$79,1044       # 414
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.*      bra?    .* <__ovly_load>.*
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00000410 :
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.*      bi      \$0
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.*00 00 04 14.*
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.*SPU_ADDR32    \.ov_a1\+0x14
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.*00 00 04 20.*
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.*SPU_ADDR32    \.ov_a1\+0x20
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.*00 00 04 00.*
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.*SPU_ADDR32    \.ov_a2\+0x14
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Disassembly of section \.ov_a2:
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00000400 <00000002\.ovl_call\.13:5>:
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.*      ila     \$78,1
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.*      lnop
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.*      ila     \$79,1056       # 420
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.*      bra?    .* <__ovly_load>.*
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00000410 :
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.*      br      .* .*
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.*SPU_REL16     longjmp
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.*00 00 04 00.*
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.*SPU_ADDR32    \.ov_a1\+0x20
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.*00 00 04 1c.*
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.*SPU_ADDR32    \.ov_a2\+0x1c
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.*00 00 00 00.*
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Disassembly of section \.data:
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00000420 <_ovly_table-0x10>:
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.*00 00 00 00 .*
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.*00 00 00 01 .*
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        \.\.\.
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00000430 <_ovly_table>:
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.*00 00 04 00 .*
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.*00 00 00 20 .*
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#.*00 00 03 10 .*
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.*00 00 01 00 .*
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.*00 00 00 01 .*
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.*00 00 04 00 .*
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.*00 00 00 20 .*
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#.*00 00 03 20 .*
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.*00 00 01 20 .*
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.*00 00 00 01 .*
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00000450 <_ovly_buf_table>:
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.*00 00 00 00 .*
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Disassembly of section \.toe:
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00000460 <_EAR_>:
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        \.\.\.
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Disassembly of section .nonalloc:
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00000000 <.nonalloc>:
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.*00 00 04 14.*
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.*SPU_ADDR32    \.ov_a1\+0x14
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.*00 00 04 20.*
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.*SPU_ADDR32    \.ov_a1\+0x20
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.*00 00 04 14.*
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.*SPU_ADDR32    \.ov_a2\+0x14
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.*00 00 04 1c.*
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.*SPU_ADDR32    \.ov_a2\+0x1c
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Disassembly of section \.note\.spu_name:
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.* <\.note\.spu_name>:
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.*:     00 00 00 08 .*
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.*:     00 00 00 0c .*
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.*:     00 00 00 01 .*
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.*:     53 50 55 4e .*
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.*:     41 4d 45 00 .*
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.*:     74 6d 70 64 .*
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.*:     69 72 2f 64 .*
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.*:     75 6d 70 00 .*

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