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[/] [open8_urisc/] [trunk/] [gnu/] [binutils/] [ld/] [testsuite/] [ld-spu/] [pic.d] - Blame information for rev 332

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Line No. Rev Author Line
1 110 khays
#source: pic.s
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#source: picdef.s
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#ld: --emit-relocs
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#objdump: -D -r
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.*elf32-spu
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Disassembly of section \.text:
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11
00000000 :
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        \.\.\.
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14
00000008 <_start>:
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   8:   42 00 08 02     ila     \$2,10 <_start\+0x8>
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                        8: SPU_ADDR18   \.text\+0x10
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   c:   33 00 00 fe     brsl    \$126,10 <_start\+0x8>
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                        c: SPU_REL16    \.text\+0x10
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  10:   08 1f 81 7e     sf      \$126,\$2,\$126
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  14:   42 00 02 04     ila     \$4,4 
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                        14: SPU_ADDR18  \.text\+0x4
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  18:   42 00 42 05     ila     \$5,84 
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                        18: SPU_ADDR18  \.text\+0x84
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  1c:   42 00 04 06     ila     \$6,8 <_start>
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                        1c: SPU_ADDR18  _start
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  20:   42 00 42 07     ila     \$7,84 
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                        20: SPU_ADDR18  \.text\+0x84
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  24:   18 1f 82 04     a       \$4,\$4,\$126
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                        24: SPU_ADD_PIC before\+0x4
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  28:   18 1f 82 85     a       \$5,\$5,\$126
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                        28: SPU_ADD_PIC after\+0xfffffffc
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  2c:   18 1f 83 06     a       \$6,\$6,\$126
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                        2c: SPU_ADD_PIC _start
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  30:   18 1f 83 87     a       \$7,\$7,\$126
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                        30: SPU_ADD_PIC end
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  34:   42 00 00 0e     ila     \$14,0
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                        34: SPU_ADDR18  \.text
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  38:   18 1f 87 0e     a       \$14,\$14,\$126
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                        38: SPU_ADD_PIC before
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  3c:   42 00 00 03     ila     \$3,0
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                        3c: SPU_ADDR18  undef
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  40:   1c 00 01 83     ai      \$3,\$3,0
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                        40: SPU_ADD_PIC undef
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  44:   41 00 00 07     ilhu    \$7,0
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                        44: SPU_ADDR16_HI       ext
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  48:   60 ab 3c 07     iohl    \$7,22136       # 5678
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                        48: SPU_ADDR16_LO       ext
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  4c:   18 1f 83 84     a       \$4,\$7,\$126
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                        4c: SPU_ADD_PIC ext
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  50:   42 00 80 09     ila     \$9,100 
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                        50: SPU_ADDR18  \.data
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  54:   18 1f 84 85     a       \$5,\$9,\$126
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                        54: SPU_ADD_PIC loc
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  58:   42 00 88 08     ila     \$8,110 
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                        58: SPU_ADDR18  glob
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  5c:   18 1f 84 06     a       \$6,\$8,\$126
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                        5c: SPU_ADD_PIC glob
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  60:   42 00 90 09     ila     \$9,120 <__bss_start>
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                        60: SPU_ADDR18  _end
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  64:   18 1f 84 89     a       \$9,\$9,\$126
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                        64: SPU_ADD_PIC _end
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  68:   12 02 39 85     hbrr    7c ,1234        # 1234
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                        68: SPU_REL16   abscall
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  6c:   33 ff f2 82     lqr     \$2,0 
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                        6c: SPU_REL16   undef
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  70:   23 ff f2 02     stqr    \$2,0 
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                        70: SPU_REL16   undef
68
  74:   33 8a c0 83     lqr     \$3,5678        # 5678
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                        74: SPU_REL16   ext
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  78:   33 8a c2 04     lqr     \$4,5688        # 5688
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                        78: SPU_REL16   ext\+0x10
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0000007c :
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  7c:   33 02 37 00     brsl    \$0,1234        # 1234
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                        7c: SPU_REL16   abscall
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  80:   32 02 36 80     br      1234    # 1234
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                        80: SPU_REL16   abscall
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00000084 :
80
  84:   00 00 00 00     stop
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00000088 :
83
  88:   00 00 00 00     stop
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Disassembly of section \.data:
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87
00000100 :
88
 100:   00 00 00 01     stop
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        \.\.\.
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00000110 :
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 110:   00 00 00 02     stop
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        \.\.\.
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Disassembly of section \.note\.spu_name:
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00000000 <\.note\.spu_name>:
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.*
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.*
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.*
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.*
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.*
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.*
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.*
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#pass

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