| 1 |
148 |
khays |
2011-06-13 Walter Lee
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| 2 |
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| 3 |
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* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
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| 4 |
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tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
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| 5 |
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* Makefile.in: Regenerate.
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| 6 |
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* configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
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| 7 |
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* configure: Regenerate.
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| 8 |
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* disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
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| 9 |
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* po/POTFILES.in: Regenerate.
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| 10 |
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* tilegx-dis.c: New file.
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| 11 |
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* tilegx-opc.c: New file.
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| 12 |
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* tilepro-dis.c: New file.
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| 13 |
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* tilepro-opc.c: New file.
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| 14 |
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| 15 |
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2011-06-10 H.J. Lu
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| 16 |
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| 17 |
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AVX Programming Reference (June, 2011)
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| 18 |
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* i386-dis.c (XMGatherQ): New.
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| 19 |
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* i386-dis.c (EXxmm_mb): New.
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| 20 |
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(EXxmm_mb): Likewise.
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| 21 |
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(EXxmm_mw): Likewise.
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| 22 |
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(EXxmm_md): Likewise.
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| 23 |
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(EXxmm_mq): Likewise.
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| 24 |
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(EXxmmdw): Likewise.
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| 25 |
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(EXxmmqd): Likewise.
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| 26 |
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(VexGatherQ): Likewise.
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| 27 |
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(MVexVSIBDWpX): Likewise.
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| 28 |
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(MVexVSIBQWpX): Likewise.
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| 29 |
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(xmm_mb_mode): Likewise.
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| 30 |
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(xmm_mw_mode): Likewise.
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| 31 |
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(xmm_md_mode): Likewise.
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| 32 |
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(xmm_mq_mode): Likewise.
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| 33 |
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(xmmdw_mode): Likewise.
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| 34 |
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(xmmqd_mode): Likewise.
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| 35 |
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(ymmxmm_mode): Likewise.
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| 36 |
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(vex_vsib_d_w_dq_mode): Likewise.
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| 37 |
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(vex_vsib_q_w_dq_mode): Likewise.
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| 38 |
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(MOD_VEX_0F385A_PREFIX_2): Likewise.
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| 39 |
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(MOD_VEX_0F388C_PREFIX_2): Likewise.
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| 40 |
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(MOD_VEX_0F388E_PREFIX_2): Likewise.
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| 41 |
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(PREFIX_0F3882): Likewise.
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| 42 |
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(PREFIX_VEX_0F3816): Likewise.
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| 43 |
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(PREFIX_VEX_0F3836): Likewise.
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| 44 |
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(PREFIX_VEX_0F3845): Likewise.
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| 45 |
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(PREFIX_VEX_0F3846): Likewise.
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| 46 |
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(PREFIX_VEX_0F3847): Likewise.
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| 47 |
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(PREFIX_VEX_0F3858): Likewise.
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| 48 |
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(PREFIX_VEX_0F3859): Likewise.
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| 49 |
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(PREFIX_VEX_0F385A): Likewise.
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| 50 |
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(PREFIX_VEX_0F3878): Likewise.
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| 51 |
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(PREFIX_VEX_0F3879): Likewise.
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| 52 |
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(PREFIX_VEX_0F388C): Likewise.
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| 53 |
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(PREFIX_VEX_0F388E): Likewise.
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| 54 |
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(PREFIX_VEX_0F3890..PREFIX_VEX_0F3893): Likewise.
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| 55 |
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(PREFIX_VEX_0F38F5): Likewise.
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| 56 |
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(PREFIX_VEX_0F38F6): Likewise.
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| 57 |
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(PREFIX_VEX_0F3A00): Likewise.
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| 58 |
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(PREFIX_VEX_0F3A01): Likewise.
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| 59 |
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(PREFIX_VEX_0F3A02): Likewise.
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| 60 |
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(PREFIX_VEX_0F3A38): Likewise.
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| 61 |
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(PREFIX_VEX_0F3A39): Likewise.
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| 62 |
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(PREFIX_VEX_0F3A46): Likewise.
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| 63 |
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(PREFIX_VEX_0F3AF0): Likewise.
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| 64 |
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(VEX_LEN_0F3816_P_2): Likewise.
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| 65 |
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(VEX_LEN_0F3819_P_2): Likewise.
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| 66 |
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(VEX_LEN_0F3836_P_2): Likewise.
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| 67 |
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(VEX_LEN_0F385A_P_2_M_0): Likewise.
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| 68 |
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(VEX_LEN_0F38F5_P_0): Likewise.
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| 69 |
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(VEX_LEN_0F38F5_P_1): Likewise.
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| 70 |
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(VEX_LEN_0F38F5_P_3): Likewise.
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| 71 |
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(VEX_LEN_0F38F6_P_3): Likewise.
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| 72 |
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(VEX_LEN_0F38F7_P_1): Likewise.
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| 73 |
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(VEX_LEN_0F38F7_P_2): Likewise.
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| 74 |
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(VEX_LEN_0F38F7_P_3): Likewise.
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| 75 |
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(VEX_LEN_0F3A00_P_2): Likewise.
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| 76 |
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(VEX_LEN_0F3A01_P_2): Likewise.
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| 77 |
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(VEX_LEN_0F3A38_P_2): Likewise.
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| 78 |
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(VEX_LEN_0F3A39_P_2): Likewise.
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| 79 |
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(VEX_LEN_0F3A46_P_2): Likewise.
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| 80 |
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(VEX_LEN_0F3AF0_P_3): Likewise.
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| 81 |
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(VEX_W_0F3816_P_2): Likewise.
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| 82 |
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(VEX_W_0F3818_P_2): Likewise.
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| 83 |
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(VEX_W_0F3819_P_2): Likewise.
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| 84 |
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(VEX_W_0F3836_P_2): Likewise.
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| 85 |
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(VEX_W_0F3846_P_2): Likewise.
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| 86 |
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(VEX_W_0F3858_P_2): Likewise.
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| 87 |
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(VEX_W_0F3859_P_2): Likewise.
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| 88 |
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(VEX_W_0F385A_P_2_M_0): Likewise.
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| 89 |
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(VEX_W_0F3878_P_2): Likewise.
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| 90 |
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(VEX_W_0F3879_P_2): Likewise.
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| 91 |
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(VEX_W_0F3A00_P_2): Likewise.
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| 92 |
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(VEX_W_0F3A01_P_2): Likewise.
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| 93 |
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(VEX_W_0F3A02_P_2): Likewise.
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| 94 |
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(VEX_W_0F3A38_P_2): Likewise.
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| 95 |
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(VEX_W_0F3A39_P_2): Likewise.
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| 96 |
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(VEX_W_0F3A46_P_2): Likewise.
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| 97 |
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(MOD_VEX_0F3818_PREFIX_2): Removed.
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| 98 |
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(MOD_VEX_0F3819_PREFIX_2): Likewise.
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| 99 |
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(VEX_LEN_0F60_P_2..VEX_LEN_0F6D_P_2): Likewise.
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| 100 |
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(VEX_LEN_0F70_P_1..VEX_LEN_0F76_P_2): Likewise.
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| 101 |
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(VEX_LEN_0FD1_P_2..VEX_LEN_0FD5_P_2): Likewise.
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| 102 |
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(VEX_LEN_0FD7_P_2_M_1..VEX_LEN_0F3819_P_2_M_0): Likewise.
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| 103 |
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(VEX_LEN_0F381C_P_2..VEX_LEN_0F3840_P_2): Likewise.
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| 104 |
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(VEX_LEN_0F3A0E_P_2): Likewise.
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| 105 |
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(VEX_LEN_0F3A0F_P_2): Likewise.
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| 106 |
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(VEX_LEN_0F3A42_P_2): Likewise.
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| 107 |
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(VEX_LEN_0F3A4C_P_2): Likewise.
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| 108 |
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(VEX_W_0F3818_P_2_M_0): Likewise.
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| 109 |
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(VEX_W_0F3819_P_2_M_0): Likewise.
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| 110 |
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(prefix_table): Updated.
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| 111 |
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(three_byte_table): Likewise.
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| 112 |
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(vex_table): Likewise.
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| 113 |
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(vex_len_table): Likewise.
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| 114 |
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(vex_w_table): Likewise.
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| 115 |
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(mod_table): Likewise.
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| 116 |
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(putop): Handle "LW".
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| 117 |
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(intel_operand_size): Handle xmm_mb_mode, xmm_mw_mode,
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| 118 |
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xmm_md_mode, xmm_mq_mode, xmmdw_mode, xmmqd_mode, ymmxmm_mode,
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| 119 |
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vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode.
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| 120 |
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(OP_EX): Likewise.
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| 121 |
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(OP_E_memory): Handle vex_vsib_d_w_dq_mode and
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| 122 |
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vex_vsib_q_w_dq_mode.
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| 123 |
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(OP_XMM): Handle vex_vsib_q_w_dq_mode.
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| 124 |
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(OP_VEX): Likewise.
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| 125 |
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| 126 |
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* i386-gen.c (cpu_flag_init): Add CpuAVX2 to CPU_ANY_SSE_FLAGS
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| 127 |
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and CPU_ANY_AVX_FLAGS. Add CPU_BMI2_FLAGS, CPU_LZCNT_FLAGS,
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| 128 |
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CPU_INVPCID_FLAGS and CPU_AVX2_FLAGS.
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| 129 |
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(cpu_flags): Add CpuAVX2, CpuBMI2, CpuLZCNT and CpuINVPCID.
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| 130 |
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(opcode_modifiers): Add VecSIB.
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| 131 |
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| 132 |
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* i386-opc.h (CpuAVX2): New.
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| 133 |
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(CpuBMI2): Likewise.
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| 134 |
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(CpuLZCNT): Likewise.
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| 135 |
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(CpuINVPCID): Likewise.
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| 136 |
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(VecSIB128): Likewise.
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| 137 |
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(VecSIB256): Likewise.
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| 138 |
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(VecSIB): Likewise.
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| 139 |
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(i386_cpu_flags): Add cpuavx2, cpubmi2, cpulzcnt and cpuinvpcid.
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| 140 |
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(i386_opcode_modifier): Add vecsib.
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| 141 |
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| 142 |
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* i386-opc.tbl: Add invpcid, AVX2 and BMI2 instructions.
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| 143 |
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* i386-init.h: Regenerated.
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| 144 |
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* i386-tbl.h: Likewise.
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| 145 |
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| 146 |
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2011-06-03 Quentin Neill
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| 147 |
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| 148 |
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* i386-gen.c (cpu_flag_init): Add CpuF16C to CPU_BDVER2_FLAGS.
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| 149 |
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* i386-init.h: Regenerated.
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| 150 |
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| 151 |
18 |
khays |
2011-06-03 Nick Clifton
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| 152 |
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| 153 |
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PR binutils/12752
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| 154 |
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* arm-dis.c (print_insn_coprocessor): Use bfd_vma type for
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| 155 |
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computing address offsets.
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| 156 |
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(print_arm_address): Likewise.
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| 157 |
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(print_insn_arm): Likewise.
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| 158 |
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(print_insn_thumb16): Likewise.
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| 159 |
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(print_insn_thumb32): Likewise.
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| 160 |
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| 161 |
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2011-06-02 Jie Zhang
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| 162 |
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Nathan Sidwell
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| 163 |
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Maciej Rozycki
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| 164 |
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| 165 |
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* arm-dis.c (print_insn_coprocessor): Explicitly print #-0
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| 166 |
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as address offset.
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| 167 |
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(print_arm_address): Likewise. Elide positive #0 appropriately.
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| 168 |
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(print_insn_arm): Likewise.
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| 169 |
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| 170 |
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2011-06-02 Nick Clifton
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| 171 |
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| 172 |
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PR gas/12752
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| 173 |
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* arm-dis.c (print_insn_thumb32): Do not sign extend addresses
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| 174 |
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passed to print_address_func.
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| 175 |
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| 176 |
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2011-06-02 Nick Clifton
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| 177 |
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| 178 |
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* arm-dis.c: Fix spelling mistakes.
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| 179 |
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* op/opcodes.pot: Regenerate.
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| 180 |
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| 181 |
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2011-05-24 Andreas Krebbel
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| 182 |
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| 183 |
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* s390-opc.c: Replace S390_OPERAND_REG_EVEN with
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| 184 |
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S390_OPERAND_REG_PAIR. Fix INSTR_RRF_0UFEF instruction type.
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| 185 |
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* s390-opc.txt: Fix cxr instruction type.
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| 186 |
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| 187 |
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2011-05-24 Andreas Krebbel
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| 188 |
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| 189 |
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* s390-opc.c: Add new instruction types marking register pair
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| 190 |
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operands.
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| 191 |
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* s390-opc.txt: Match instructions having register pair operands
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| 192 |
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to the new instruction types.
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| 193 |
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| 194 |
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2011-05-19 Nick Clifton
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| 195 |
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| 196 |
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* v850-opc.c (cmpf.[sd]): Reverse the order of the reg1 and reg2
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| 197 |
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operands.
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| 198 |
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| 199 |
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2011-05-10 Quentin Neill
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| 200 |
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| 201 |
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* i386-gen.c (cpu_flag_init): Add new CPU_BDVER2_FLAGS.
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| 202 |
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* i386-init.h: Regenerated.
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| 203 |
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| 204 |
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2011-04-27 Nick Clifton
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| 205 |
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| 206 |
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* po/da.po: Updated Danish translation.
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| 207 |
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| 208 |
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2011-04-26 Anton Blanchard
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| 209 |
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| 210 |
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* ppc-opc.c: (powerpc_opcodes): Enable icswx for POWER7.
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| 211 |
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| 212 |
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2011-04-21 DJ Delorie
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| 213 |
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| 214 |
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* rx-decode.opc (rx_decode_opcode): Set the syntax for multi-byte NOPs.
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| 215 |
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* rx-decode.c: Regenerate.
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| 216 |
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| 217 |
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2011-04-20 H.J. Lu
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| 218 |
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| 219 |
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* i386-init.h: Regenerated.
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| 220 |
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| 221 |
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2011-04-19 Quentin Neill
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| 222 |
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| 223 |
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* i386-gen.c (cpu_flag_init): Remove 3dnow and 3dnowa bits
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| 224 |
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from bdver1 flags.
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| 225 |
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| 226 |
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2011-04-13 Nick Clifton
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| 227 |
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| 228 |
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* v850-dis.c (disassemble): Always print a closing square brace if
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| 229 |
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an opening square brace was printed.
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| 230 |
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| 231 |
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2011-04-12 Nick Clifton
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| 232 |
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| 233 |
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PR binutils/12534
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| 234 |
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* arm-dis.c (thumb32_opcodes): Add %L suffix to LDRD and STRD insn
|
| 235 |
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patterns.
|
| 236 |
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(print_insn_thumb32): Handle %L.
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| 237 |
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| 238 |
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2011-04-11 Julian Brown
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| 239 |
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| 240 |
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* arm-dis.c (psr_name): Fix typo for BASEPRI_MAX.
|
| 241 |
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(print_insn_thumb32): Add APSR bitmask support.
|
| 242 |
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| 243 |
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2011-04-07 Paul Carroll
|
| 244 |
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| 245 |
|
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* arm-dis.c (print_insn): init vars moved into private_data structure.
|
| 246 |
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| 247 |
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2011-03-24 Mike Frysinger
|
| 248 |
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| 249 |
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* bfin-dis.c (decode_dsp32mac_0): Move MM zeroing down to MAC0 logic.
|
| 250 |
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| 251 |
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2011-03-22 Eric B. Weddington
|
| 252 |
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| 253 |
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* avr-dis.c (avr_operand): Add opcode_str parameter. Check for
|
| 254 |
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post-increment to support LPM Z+ instruction. Add support for 'E'
|
| 255 |
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constraint for DES instruction.
|
| 256 |
|
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(print_insn_avr): Adjust calls to avr_operand. Rename variable.
|
| 257 |
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| 258 |
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2011-03-14 Richard Sandiford
|
| 259 |
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| 260 |
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* arm-dis.c (get_sym_code_type): Treat STT_GNU_IFUNCs as code.
|
| 261 |
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| 262 |
|
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2011-03-14 Richard Sandiford
|
| 263 |
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|
| 264 |
|
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* arm-dis.c (get_sym_code_type): Don't check for STT_ARM_TFUNC.
|
| 265 |
|
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Use branch types instead.
|
| 266 |
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(print_insn): Likewise.
|
| 267 |
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|
| 268 |
|
|
2011-02-28 Maciej W. Rozycki
|
| 269 |
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|
| 270 |
|
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* mips-opc.c (mips_builtin_opcodes): Correct register use
|
| 271 |
|
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annotation of "alnv.ps".
|
| 272 |
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|
| 273 |
|
|
2011-02-28 Maciej W. Rozycki
|
| 274 |
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| 275 |
|
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* mips-opc.c (mips_builtin_opcodes): Add "pref" macro.
|
| 276 |
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| 277 |
|
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2011-02-22 Mike Frysinger
|
| 278 |
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| 279 |
|
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* bfin-dis.c (OUTS): Remove p NULL check and txt NUL check.
|
| 280 |
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| 281 |
|
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2011-02-22 Mike Frysinger
|
| 282 |
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| 283 |
|
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* bfin-dis.c (print_insn_bfin): Change outf->fprintf_func to OUTS.
|
| 284 |
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|
| 285 |
|
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2011-02-19 Mike Frysinger
|
| 286 |
|
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| 287 |
|
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* bfin-dis.c (saved_state): Mark static. Change a[01]x to ax[] and
|
| 288 |
|
|
a[01]w to aw[]. Delete ac0, ac0_copy, ac1, an, aq, av0, av0s, av1,
|
| 289 |
|
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av1s, az, cc, v, v_copy, vs, rnd_mod, v_internal, pc, ticks, insts,
|
| 290 |
|
|
exception, end_of_registers, msize, memory, bfd_mach.
|
| 291 |
|
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(CCREG, PCREG, A0XREG, A0WREG, A1XREG, A1WREG, LC0REG, LT0REG,
|
| 292 |
|
|
LB0REG, LC1REG, LT1REG, LB1REG): Delete
|
| 293 |
|
|
(AXREG, AWREG, LCREG, LTREG, LBREG): Define.
|
| 294 |
|
|
(get_allreg): Change to new defines. Fallback to abort().
|
| 295 |
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| 296 |
|
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2011-02-14 Mike Frysinger
|
| 297 |
|
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|
| 298 |
|
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* bfin-dis.c: Add whitespace/parenthesis where needed.
|
| 299 |
|
|
|
| 300 |
|
|
2011-02-14 Mike Frysinger
|
| 301 |
|
|
|
| 302 |
|
|
* bfin-dis.c (decode_LoopSetup_0): Return when reg is greater
|
| 303 |
|
|
than 7.
|
| 304 |
|
|
|
| 305 |
|
|
2011-02-13 Ralf Wildenhues
|
| 306 |
|
|
|
| 307 |
|
|
* configure: Regenerate.
|
| 308 |
|
|
|
| 309 |
|
|
2011-02-13 Mike Frysinger
|
| 310 |
|
|
|
| 311 |
|
|
* bfin-dis.c (decode_dsp32alu_0): Fix typo with A1 reg.
|
| 312 |
|
|
|
| 313 |
|
|
2011-02-13 Mike Frysinger
|
| 314 |
|
|
|
| 315 |
|
|
* bfin-dis.c (decode_dsp32mult_0): Add 1 to dst for mac1. Output
|
| 316 |
|
|
dregs only when P is set, and dregs_lo otherwise.
|
| 317 |
|
|
|
| 318 |
|
|
2011-02-13 Mike Frysinger
|
| 319 |
|
|
|
| 320 |
|
|
* bfin-dis.c (decode_dsp32alu_0): Delete BYTEOP2M code.
|
| 321 |
|
|
|
| 322 |
|
|
2011-02-12 Mike Frysinger
|
| 323 |
|
|
|
| 324 |
|
|
* bfin-dis.c (decode_pseudoDEBUG_0): Add space after PRNT.
|
| 325 |
|
|
|
| 326 |
|
|
2011-02-12 Mike Frysinger
|
| 327 |
|
|
|
| 328 |
|
|
* bfin-dis.c (machine_registers): Delete REG_GP.
|
| 329 |
|
|
(reg_names): Delete "GP".
|
| 330 |
|
|
(decode_allregs): Change REG_GP to REG_LASTREG.
|
| 331 |
|
|
|
| 332 |
|
|
2011-02-12 Mike Frysinger
|
| 333 |
|
|
|
| 334 |
|
|
* bfin-dis.c (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2,
|
| 335 |
|
|
M_IH, M_IU): Delete.
|
| 336 |
|
|
|
| 337 |
|
|
2011-02-11 Mike Frysinger
|
| 338 |
|
|
|
| 339 |
|
|
* bfin-dis.c (reg_names): Add const.
|
| 340 |
|
|
(decode_dregs_lo, decode_dregs_hi, decode_dregs, decode_dregs_byte,
|
| 341 |
|
|
decode_pregs, decode_iregs, decode_mregs, decode_dpregs, decode_gregs,
|
| 342 |
|
|
decode_regs, decode_regs_lo, decode_regs_hi, decode_statbits,
|
| 343 |
|
|
decode_counters, decode_allregs): Likewise.
|
| 344 |
|
|
|
| 345 |
|
|
2011-02-09 Michael Snyder
|
| 346 |
|
|
|
| 347 |
|
|
* i386-dis.c (OP_J): Parenthesize expression to prevent
|
| 348 |
|
|
truncated addresses.
|
| 349 |
|
|
(print_insn): Fix indentation off-by-one.
|
| 350 |
|
|
|
| 351 |
|
|
2011-02-01 Nick Clifton
|
| 352 |
|
|
|
| 353 |
|
|
* po/da.po: Updated Danish translation.
|
| 354 |
|
|
|
| 355 |
|
|
2011-01-21 Dave Murphy
|
| 356 |
|
|
|
| 357 |
|
|
* ppc-opc.c (NON32, NO371): Remove PPC_OPCODE_PPCPS.
|
| 358 |
|
|
|
| 359 |
|
|
2011-01-18 H.J. Lu
|
| 360 |
|
|
|
| 361 |
|
|
* i386-dis.c (sIbT): New.
|
| 362 |
|
|
(b_T_mode): Likewise.
|
| 363 |
|
|
(dis386): Replace sIb with sIbT on "pushT".
|
| 364 |
|
|
(x86_64_table): Replace sIb with Ib on "aam" and "aad".
|
| 365 |
|
|
(OP_sI): Handle b_T_mode. Properly sign-extend byte.
|
| 366 |
|
|
|
| 367 |
|
|
2011-01-18 Jan Kratochvil
|
| 368 |
|
|
|
| 369 |
|
|
* i386-init.h: Regenerated.
|
| 370 |
|
|
* i386-tbl.h: Regenerated
|
| 371 |
|
|
|
| 372 |
|
|
2011-01-17 Quentin Neill
|
| 373 |
|
|
|
| 374 |
|
|
* i386-dis.c (REG_XOP_TBM_01): New.
|
| 375 |
|
|
(REG_XOP_TBM_02): New.
|
| 376 |
|
|
(reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables.
|
| 377 |
|
|
(xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02
|
| 378 |
|
|
entries, and add bextr instruction.
|
| 379 |
|
|
|
| 380 |
|
|
* i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM.
|
| 381 |
|
|
(cpu_flags): Add CpuTBM.
|
| 382 |
|
|
|
| 383 |
|
|
* i386-opc.h (CpuTBM) New.
|
| 384 |
|
|
(i386_cpu_flags): Add bit cputbm.
|
| 385 |
|
|
|
| 386 |
|
|
* i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk,
|
| 387 |
|
|
blcs, blsfill, blsic, t1mskc, and tzmsk.
|
| 388 |
|
|
|
| 389 |
|
|
2011-01-12 DJ Delorie
|
| 390 |
|
|
|
| 391 |
|
|
* rx-dis.c (print_insn_rx): Support RX_Operand_TwoReg.
|
| 392 |
|
|
|
| 393 |
|
|
2011-01-11 Mingjie Xing
|
| 394 |
|
|
|
| 395 |
|
|
* mips-dis.c (print_insn_args): Adjust the value to print the real
|
| 396 |
|
|
offset for "+c" argument.
|
| 397 |
|
|
|
| 398 |
|
|
2011-01-10 Nick Clifton
|
| 399 |
|
|
|
| 400 |
|
|
* po/da.po: Updated Danish translation.
|
| 401 |
|
|
|
| 402 |
|
|
2011-01-05 Nathan Sidwell
|
| 403 |
|
|
|
| 404 |
|
|
* arm-dis.c (thumb32_opcodes): BLX must have bit zero clear.
|
| 405 |
|
|
|
| 406 |
|
|
2011-01-04 H.J. Lu
|
| 407 |
|
|
|
| 408 |
|
|
* i386-dis.c (REG_VEX_38F3): New.
|
| 409 |
|
|
(PREFIX_0FBC): Likewise.
|
| 410 |
|
|
(PREFIX_VEX_38F2): Likewise.
|
| 411 |
|
|
(PREFIX_VEX_38F3_REG_1): Likewise.
|
| 412 |
|
|
(PREFIX_VEX_38F3_REG_2): Likewise.
|
| 413 |
|
|
(PREFIX_VEX_38F3_REG_3): Likewise.
|
| 414 |
|
|
(PREFIX_VEX_38F7): Likewise.
|
| 415 |
|
|
(VEX_LEN_38F2_P_0): Likewise.
|
| 416 |
|
|
(VEX_LEN_38F3_R_1_P_0): Likewise.
|
| 417 |
|
|
(VEX_LEN_38F3_R_2_P_0): Likewise.
|
| 418 |
|
|
(VEX_LEN_38F3_R_3_P_0): Likewise.
|
| 419 |
|
|
(VEX_LEN_38F7_P_0): Likewise.
|
| 420 |
|
|
(dis386_twobyte): Use PREFIX_0FBC.
|
| 421 |
|
|
(reg_table): Add REG_VEX_38F3.
|
| 422 |
|
|
(prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2,
|
| 423 |
|
|
PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2,
|
| 424 |
|
|
PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7.
|
| 425 |
|
|
(vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and
|
| 426 |
|
|
PREFIX_VEX_38F7.
|
| 427 |
|
|
(vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0,
|
| 428 |
|
|
VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and
|
| 429 |
|
|
VEX_LEN_38F7_P_0.
|
| 430 |
|
|
|
| 431 |
|
|
* i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS.
|
| 432 |
|
|
(cpu_flags): Add CpuBMI.
|
| 433 |
|
|
|
| 434 |
|
|
* i386-opc.h (CpuBMI): New.
|
| 435 |
|
|
(i386_cpu_flags): Add cpubmi.
|
| 436 |
|
|
|
| 437 |
|
|
* i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt.
|
| 438 |
|
|
* i386-init.h: Regenerated.
|
| 439 |
|
|
* i386-tbl.h: Likewise.
|
| 440 |
|
|
|
| 441 |
|
|
2011-01-04 H.J. Lu
|
| 442 |
|
|
|
| 443 |
|
|
* i386-dis.c (VexGdq): New.
|
| 444 |
|
|
(OP_VEX): Handle dq_mode.
|
| 445 |
|
|
|
| 446 |
|
|
2011-01-01 H.J. Lu
|
| 447 |
|
|
|
| 448 |
|
|
* i386-gen.c (process_copyright): Update copyright to 2011.
|
| 449 |
|
|
|
| 450 |
|
|
For older changes see ChangeLog-2010
|
| 451 |
|
|
|
| 452 |
|
|
Local Variables:
|
| 453 |
|
|
mode: change-log
|
| 454 |
|
|
left-margin: 8
|
| 455 |
|
|
fill-column: 74
|
| 456 |
|
|
version-control: never
|
| 457 |
|
|
End:
|
