1 |
158 |
khays |
2011-08-26 Nick Clifton
|
2 |
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3 |
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* po/es.po: Updated Spanish translation.
|
4 |
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5 |
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|
2011-08-22 Nick Clifton
|
6 |
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|
7 |
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* Makefile.am (CPUDIR): Redfine to point to top level cpu
|
8 |
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directory.
|
9 |
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|
(stamp-frv): Use CPUDIR.
|
10 |
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|
(stamp-iq2000): Likewise.
|
11 |
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|
(stamp-lm32): Likewise.
|
12 |
|
|
(stamp-m32c): Likewise.
|
13 |
|
|
(stamp-mt): Likewise.
|
14 |
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|
(stamp-xc16x): Likewise.
|
15 |
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|
* Makefile.in: Regenerate.
|
16 |
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|
17 |
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2011-08-09 Chao-ying Fu
|
18 |
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Maciej W. Rozycki
|
19 |
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|
20 |
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* mips-dis.c (mips_arch_choices): Enable MCU for "mips32r2"
|
21 |
|
|
and "mips64r2".
|
22 |
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(print_insn_args, print_insn_micromips): Handle MCU.
|
23 |
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* micromips-opc.c (MC): New macro.
|
24 |
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|
(micromips_opcodes): Add "aclr", "aset" and "iret".
|
25 |
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* mips-opc.c (MC): New macro.
|
26 |
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(mips_builtin_opcodes): Add "aclr", "aset" and "iret".
|
27 |
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|
28 |
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2011-08-09 Maciej W. Rozycki
|
29 |
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|
30 |
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* micromips-opc.c (MOD_mb, MOD_mc, MOD_md): Remove macros.
|
31 |
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(MOD_me, MOD_mf, MOD_mg, MOD_mhi, MOD_mj, MOD_ml): Likewise.
|
32 |
|
|
(MOD_mm, MOD_mn, MOD_mp, MOD_mq, MOD_sp): Likewise.
|
33 |
|
|
(WR_mb, RD_mc, RD_md, WR_md, RD_me, RD_mf, WR_mf): New macros.
|
34 |
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(RD_mg, WR_mhi, RD_mj, WR_mj, RD_ml, RD_mmn): Likewise.
|
35 |
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|
(RD_mp, WR_mp, RD_mq, RD_sp, WR_sp): Likewise.
|
36 |
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|
(WR_s): Update macro.
|
37 |
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|
(micromips_opcodes): Update register use flags of: "addiu",
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38 |
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"addiupc", "addiur1sp", "addiur2", "addius5", "addiusp", "addu",
|
39 |
|
|
"and", "andi", "beq", "beqz", "bne", "bnez", "di", "ei", "j",
|
40 |
|
|
"jalr", "jalrs", "jr", "jraddiusp", "jrc", "lbu", "lhu", "li",
|
41 |
|
|
"lui", "lw", "lwm", "mfhi", "mflo", "move", "movep", "not",
|
42 |
|
|
"nor", "or", "ori", "sb", "sh", "sll", "srl", "subu", "sw",
|
43 |
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"swm" and "xor" instructions.
|
44 |
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45 |
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|
2011-08-05 David S. Miller
|
46 |
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|
47 |
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* sparc-dis.c (v9a_ast_reg_names): Add "cps".
|
48 |
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(X_RS3): New macro.
|
49 |
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(print_insn_sparc): Handle '4', '5', and '(' format codes.
|
50 |
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Accept %asr numbers below 28.
|
51 |
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* sparc-opc.c (sparc_opcodes): Add entries for HPC and VIS3
|
52 |
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|
instructions.
|
53 |
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|
54 |
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|
2011-08-02 Quentin Neill
|
55 |
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|
56 |
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* i386-dis.c (xop_table): Remove spurious bextr insn.
|
57 |
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|
58 |
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|
2011-08-01 H.J. Lu
|
59 |
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|
60 |
|
|
PR ld/13048
|
61 |
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* i386-dis.c (print_insn): Optimize info->mach check.
|
62 |
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63 |
|
|
2011-08-01 H.J. Lu
|
64 |
|
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|
65 |
|
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PR gas/13046
|
66 |
|
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* i386-opc.tbl: Add Disp32S to 64bit call.
|
67 |
|
|
* i386-tbl.h: Regenerated.
|
68 |
|
|
|
69 |
|
|
2011-07-24 Chao-ying Fu
|
70 |
|
|
Maciej W. Rozycki
|
71 |
|
|
|
72 |
|
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* micromips-opc.c: New file.
|
73 |
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* mips-dis.c (micromips_to_32_reg_b_map): New array.
|
74 |
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(micromips_to_32_reg_c_map, micromips_to_32_reg_d_map): Likewise.
|
75 |
|
|
(micromips_to_32_reg_e_map, micromips_to_32_reg_f_map): Likewise.
|
76 |
|
|
(micromips_to_32_reg_g_map, micromips_to_32_reg_l_map): Likewise.
|
77 |
|
|
(micromips_to_32_reg_q_map): Likewise.
|
78 |
|
|
(micromips_imm_b_map, micromips_imm_c_map): Likewise.
|
79 |
|
|
(micromips_ase): New variable.
|
80 |
|
|
(is_micromips): New function.
|
81 |
|
|
(set_default_mips_dis_options): Handle microMIPS ASE.
|
82 |
|
|
(print_insn_micromips): New function.
|
83 |
|
|
(is_compressed_mode_p): Likewise.
|
84 |
|
|
(_print_insn_mips): Handle microMIPS instructions.
|
85 |
|
|
* Makefile.am (CFILES): Add micromips-opc.c.
|
86 |
|
|
* configure.in (bfd_mips_arch): Add micromips-opc.lo.
|
87 |
|
|
* Makefile.in: Regenerate.
|
88 |
|
|
* configure: Regenerate.
|
89 |
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|
|
90 |
|
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* mips-dis.c (micromips_to_32_reg_h_map): New variable.
|
91 |
|
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(micromips_to_32_reg_i_map): Likewise.
|
92 |
|
|
(micromips_to_32_reg_m_map): Likewise.
|
93 |
|
|
(micromips_to_32_reg_n_map): New macro.
|
94 |
|
|
|
95 |
|
|
2011-07-24 Maciej W. Rozycki
|
96 |
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|
97 |
|
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* mips-opc.c (NODS): New macro.
|
98 |
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(TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT.
|
99 |
|
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(DSP_VOLA): Likewise.
|
100 |
|
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(mips_builtin_opcodes): Add NODS annotation to "deret" and
|
101 |
|
|
"eret". Replace INSN_SYNC with NODS throughout. Use NODS in
|
102 |
|
|
place of TRAP for "wait", "waiti" and "yield".
|
103 |
|
|
* mips16-opc.c (NODS): New macro.
|
104 |
|
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(TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT.
|
105 |
|
|
(mips16_opcodes): Use NODS in place of TRAP for "jalrc", "jrc",
|
106 |
|
|
"restore" and "save".
|
107 |
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|
108 |
|
|
2011-07-22 H.J. Lu
|
109 |
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|
110 |
|
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* configure.in: Handle bfd_k1om_arch.
|
111 |
|
|
* configure: Regenerated.
|
112 |
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|
113 |
|
|
* disassemble.c (disassembler): Handle bfd_k1om_arch.
|
114 |
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|
115 |
|
|
* i386-dis.c (print_insn): Handle bfd_mach_k1om and
|
116 |
|
|
bfd_mach_k1om_intel_syntax.
|
117 |
|
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|
118 |
|
|
* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to
|
119 |
|
|
~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS.
|
120 |
|
|
(cpu_flags): Add CpuK1OM.
|
121 |
|
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|
122 |
|
|
* i386-opc.h (CpuK1OM): New.
|
123 |
|
|
(i386_cpu_flags): Add cpuk1om.
|
124 |
|
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|
125 |
|
|
* i386-init.h: Regenerated.
|
126 |
|
|
* i386-tbl.h: Likewise.
|
127 |
|
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|
128 |
|
|
2011-07-12 Nick Clifton
|
129 |
|
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|
130 |
|
|
* arm-dis.c (print_insn_arm): Revert previous, undocumented,
|
131 |
|
|
accidental change.
|
132 |
|
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|
133 |
|
|
2011-07-01 Nick Clifton
|
134 |
|
|
|
135 |
|
|
PR binutils/12329
|
136 |
|
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* avr-dis.c (avr_operand): Fix disassembly of ELPM, LPM and SPM
|
137 |
|
|
insns using post-increment addressing.
|
138 |
|
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|
139 |
|
|
2011-06-30 H.J. Lu
|
140 |
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|
141 |
|
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* i386-dis.c (vex_len_table): Update rorxS.
|
142 |
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|
143 |
|
|
2011-06-30 H.J. Lu
|
144 |
|
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|
145 |
|
|
AVX Programming Reference (June, 2011)
|
146 |
|
|
* i386-dis.c (vex_len_table): Correct rorxS.
|
147 |
|
|
|
148 |
|
|
* i386-opc.tbl: Correct rorx.
|
149 |
|
|
* i386-tbl.h: Regenerated.
|
150 |
|
|
|
151 |
|
|
2011-06-29 H.J. Lu
|
152 |
|
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|
153 |
|
|
* tilegx-opc.c (find_opcode): Replace "index" with "i".
|
154 |
|
|
* tilepro-opc.c (find_opcode): Likewise.
|
155 |
|
|
|
156 |
|
|
2011-06-29 Richard Sandiford
|
157 |
|
|
|
158 |
|
|
* mips16-opc.c (jalrc, jrc): Move earlier in file.
|
159 |
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|
160 |
|
|
2011-06-21 H.J. Lu
|
161 |
|
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|
162 |
|
|
* i386-dis.c (prefix_table): Re-indent PREFIX_VEX_0F388C and
|
163 |
|
|
PREFIX_VEX_0F388E.
|
164 |
|
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|
165 |
|
|
2011-06-17 Andreas Schwab
|
166 |
|
|
|
167 |
|
|
* Makefile.am (MAINTAINERCLEANFILES): Move s390-opc.tab ...
|
168 |
|
|
(MOSTLYCLEANFILES): ... here.
|
169 |
|
|
* Makefile.in: Regenerate.
|
170 |
|
|
|
171 |
|
|
2011-06-14 Alan Modra
|
172 |
|
|
|
173 |
|
|
* Makefile.in: Regenerate.
|
174 |
|
|
|
175 |
148 |
khays |
2011-06-13 Walter Lee
|
176 |
|
|
|
177 |
|
|
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
|
178 |
|
|
tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
|
179 |
|
|
* Makefile.in: Regenerate.
|
180 |
|
|
* configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
|
181 |
|
|
* configure: Regenerate.
|
182 |
|
|
* disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
|
183 |
|
|
* po/POTFILES.in: Regenerate.
|
184 |
|
|
* tilegx-dis.c: New file.
|
185 |
|
|
* tilegx-opc.c: New file.
|
186 |
|
|
* tilepro-dis.c: New file.
|
187 |
|
|
* tilepro-opc.c: New file.
|
188 |
|
|
|
189 |
|
|
2011-06-10 H.J. Lu
|
190 |
|
|
|
191 |
|
|
AVX Programming Reference (June, 2011)
|
192 |
|
|
* i386-dis.c (XMGatherQ): New.
|
193 |
|
|
* i386-dis.c (EXxmm_mb): New.
|
194 |
|
|
(EXxmm_mb): Likewise.
|
195 |
|
|
(EXxmm_mw): Likewise.
|
196 |
|
|
(EXxmm_md): Likewise.
|
197 |
|
|
(EXxmm_mq): Likewise.
|
198 |
|
|
(EXxmmdw): Likewise.
|
199 |
|
|
(EXxmmqd): Likewise.
|
200 |
|
|
(VexGatherQ): Likewise.
|
201 |
|
|
(MVexVSIBDWpX): Likewise.
|
202 |
|
|
(MVexVSIBQWpX): Likewise.
|
203 |
|
|
(xmm_mb_mode): Likewise.
|
204 |
|
|
(xmm_mw_mode): Likewise.
|
205 |
|
|
(xmm_md_mode): Likewise.
|
206 |
|
|
(xmm_mq_mode): Likewise.
|
207 |
|
|
(xmmdw_mode): Likewise.
|
208 |
|
|
(xmmqd_mode): Likewise.
|
209 |
|
|
(ymmxmm_mode): Likewise.
|
210 |
|
|
(vex_vsib_d_w_dq_mode): Likewise.
|
211 |
|
|
(vex_vsib_q_w_dq_mode): Likewise.
|
212 |
|
|
(MOD_VEX_0F385A_PREFIX_2): Likewise.
|
213 |
|
|
(MOD_VEX_0F388C_PREFIX_2): Likewise.
|
214 |
|
|
(MOD_VEX_0F388E_PREFIX_2): Likewise.
|
215 |
|
|
(PREFIX_0F3882): Likewise.
|
216 |
|
|
(PREFIX_VEX_0F3816): Likewise.
|
217 |
|
|
(PREFIX_VEX_0F3836): Likewise.
|
218 |
|
|
(PREFIX_VEX_0F3845): Likewise.
|
219 |
|
|
(PREFIX_VEX_0F3846): Likewise.
|
220 |
|
|
(PREFIX_VEX_0F3847): Likewise.
|
221 |
|
|
(PREFIX_VEX_0F3858): Likewise.
|
222 |
|
|
(PREFIX_VEX_0F3859): Likewise.
|
223 |
|
|
(PREFIX_VEX_0F385A): Likewise.
|
224 |
|
|
(PREFIX_VEX_0F3878): Likewise.
|
225 |
|
|
(PREFIX_VEX_0F3879): Likewise.
|
226 |
|
|
(PREFIX_VEX_0F388C): Likewise.
|
227 |
|
|
(PREFIX_VEX_0F388E): Likewise.
|
228 |
|
|
(PREFIX_VEX_0F3890..PREFIX_VEX_0F3893): Likewise.
|
229 |
|
|
(PREFIX_VEX_0F38F5): Likewise.
|
230 |
|
|
(PREFIX_VEX_0F38F6): Likewise.
|
231 |
|
|
(PREFIX_VEX_0F3A00): Likewise.
|
232 |
|
|
(PREFIX_VEX_0F3A01): Likewise.
|
233 |
|
|
(PREFIX_VEX_0F3A02): Likewise.
|
234 |
|
|
(PREFIX_VEX_0F3A38): Likewise.
|
235 |
|
|
(PREFIX_VEX_0F3A39): Likewise.
|
236 |
|
|
(PREFIX_VEX_0F3A46): Likewise.
|
237 |
|
|
(PREFIX_VEX_0F3AF0): Likewise.
|
238 |
|
|
(VEX_LEN_0F3816_P_2): Likewise.
|
239 |
|
|
(VEX_LEN_0F3819_P_2): Likewise.
|
240 |
|
|
(VEX_LEN_0F3836_P_2): Likewise.
|
241 |
|
|
(VEX_LEN_0F385A_P_2_M_0): Likewise.
|
242 |
|
|
(VEX_LEN_0F38F5_P_0): Likewise.
|
243 |
|
|
(VEX_LEN_0F38F5_P_1): Likewise.
|
244 |
|
|
(VEX_LEN_0F38F5_P_3): Likewise.
|
245 |
|
|
(VEX_LEN_0F38F6_P_3): Likewise.
|
246 |
|
|
(VEX_LEN_0F38F7_P_1): Likewise.
|
247 |
|
|
(VEX_LEN_0F38F7_P_2): Likewise.
|
248 |
|
|
(VEX_LEN_0F38F7_P_3): Likewise.
|
249 |
|
|
(VEX_LEN_0F3A00_P_2): Likewise.
|
250 |
|
|
(VEX_LEN_0F3A01_P_2): Likewise.
|
251 |
|
|
(VEX_LEN_0F3A38_P_2): Likewise.
|
252 |
|
|
(VEX_LEN_0F3A39_P_2): Likewise.
|
253 |
|
|
(VEX_LEN_0F3A46_P_2): Likewise.
|
254 |
|
|
(VEX_LEN_0F3AF0_P_3): Likewise.
|
255 |
|
|
(VEX_W_0F3816_P_2): Likewise.
|
256 |
|
|
(VEX_W_0F3818_P_2): Likewise.
|
257 |
|
|
(VEX_W_0F3819_P_2): Likewise.
|
258 |
|
|
(VEX_W_0F3836_P_2): Likewise.
|
259 |
|
|
(VEX_W_0F3846_P_2): Likewise.
|
260 |
|
|
(VEX_W_0F3858_P_2): Likewise.
|
261 |
|
|
(VEX_W_0F3859_P_2): Likewise.
|
262 |
|
|
(VEX_W_0F385A_P_2_M_0): Likewise.
|
263 |
|
|
(VEX_W_0F3878_P_2): Likewise.
|
264 |
|
|
(VEX_W_0F3879_P_2): Likewise.
|
265 |
|
|
(VEX_W_0F3A00_P_2): Likewise.
|
266 |
|
|
(VEX_W_0F3A01_P_2): Likewise.
|
267 |
|
|
(VEX_W_0F3A02_P_2): Likewise.
|
268 |
|
|
(VEX_W_0F3A38_P_2): Likewise.
|
269 |
|
|
(VEX_W_0F3A39_P_2): Likewise.
|
270 |
|
|
(VEX_W_0F3A46_P_2): Likewise.
|
271 |
|
|
(MOD_VEX_0F3818_PREFIX_2): Removed.
|
272 |
|
|
(MOD_VEX_0F3819_PREFIX_2): Likewise.
|
273 |
|
|
(VEX_LEN_0F60_P_2..VEX_LEN_0F6D_P_2): Likewise.
|
274 |
|
|
(VEX_LEN_0F70_P_1..VEX_LEN_0F76_P_2): Likewise.
|
275 |
|
|
(VEX_LEN_0FD1_P_2..VEX_LEN_0FD5_P_2): Likewise.
|
276 |
|
|
(VEX_LEN_0FD7_P_2_M_1..VEX_LEN_0F3819_P_2_M_0): Likewise.
|
277 |
|
|
(VEX_LEN_0F381C_P_2..VEX_LEN_0F3840_P_2): Likewise.
|
278 |
|
|
(VEX_LEN_0F3A0E_P_2): Likewise.
|
279 |
|
|
(VEX_LEN_0F3A0F_P_2): Likewise.
|
280 |
|
|
(VEX_LEN_0F3A42_P_2): Likewise.
|
281 |
|
|
(VEX_LEN_0F3A4C_P_2): Likewise.
|
282 |
|
|
(VEX_W_0F3818_P_2_M_0): Likewise.
|
283 |
|
|
(VEX_W_0F3819_P_2_M_0): Likewise.
|
284 |
|
|
(prefix_table): Updated.
|
285 |
|
|
(three_byte_table): Likewise.
|
286 |
|
|
(vex_table): Likewise.
|
287 |
|
|
(vex_len_table): Likewise.
|
288 |
|
|
(vex_w_table): Likewise.
|
289 |
|
|
(mod_table): Likewise.
|
290 |
|
|
(putop): Handle "LW".
|
291 |
|
|
(intel_operand_size): Handle xmm_mb_mode, xmm_mw_mode,
|
292 |
|
|
xmm_md_mode, xmm_mq_mode, xmmdw_mode, xmmqd_mode, ymmxmm_mode,
|
293 |
|
|
vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode.
|
294 |
|
|
(OP_EX): Likewise.
|
295 |
|
|
(OP_E_memory): Handle vex_vsib_d_w_dq_mode and
|
296 |
|
|
vex_vsib_q_w_dq_mode.
|
297 |
|
|
(OP_XMM): Handle vex_vsib_q_w_dq_mode.
|
298 |
|
|
(OP_VEX): Likewise.
|
299 |
|
|
|
300 |
|
|
* i386-gen.c (cpu_flag_init): Add CpuAVX2 to CPU_ANY_SSE_FLAGS
|
301 |
|
|
and CPU_ANY_AVX_FLAGS. Add CPU_BMI2_FLAGS, CPU_LZCNT_FLAGS,
|
302 |
|
|
CPU_INVPCID_FLAGS and CPU_AVX2_FLAGS.
|
303 |
|
|
(cpu_flags): Add CpuAVX2, CpuBMI2, CpuLZCNT and CpuINVPCID.
|
304 |
|
|
(opcode_modifiers): Add VecSIB.
|
305 |
|
|
|
306 |
|
|
* i386-opc.h (CpuAVX2): New.
|
307 |
|
|
(CpuBMI2): Likewise.
|
308 |
|
|
(CpuLZCNT): Likewise.
|
309 |
|
|
(CpuINVPCID): Likewise.
|
310 |
|
|
(VecSIB128): Likewise.
|
311 |
|
|
(VecSIB256): Likewise.
|
312 |
|
|
(VecSIB): Likewise.
|
313 |
|
|
(i386_cpu_flags): Add cpuavx2, cpubmi2, cpulzcnt and cpuinvpcid.
|
314 |
|
|
(i386_opcode_modifier): Add vecsib.
|
315 |
|
|
|
316 |
|
|
* i386-opc.tbl: Add invpcid, AVX2 and BMI2 instructions.
|
317 |
|
|
* i386-init.h: Regenerated.
|
318 |
|
|
* i386-tbl.h: Likewise.
|
319 |
|
|
|
320 |
|
|
2011-06-03 Quentin Neill
|
321 |
|
|
|
322 |
|
|
* i386-gen.c (cpu_flag_init): Add CpuF16C to CPU_BDVER2_FLAGS.
|
323 |
|
|
* i386-init.h: Regenerated.
|
324 |
|
|
|
325 |
18 |
khays |
2011-06-03 Nick Clifton
|
326 |
|
|
|
327 |
|
|
PR binutils/12752
|
328 |
|
|
* arm-dis.c (print_insn_coprocessor): Use bfd_vma type for
|
329 |
|
|
computing address offsets.
|
330 |
|
|
(print_arm_address): Likewise.
|
331 |
|
|
(print_insn_arm): Likewise.
|
332 |
|
|
(print_insn_thumb16): Likewise.
|
333 |
|
|
(print_insn_thumb32): Likewise.
|
334 |
|
|
|
335 |
|
|
2011-06-02 Jie Zhang
|
336 |
|
|
Nathan Sidwell
|
337 |
|
|
Maciej Rozycki
|
338 |
|
|
|
339 |
|
|
* arm-dis.c (print_insn_coprocessor): Explicitly print #-0
|
340 |
|
|
as address offset.
|
341 |
|
|
(print_arm_address): Likewise. Elide positive #0 appropriately.
|
342 |
|
|
(print_insn_arm): Likewise.
|
343 |
|
|
|
344 |
|
|
2011-06-02 Nick Clifton
|
345 |
|
|
|
346 |
|
|
PR gas/12752
|
347 |
|
|
* arm-dis.c (print_insn_thumb32): Do not sign extend addresses
|
348 |
|
|
passed to print_address_func.
|
349 |
|
|
|
350 |
|
|
2011-06-02 Nick Clifton
|
351 |
|
|
|
352 |
|
|
* arm-dis.c: Fix spelling mistakes.
|
353 |
|
|
* op/opcodes.pot: Regenerate.
|
354 |
|
|
|
355 |
|
|
2011-05-24 Andreas Krebbel
|
356 |
|
|
|
357 |
|
|
* s390-opc.c: Replace S390_OPERAND_REG_EVEN with
|
358 |
|
|
S390_OPERAND_REG_PAIR. Fix INSTR_RRF_0UFEF instruction type.
|
359 |
|
|
* s390-opc.txt: Fix cxr instruction type.
|
360 |
|
|
|
361 |
|
|
2011-05-24 Andreas Krebbel
|
362 |
|
|
|
363 |
|
|
* s390-opc.c: Add new instruction types marking register pair
|
364 |
|
|
operands.
|
365 |
|
|
* s390-opc.txt: Match instructions having register pair operands
|
366 |
|
|
to the new instruction types.
|
367 |
|
|
|
368 |
|
|
2011-05-19 Nick Clifton
|
369 |
|
|
|
370 |
|
|
* v850-opc.c (cmpf.[sd]): Reverse the order of the reg1 and reg2
|
371 |
|
|
operands.
|
372 |
|
|
|
373 |
|
|
2011-05-10 Quentin Neill
|
374 |
|
|
|
375 |
|
|
* i386-gen.c (cpu_flag_init): Add new CPU_BDVER2_FLAGS.
|
376 |
|
|
* i386-init.h: Regenerated.
|
377 |
|
|
|
378 |
|
|
2011-04-27 Nick Clifton
|
379 |
|
|
|
380 |
|
|
* po/da.po: Updated Danish translation.
|
381 |
|
|
|
382 |
|
|
2011-04-26 Anton Blanchard
|
383 |
|
|
|
384 |
|
|
* ppc-opc.c: (powerpc_opcodes): Enable icswx for POWER7.
|
385 |
|
|
|
386 |
|
|
2011-04-21 DJ Delorie
|
387 |
|
|
|
388 |
|
|
* rx-decode.opc (rx_decode_opcode): Set the syntax for multi-byte NOPs.
|
389 |
|
|
* rx-decode.c: Regenerate.
|
390 |
|
|
|
391 |
|
|
2011-04-20 H.J. Lu
|
392 |
|
|
|
393 |
|
|
* i386-init.h: Regenerated.
|
394 |
|
|
|
395 |
|
|
2011-04-19 Quentin Neill
|
396 |
|
|
|
397 |
|
|
* i386-gen.c (cpu_flag_init): Remove 3dnow and 3dnowa bits
|
398 |
|
|
from bdver1 flags.
|
399 |
|
|
|
400 |
|
|
2011-04-13 Nick Clifton
|
401 |
|
|
|
402 |
|
|
* v850-dis.c (disassemble): Always print a closing square brace if
|
403 |
|
|
an opening square brace was printed.
|
404 |
|
|
|
405 |
|
|
2011-04-12 Nick Clifton
|
406 |
|
|
|
407 |
|
|
PR binutils/12534
|
408 |
|
|
* arm-dis.c (thumb32_opcodes): Add %L suffix to LDRD and STRD insn
|
409 |
|
|
patterns.
|
410 |
|
|
(print_insn_thumb32): Handle %L.
|
411 |
|
|
|
412 |
|
|
2011-04-11 Julian Brown
|
413 |
|
|
|
414 |
|
|
* arm-dis.c (psr_name): Fix typo for BASEPRI_MAX.
|
415 |
|
|
(print_insn_thumb32): Add APSR bitmask support.
|
416 |
|
|
|
417 |
|
|
2011-04-07 Paul Carroll
|
418 |
|
|
|
419 |
|
|
* arm-dis.c (print_insn): init vars moved into private_data structure.
|
420 |
|
|
|
421 |
|
|
2011-03-24 Mike Frysinger
|
422 |
|
|
|
423 |
|
|
* bfin-dis.c (decode_dsp32mac_0): Move MM zeroing down to MAC0 logic.
|
424 |
|
|
|
425 |
|
|
2011-03-22 Eric B. Weddington
|
426 |
|
|
|
427 |
|
|
* avr-dis.c (avr_operand): Add opcode_str parameter. Check for
|
428 |
|
|
post-increment to support LPM Z+ instruction. Add support for 'E'
|
429 |
|
|
constraint for DES instruction.
|
430 |
|
|
(print_insn_avr): Adjust calls to avr_operand. Rename variable.
|
431 |
|
|
|
432 |
|
|
2011-03-14 Richard Sandiford
|
433 |
|
|
|
434 |
|
|
* arm-dis.c (get_sym_code_type): Treat STT_GNU_IFUNCs as code.
|
435 |
|
|
|
436 |
|
|
2011-03-14 Richard Sandiford
|
437 |
|
|
|
438 |
|
|
* arm-dis.c (get_sym_code_type): Don't check for STT_ARM_TFUNC.
|
439 |
|
|
Use branch types instead.
|
440 |
|
|
(print_insn): Likewise.
|
441 |
|
|
|
442 |
|
|
2011-02-28 Maciej W. Rozycki
|
443 |
|
|
|
444 |
|
|
* mips-opc.c (mips_builtin_opcodes): Correct register use
|
445 |
|
|
annotation of "alnv.ps".
|
446 |
|
|
|
447 |
|
|
2011-02-28 Maciej W. Rozycki
|
448 |
|
|
|
449 |
|
|
* mips-opc.c (mips_builtin_opcodes): Add "pref" macro.
|
450 |
|
|
|
451 |
|
|
2011-02-22 Mike Frysinger
|
452 |
|
|
|
453 |
|
|
* bfin-dis.c (OUTS): Remove p NULL check and txt NUL check.
|
454 |
|
|
|
455 |
|
|
2011-02-22 Mike Frysinger
|
456 |
|
|
|
457 |
|
|
* bfin-dis.c (print_insn_bfin): Change outf->fprintf_func to OUTS.
|
458 |
|
|
|
459 |
|
|
2011-02-19 Mike Frysinger
|
460 |
|
|
|
461 |
|
|
* bfin-dis.c (saved_state): Mark static. Change a[01]x to ax[] and
|
462 |
|
|
a[01]w to aw[]. Delete ac0, ac0_copy, ac1, an, aq, av0, av0s, av1,
|
463 |
|
|
av1s, az, cc, v, v_copy, vs, rnd_mod, v_internal, pc, ticks, insts,
|
464 |
|
|
exception, end_of_registers, msize, memory, bfd_mach.
|
465 |
|
|
(CCREG, PCREG, A0XREG, A0WREG, A1XREG, A1WREG, LC0REG, LT0REG,
|
466 |
|
|
LB0REG, LC1REG, LT1REG, LB1REG): Delete
|
467 |
|
|
(AXREG, AWREG, LCREG, LTREG, LBREG): Define.
|
468 |
|
|
(get_allreg): Change to new defines. Fallback to abort().
|
469 |
|
|
|
470 |
|
|
2011-02-14 Mike Frysinger
|
471 |
|
|
|
472 |
|
|
* bfin-dis.c: Add whitespace/parenthesis where needed.
|
473 |
|
|
|
474 |
|
|
2011-02-14 Mike Frysinger
|
475 |
|
|
|
476 |
|
|
* bfin-dis.c (decode_LoopSetup_0): Return when reg is greater
|
477 |
|
|
than 7.
|
478 |
|
|
|
479 |
|
|
2011-02-13 Ralf Wildenhues
|
480 |
|
|
|
481 |
|
|
* configure: Regenerate.
|
482 |
|
|
|
483 |
|
|
2011-02-13 Mike Frysinger
|
484 |
|
|
|
485 |
|
|
* bfin-dis.c (decode_dsp32alu_0): Fix typo with A1 reg.
|
486 |
|
|
|
487 |
|
|
2011-02-13 Mike Frysinger
|
488 |
|
|
|
489 |
|
|
* bfin-dis.c (decode_dsp32mult_0): Add 1 to dst for mac1. Output
|
490 |
|
|
dregs only when P is set, and dregs_lo otherwise.
|
491 |
|
|
|
492 |
|
|
2011-02-13 Mike Frysinger
|
493 |
|
|
|
494 |
|
|
* bfin-dis.c (decode_dsp32alu_0): Delete BYTEOP2M code.
|
495 |
|
|
|
496 |
|
|
2011-02-12 Mike Frysinger
|
497 |
|
|
|
498 |
|
|
* bfin-dis.c (decode_pseudoDEBUG_0): Add space after PRNT.
|
499 |
|
|
|
500 |
|
|
2011-02-12 Mike Frysinger
|
501 |
|
|
|
502 |
|
|
* bfin-dis.c (machine_registers): Delete REG_GP.
|
503 |
|
|
(reg_names): Delete "GP".
|
504 |
|
|
(decode_allregs): Change REG_GP to REG_LASTREG.
|
505 |
|
|
|
506 |
|
|
2011-02-12 Mike Frysinger
|
507 |
|
|
|
508 |
|
|
* bfin-dis.c (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2,
|
509 |
|
|
M_IH, M_IU): Delete.
|
510 |
|
|
|
511 |
|
|
2011-02-11 Mike Frysinger
|
512 |
|
|
|
513 |
|
|
* bfin-dis.c (reg_names): Add const.
|
514 |
|
|
(decode_dregs_lo, decode_dregs_hi, decode_dregs, decode_dregs_byte,
|
515 |
|
|
decode_pregs, decode_iregs, decode_mregs, decode_dpregs, decode_gregs,
|
516 |
|
|
decode_regs, decode_regs_lo, decode_regs_hi, decode_statbits,
|
517 |
|
|
decode_counters, decode_allregs): Likewise.
|
518 |
|
|
|
519 |
|
|
2011-02-09 Michael Snyder
|
520 |
|
|
|
521 |
158 |
khays |
* i386-dis.c (OP_J): Parenthesize expression to prevent
|
522 |
18 |
khays |
truncated addresses.
|
523 |
|
|
(print_insn): Fix indentation off-by-one.
|
524 |
|
|
|
525 |
|
|
2011-02-01 Nick Clifton
|
526 |
|
|
|
527 |
|
|
* po/da.po: Updated Danish translation.
|
528 |
|
|
|
529 |
|
|
2011-01-21 Dave Murphy
|
530 |
|
|
|
531 |
|
|
* ppc-opc.c (NON32, NO371): Remove PPC_OPCODE_PPCPS.
|
532 |
|
|
|
533 |
|
|
2011-01-18 H.J. Lu
|
534 |
|
|
|
535 |
|
|
* i386-dis.c (sIbT): New.
|
536 |
|
|
(b_T_mode): Likewise.
|
537 |
|
|
(dis386): Replace sIb with sIbT on "pushT".
|
538 |
|
|
(x86_64_table): Replace sIb with Ib on "aam" and "aad".
|
539 |
|
|
(OP_sI): Handle b_T_mode. Properly sign-extend byte.
|
540 |
|
|
|
541 |
|
|
2011-01-18 Jan Kratochvil
|
542 |
|
|
|
543 |
|
|
* i386-init.h: Regenerated.
|
544 |
|
|
* i386-tbl.h: Regenerated
|
545 |
|
|
|
546 |
|
|
2011-01-17 Quentin Neill
|
547 |
|
|
|
548 |
|
|
* i386-dis.c (REG_XOP_TBM_01): New.
|
549 |
|
|
(REG_XOP_TBM_02): New.
|
550 |
|
|
(reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables.
|
551 |
|
|
(xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02
|
552 |
|
|
entries, and add bextr instruction.
|
553 |
|
|
|
554 |
|
|
* i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM.
|
555 |
|
|
(cpu_flags): Add CpuTBM.
|
556 |
|
|
|
557 |
|
|
* i386-opc.h (CpuTBM) New.
|
558 |
|
|
(i386_cpu_flags): Add bit cputbm.
|
559 |
|
|
|
560 |
|
|
* i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk,
|
561 |
|
|
blcs, blsfill, blsic, t1mskc, and tzmsk.
|
562 |
|
|
|
563 |
|
|
2011-01-12 DJ Delorie
|
564 |
|
|
|
565 |
|
|
* rx-dis.c (print_insn_rx): Support RX_Operand_TwoReg.
|
566 |
|
|
|
567 |
|
|
2011-01-11 Mingjie Xing
|
568 |
|
|
|
569 |
|
|
* mips-dis.c (print_insn_args): Adjust the value to print the real
|
570 |
|
|
offset for "+c" argument.
|
571 |
|
|
|
572 |
|
|
2011-01-10 Nick Clifton
|
573 |
|
|
|
574 |
|
|
* po/da.po: Updated Danish translation.
|
575 |
|
|
|
576 |
|
|
2011-01-05 Nathan Sidwell
|
577 |
|
|
|
578 |
|
|
* arm-dis.c (thumb32_opcodes): BLX must have bit zero clear.
|
579 |
|
|
|
580 |
|
|
2011-01-04 H.J. Lu
|
581 |
|
|
|
582 |
|
|
* i386-dis.c (REG_VEX_38F3): New.
|
583 |
|
|
(PREFIX_0FBC): Likewise.
|
584 |
|
|
(PREFIX_VEX_38F2): Likewise.
|
585 |
|
|
(PREFIX_VEX_38F3_REG_1): Likewise.
|
586 |
|
|
(PREFIX_VEX_38F3_REG_2): Likewise.
|
587 |
|
|
(PREFIX_VEX_38F3_REG_3): Likewise.
|
588 |
|
|
(PREFIX_VEX_38F7): Likewise.
|
589 |
|
|
(VEX_LEN_38F2_P_0): Likewise.
|
590 |
|
|
(VEX_LEN_38F3_R_1_P_0): Likewise.
|
591 |
|
|
(VEX_LEN_38F3_R_2_P_0): Likewise.
|
592 |
|
|
(VEX_LEN_38F3_R_3_P_0): Likewise.
|
593 |
|
|
(VEX_LEN_38F7_P_0): Likewise.
|
594 |
|
|
(dis386_twobyte): Use PREFIX_0FBC.
|
595 |
|
|
(reg_table): Add REG_VEX_38F3.
|
596 |
|
|
(prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2,
|
597 |
|
|
PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2,
|
598 |
|
|
PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7.
|
599 |
|
|
(vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and
|
600 |
|
|
PREFIX_VEX_38F7.
|
601 |
|
|
(vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0,
|
602 |
|
|
VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and
|
603 |
|
|
VEX_LEN_38F7_P_0.
|
604 |
|
|
|
605 |
|
|
* i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS.
|
606 |
|
|
(cpu_flags): Add CpuBMI.
|
607 |
|
|
|
608 |
|
|
* i386-opc.h (CpuBMI): New.
|
609 |
|
|
(i386_cpu_flags): Add cpubmi.
|
610 |
|
|
|
611 |
|
|
* i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt.
|
612 |
|
|
* i386-init.h: Regenerated.
|
613 |
|
|
* i386-tbl.h: Likewise.
|
614 |
|
|
|
615 |
|
|
2011-01-04 H.J. Lu
|
616 |
|
|
|
617 |
|
|
* i386-dis.c (VexGdq): New.
|
618 |
|
|
(OP_VEX): Handle dq_mode.
|
619 |
|
|
|
620 |
|
|
2011-01-01 H.J. Lu
|
621 |
|
|
|
622 |
|
|
* i386-gen.c (process_copyright): Update copyright to 2011.
|
623 |
|
|
|
624 |
|
|
For older changes see ChangeLog-2010
|
625 |
|
|
|
626 |
|
|
Local Variables:
|
627 |
|
|
mode: change-log
|
628 |
|
|
left-margin: 8
|
629 |
|
|
fill-column: 74
|
630 |
|
|
version-control: never
|
631 |
|
|
End:
|