| 1 |
163 |
khays |
2011-11-02 Nick Clifton
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| 2 |
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| 3 |
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* po/it.po: New Italian translation.
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| 4 |
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* configure.in (ALL_LINGUAS): Add it.
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| 5 |
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* configure: Regenerate.
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| 6 |
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* po/opcodes.pot: Regenerate.
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| 7 |
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| 8 |
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2011-11-01 DJ Delorie
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| 9 |
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| 10 |
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* Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and
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| 11 |
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rl78-dis.c.
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| 12 |
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(MAINTAINERCLEANFILES): Add rl78-decode.c.
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| 13 |
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(rl78-decode.c): New rule, built from rl78-decode.opc and opc2c.
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| 14 |
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* Makefile.in: Regenerate.
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| 15 |
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* configure.in: Add bfd_rl78_arch case.
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| 16 |
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* configure: Regenerate.
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| 17 |
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* disassemble.c: Define ARCH_rl78.
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| 18 |
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(disassembler): Add ARCH_rl78 case.
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| 19 |
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* rl78-decode.c: New file.
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| 20 |
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* rl78-decode.opc: New file.
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| 21 |
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* rl78-dis.c: New file.
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| 22 |
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| 23 |
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2011-10-27 Peter Bergner
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| 24 |
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| 25 |
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* ppc-opc.c (powerpc_opcodes)
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| 26 |
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dctqpq., dctfixq, dctfixq., dxexq, dxexq., dtstsfq, dcffixq, dcffixq.,
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| 27 |
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diexq, diexq.>: Use FRT, FRA, FRB and FRBp repsectively on DFP quad
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| 28 |
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instructions.
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| 29 |
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| 30 |
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2011-10-26 Nick Clifton
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| 31 |
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| 32 |
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PR binutils/13348
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| 33 |
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* i386-dis.c (print_insn): Fix testing of array subscript.
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| 34 |
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| 35 |
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2011-10-26 Joern Rennecke
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| 36 |
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| 37 |
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* disassemble.c (ARCH_epiphany): Move into alphasorted spot.
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| 38 |
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* epiphany-asm.c, epiphany-opc.h: Regenerate.
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| 39 |
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| 40 |
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2011-10-25 Joern Rennecke
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| 41 |
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| 42 |
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* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
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| 43 |
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(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
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| 44 |
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epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
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| 45 |
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(CLEANFILES): Add stamp-epiphany.
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| 46 |
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(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
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| 47 |
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(stamp-epiphany): New rule.
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| 48 |
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* configure.in: Handle bfd_epiphany_arch.
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| 49 |
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* disassemble.c (ARCH_epiphany): Define.
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| 50 |
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(disassembler): Handle bfd_arch_epiphany.
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| 51 |
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* epiphany-asm.c: New file.
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| 52 |
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* epiphany-desc.c: New file.
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| 53 |
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* epiphany-desc.h: New file.
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| 54 |
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* epiphany-dis.c: New file.
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| 55 |
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* epiphany-ibld.c: New file.
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| 56 |
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* epiphany-opc.c: New file.
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| 57 |
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* epiphany-opc.h: New file.
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| 58 |
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* Makefile.in: Regenerate.
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| 59 |
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* configure: Regenerate.
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| 60 |
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* po/POTFILES.in: Regenerate.
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| 61 |
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* po/opcodes.pot: Regenerate.
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| 62 |
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| 63 |
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2011-10-24 Julian Brown
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| 64 |
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| 65 |
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* m68k-opc.c (m68k_opcodes): Fix entries for ColdFire moveml.
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| 66 |
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| 67 |
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2011-10-21 Jan Glauber
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| 68 |
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| 69 |
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* s390-opc.txt: Add CPUMF instructions.
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| 70 |
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| 71 |
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2011-10-18 Jie Zhang
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| 72 |
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Julian Brown
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| 73 |
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| 74 |
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* arm-dis.c (print_insn_arm): Explicitly specify rotation if needed.
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| 75 |
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| 76 |
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2011-10-10 Nick Clifton
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| 77 |
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| 78 |
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* po/es.po: Updated Spanish translation.
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| 79 |
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* po/fi.po: Updated Finnish translation.
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| 80 |
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| 81 |
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2011-09-28 Jan Beulich
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| 82 |
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| 83 |
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* ppc-opc.c (insert_nbi, insert_rbx, FRAp, FRBp, FRSp, FRTp, NBI, RAX,
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| 84 |
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RBX): New.
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| 85 |
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(insert_bo, insert_boe): Reject bcctr with bit 2 in bo unset.
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| 86 |
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(powerpc_opcodes): Use RAX for second and RBXC for third operand of
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| 87 |
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lswx. Use NBI for third operand of lswi. Use FRTp for first operand of
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| 88 |
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lfdp and lfdpx. Use FRSp for first operand of stfdp and stfdpx, and
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| 89 |
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mark them as invalid on POWER7. Use FRTp, FRAp, and FRBp repsectively
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| 90 |
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on DFP quad instructions.
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| 91 |
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| 92 |
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2011-09-27 David S. Miller
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| 93 |
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| 94 |
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* sparc-opc.c (sparc_opcodes): Fix random instruction to write
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| 95 |
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to a float instead of an integer register.
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| 96 |
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| 97 |
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2011-09-26 David S. Miller
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| 98 |
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| 99 |
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* sparc-opc.c (sparc_opcodes): Add integer multiply-add
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| 100 |
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instructions.
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| 101 |
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| 102 |
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2011-09-21 David S. Miller
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| 103 |
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| 104 |
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* sparc-opc.c (sparc_opcodes): Annotate table with HWCAP flag
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| 105 |
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bits. Fix "fchksm16" mnemonic.
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| 106 |
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| 107 |
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2011-09-08 Mark Fortescue
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| 108 |
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| 109 |
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The changes below bring 'mov' and 'ticc' instructions into line
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| 110 |
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with the V8 SPARC Architecture Manual.
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| 111 |
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* sparc-opc.c (sparc_opcodes): Add entry for 'ticc imm + regrs1'.
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| 112 |
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* sparc-opc.c (sparc_opcodes): Add alias entries for
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| 113 |
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'mov regrs2,%asrX'; 'mov regrs2,%y'; 'mov regrs2,%prs';
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| 114 |
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'mov regrs2,%wim' and 'mov regrs2,%tbr'.
|
| 115 |
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* sparc-opc.c (sparc_opcodes): Move/Change entries for
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| 116 |
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'mov imm,%asrX'; 'mov imm,%y'; 'mov imm,%prs'; 'mov imm,%wim'
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| 117 |
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and 'mov imm,%tbr'.
|
| 118 |
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* sparc-opc.c (sparc_opcodes): Add wr alias entries to match above
|
| 119 |
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mov aliases.
|
| 120 |
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| 121 |
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* sparc-opc.c (sparc_opcodes): Add entry for 'save simm13,regrs1,regrd'
|
| 122 |
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This has been reported as being accepted by the Sun assmebler.
|
| 123 |
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| 124 |
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2011-09-08 David S. Miller
|
| 125 |
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| 126 |
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* sparc-opc.c (pdistn): Destination is integer not float register.
|
| 127 |
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| 128 |
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2011-09-07 Andreas Schwab
|
| 129 |
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| 130 |
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PR gas/13145
|
| 131 |
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* m68k-opc.c: Use "y" in moveml pattern for mcfisa_a.
|
| 132 |
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| 133 |
158 |
khays |
2011-08-26 Nick Clifton
|
| 134 |
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| 135 |
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* po/es.po: Updated Spanish translation.
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| 136 |
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| 137 |
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2011-08-22 Nick Clifton
|
| 138 |
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| 139 |
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* Makefile.am (CPUDIR): Redfine to point to top level cpu
|
| 140 |
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directory.
|
| 141 |
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(stamp-frv): Use CPUDIR.
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| 142 |
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(stamp-iq2000): Likewise.
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| 143 |
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(stamp-lm32): Likewise.
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| 144 |
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(stamp-m32c): Likewise.
|
| 145 |
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(stamp-mt): Likewise.
|
| 146 |
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(stamp-xc16x): Likewise.
|
| 147 |
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* Makefile.in: Regenerate.
|
| 148 |
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| 149 |
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2011-08-09 Chao-ying Fu
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| 150 |
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Maciej W. Rozycki
|
| 151 |
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| 152 |
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* mips-dis.c (mips_arch_choices): Enable MCU for "mips32r2"
|
| 153 |
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and "mips64r2".
|
| 154 |
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(print_insn_args, print_insn_micromips): Handle MCU.
|
| 155 |
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* micromips-opc.c (MC): New macro.
|
| 156 |
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(micromips_opcodes): Add "aclr", "aset" and "iret".
|
| 157 |
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* mips-opc.c (MC): New macro.
|
| 158 |
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(mips_builtin_opcodes): Add "aclr", "aset" and "iret".
|
| 159 |
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| 160 |
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2011-08-09 Maciej W. Rozycki
|
| 161 |
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| 162 |
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* micromips-opc.c (MOD_mb, MOD_mc, MOD_md): Remove macros.
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| 163 |
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(MOD_me, MOD_mf, MOD_mg, MOD_mhi, MOD_mj, MOD_ml): Likewise.
|
| 164 |
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(MOD_mm, MOD_mn, MOD_mp, MOD_mq, MOD_sp): Likewise.
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| 165 |
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(WR_mb, RD_mc, RD_md, WR_md, RD_me, RD_mf, WR_mf): New macros.
|
| 166 |
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(RD_mg, WR_mhi, RD_mj, WR_mj, RD_ml, RD_mmn): Likewise.
|
| 167 |
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(RD_mp, WR_mp, RD_mq, RD_sp, WR_sp): Likewise.
|
| 168 |
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(WR_s): Update macro.
|
| 169 |
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(micromips_opcodes): Update register use flags of: "addiu",
|
| 170 |
|
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"addiupc", "addiur1sp", "addiur2", "addius5", "addiusp", "addu",
|
| 171 |
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"and", "andi", "beq", "beqz", "bne", "bnez", "di", "ei", "j",
|
| 172 |
|
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"jalr", "jalrs", "jr", "jraddiusp", "jrc", "lbu", "lhu", "li",
|
| 173 |
|
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"lui", "lw", "lwm", "mfhi", "mflo", "move", "movep", "not",
|
| 174 |
|
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"nor", "or", "ori", "sb", "sh", "sll", "srl", "subu", "sw",
|
| 175 |
|
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"swm" and "xor" instructions.
|
| 176 |
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| 177 |
|
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2011-08-05 David S. Miller
|
| 178 |
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| 179 |
|
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* sparc-dis.c (v9a_ast_reg_names): Add "cps".
|
| 180 |
|
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(X_RS3): New macro.
|
| 181 |
|
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(print_insn_sparc): Handle '4', '5', and '(' format codes.
|
| 182 |
|
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Accept %asr numbers below 28.
|
| 183 |
|
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* sparc-opc.c (sparc_opcodes): Add entries for HPC and VIS3
|
| 184 |
|
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instructions.
|
| 185 |
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|
| 186 |
|
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2011-08-02 Quentin Neill
|
| 187 |
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|
| 188 |
|
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* i386-dis.c (xop_table): Remove spurious bextr insn.
|
| 189 |
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|
| 190 |
|
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2011-08-01 H.J. Lu
|
| 191 |
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| 192 |
|
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PR ld/13048
|
| 193 |
|
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* i386-dis.c (print_insn): Optimize info->mach check.
|
| 194 |
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| 195 |
|
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2011-08-01 H.J. Lu
|
| 196 |
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| 197 |
|
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PR gas/13046
|
| 198 |
|
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* i386-opc.tbl: Add Disp32S to 64bit call.
|
| 199 |
|
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* i386-tbl.h: Regenerated.
|
| 200 |
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| 201 |
|
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2011-07-24 Chao-ying Fu
|
| 202 |
|
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Maciej W. Rozycki
|
| 203 |
|
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| 204 |
|
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* micromips-opc.c: New file.
|
| 205 |
|
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* mips-dis.c (micromips_to_32_reg_b_map): New array.
|
| 206 |
|
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(micromips_to_32_reg_c_map, micromips_to_32_reg_d_map): Likewise.
|
| 207 |
|
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(micromips_to_32_reg_e_map, micromips_to_32_reg_f_map): Likewise.
|
| 208 |
|
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(micromips_to_32_reg_g_map, micromips_to_32_reg_l_map): Likewise.
|
| 209 |
|
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(micromips_to_32_reg_q_map): Likewise.
|
| 210 |
|
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(micromips_imm_b_map, micromips_imm_c_map): Likewise.
|
| 211 |
|
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(micromips_ase): New variable.
|
| 212 |
|
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(is_micromips): New function.
|
| 213 |
|
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(set_default_mips_dis_options): Handle microMIPS ASE.
|
| 214 |
|
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(print_insn_micromips): New function.
|
| 215 |
|
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(is_compressed_mode_p): Likewise.
|
| 216 |
|
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(_print_insn_mips): Handle microMIPS instructions.
|
| 217 |
|
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* Makefile.am (CFILES): Add micromips-opc.c.
|
| 218 |
|
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* configure.in (bfd_mips_arch): Add micromips-opc.lo.
|
| 219 |
|
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* Makefile.in: Regenerate.
|
| 220 |
|
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* configure: Regenerate.
|
| 221 |
|
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|
| 222 |
|
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* mips-dis.c (micromips_to_32_reg_h_map): New variable.
|
| 223 |
|
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(micromips_to_32_reg_i_map): Likewise.
|
| 224 |
|
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(micromips_to_32_reg_m_map): Likewise.
|
| 225 |
|
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(micromips_to_32_reg_n_map): New macro.
|
| 226 |
|
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|
| 227 |
|
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2011-07-24 Maciej W. Rozycki
|
| 228 |
|
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|
| 229 |
|
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* mips-opc.c (NODS): New macro.
|
| 230 |
|
|
(TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT.
|
| 231 |
|
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(DSP_VOLA): Likewise.
|
| 232 |
|
|
(mips_builtin_opcodes): Add NODS annotation to "deret" and
|
| 233 |
|
|
"eret". Replace INSN_SYNC with NODS throughout. Use NODS in
|
| 234 |
|
|
place of TRAP for "wait", "waiti" and "yield".
|
| 235 |
|
|
* mips16-opc.c (NODS): New macro.
|
| 236 |
|
|
(TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT.
|
| 237 |
|
|
(mips16_opcodes): Use NODS in place of TRAP for "jalrc", "jrc",
|
| 238 |
|
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"restore" and "save".
|
| 239 |
|
|
|
| 240 |
|
|
2011-07-22 H.J. Lu
|
| 241 |
|
|
|
| 242 |
|
|
* configure.in: Handle bfd_k1om_arch.
|
| 243 |
|
|
* configure: Regenerated.
|
| 244 |
|
|
|
| 245 |
|
|
* disassemble.c (disassembler): Handle bfd_k1om_arch.
|
| 246 |
|
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|
| 247 |
|
|
* i386-dis.c (print_insn): Handle bfd_mach_k1om and
|
| 248 |
|
|
bfd_mach_k1om_intel_syntax.
|
| 249 |
|
|
|
| 250 |
|
|
* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to
|
| 251 |
|
|
~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS.
|
| 252 |
|
|
(cpu_flags): Add CpuK1OM.
|
| 253 |
|
|
|
| 254 |
|
|
* i386-opc.h (CpuK1OM): New.
|
| 255 |
|
|
(i386_cpu_flags): Add cpuk1om.
|
| 256 |
|
|
|
| 257 |
|
|
* i386-init.h: Regenerated.
|
| 258 |
|
|
* i386-tbl.h: Likewise.
|
| 259 |
|
|
|
| 260 |
|
|
2011-07-12 Nick Clifton
|
| 261 |
|
|
|
| 262 |
|
|
* arm-dis.c (print_insn_arm): Revert previous, undocumented,
|
| 263 |
|
|
accidental change.
|
| 264 |
|
|
|
| 265 |
|
|
2011-07-01 Nick Clifton
|
| 266 |
|
|
|
| 267 |
|
|
PR binutils/12329
|
| 268 |
|
|
* avr-dis.c (avr_operand): Fix disassembly of ELPM, LPM and SPM
|
| 269 |
|
|
insns using post-increment addressing.
|
| 270 |
|
|
|
| 271 |
|
|
2011-06-30 H.J. Lu
|
| 272 |
|
|
|
| 273 |
|
|
* i386-dis.c (vex_len_table): Update rorxS.
|
| 274 |
|
|
|
| 275 |
|
|
2011-06-30 H.J. Lu
|
| 276 |
|
|
|
| 277 |
|
|
AVX Programming Reference (June, 2011)
|
| 278 |
|
|
* i386-dis.c (vex_len_table): Correct rorxS.
|
| 279 |
|
|
|
| 280 |
|
|
* i386-opc.tbl: Correct rorx.
|
| 281 |
|
|
* i386-tbl.h: Regenerated.
|
| 282 |
|
|
|
| 283 |
|
|
2011-06-29 H.J. Lu
|
| 284 |
|
|
|
| 285 |
|
|
* tilegx-opc.c (find_opcode): Replace "index" with "i".
|
| 286 |
|
|
* tilepro-opc.c (find_opcode): Likewise.
|
| 287 |
|
|
|
| 288 |
|
|
2011-06-29 Richard Sandiford
|
| 289 |
|
|
|
| 290 |
|
|
* mips16-opc.c (jalrc, jrc): Move earlier in file.
|
| 291 |
|
|
|
| 292 |
|
|
2011-06-21 H.J. Lu
|
| 293 |
|
|
|
| 294 |
|
|
* i386-dis.c (prefix_table): Re-indent PREFIX_VEX_0F388C and
|
| 295 |
|
|
PREFIX_VEX_0F388E.
|
| 296 |
|
|
|
| 297 |
|
|
2011-06-17 Andreas Schwab
|
| 298 |
|
|
|
| 299 |
|
|
* Makefile.am (MAINTAINERCLEANFILES): Move s390-opc.tab ...
|
| 300 |
|
|
(MOSTLYCLEANFILES): ... here.
|
| 301 |
|
|
* Makefile.in: Regenerate.
|
| 302 |
|
|
|
| 303 |
|
|
2011-06-14 Alan Modra
|
| 304 |
|
|
|
| 305 |
|
|
* Makefile.in: Regenerate.
|
| 306 |
|
|
|
| 307 |
148 |
khays |
2011-06-13 Walter Lee
|
| 308 |
|
|
|
| 309 |
|
|
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
|
| 310 |
|
|
tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
|
| 311 |
|
|
* Makefile.in: Regenerate.
|
| 312 |
|
|
* configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
|
| 313 |
|
|
* configure: Regenerate.
|
| 314 |
|
|
* disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
|
| 315 |
|
|
* po/POTFILES.in: Regenerate.
|
| 316 |
|
|
* tilegx-dis.c: New file.
|
| 317 |
|
|
* tilegx-opc.c: New file.
|
| 318 |
|
|
* tilepro-dis.c: New file.
|
| 319 |
|
|
* tilepro-opc.c: New file.
|
| 320 |
|
|
|
| 321 |
|
|
2011-06-10 H.J. Lu
|
| 322 |
|
|
|
| 323 |
|
|
AVX Programming Reference (June, 2011)
|
| 324 |
|
|
* i386-dis.c (XMGatherQ): New.
|
| 325 |
|
|
* i386-dis.c (EXxmm_mb): New.
|
| 326 |
|
|
(EXxmm_mb): Likewise.
|
| 327 |
|
|
(EXxmm_mw): Likewise.
|
| 328 |
|
|
(EXxmm_md): Likewise.
|
| 329 |
|
|
(EXxmm_mq): Likewise.
|
| 330 |
|
|
(EXxmmdw): Likewise.
|
| 331 |
|
|
(EXxmmqd): Likewise.
|
| 332 |
|
|
(VexGatherQ): Likewise.
|
| 333 |
|
|
(MVexVSIBDWpX): Likewise.
|
| 334 |
|
|
(MVexVSIBQWpX): Likewise.
|
| 335 |
|
|
(xmm_mb_mode): Likewise.
|
| 336 |
|
|
(xmm_mw_mode): Likewise.
|
| 337 |
|
|
(xmm_md_mode): Likewise.
|
| 338 |
|
|
(xmm_mq_mode): Likewise.
|
| 339 |
|
|
(xmmdw_mode): Likewise.
|
| 340 |
|
|
(xmmqd_mode): Likewise.
|
| 341 |
|
|
(ymmxmm_mode): Likewise.
|
| 342 |
|
|
(vex_vsib_d_w_dq_mode): Likewise.
|
| 343 |
|
|
(vex_vsib_q_w_dq_mode): Likewise.
|
| 344 |
|
|
(MOD_VEX_0F385A_PREFIX_2): Likewise.
|
| 345 |
|
|
(MOD_VEX_0F388C_PREFIX_2): Likewise.
|
| 346 |
|
|
(MOD_VEX_0F388E_PREFIX_2): Likewise.
|
| 347 |
|
|
(PREFIX_0F3882): Likewise.
|
| 348 |
|
|
(PREFIX_VEX_0F3816): Likewise.
|
| 349 |
|
|
(PREFIX_VEX_0F3836): Likewise.
|
| 350 |
|
|
(PREFIX_VEX_0F3845): Likewise.
|
| 351 |
|
|
(PREFIX_VEX_0F3846): Likewise.
|
| 352 |
|
|
(PREFIX_VEX_0F3847): Likewise.
|
| 353 |
|
|
(PREFIX_VEX_0F3858): Likewise.
|
| 354 |
|
|
(PREFIX_VEX_0F3859): Likewise.
|
| 355 |
|
|
(PREFIX_VEX_0F385A): Likewise.
|
| 356 |
|
|
(PREFIX_VEX_0F3878): Likewise.
|
| 357 |
|
|
(PREFIX_VEX_0F3879): Likewise.
|
| 358 |
|
|
(PREFIX_VEX_0F388C): Likewise.
|
| 359 |
|
|
(PREFIX_VEX_0F388E): Likewise.
|
| 360 |
|
|
(PREFIX_VEX_0F3890..PREFIX_VEX_0F3893): Likewise.
|
| 361 |
|
|
(PREFIX_VEX_0F38F5): Likewise.
|
| 362 |
|
|
(PREFIX_VEX_0F38F6): Likewise.
|
| 363 |
|
|
(PREFIX_VEX_0F3A00): Likewise.
|
| 364 |
|
|
(PREFIX_VEX_0F3A01): Likewise.
|
| 365 |
|
|
(PREFIX_VEX_0F3A02): Likewise.
|
| 366 |
|
|
(PREFIX_VEX_0F3A38): Likewise.
|
| 367 |
|
|
(PREFIX_VEX_0F3A39): Likewise.
|
| 368 |
|
|
(PREFIX_VEX_0F3A46): Likewise.
|
| 369 |
|
|
(PREFIX_VEX_0F3AF0): Likewise.
|
| 370 |
|
|
(VEX_LEN_0F3816_P_2): Likewise.
|
| 371 |
|
|
(VEX_LEN_0F3819_P_2): Likewise.
|
| 372 |
|
|
(VEX_LEN_0F3836_P_2): Likewise.
|
| 373 |
|
|
(VEX_LEN_0F385A_P_2_M_0): Likewise.
|
| 374 |
|
|
(VEX_LEN_0F38F5_P_0): Likewise.
|
| 375 |
|
|
(VEX_LEN_0F38F5_P_1): Likewise.
|
| 376 |
|
|
(VEX_LEN_0F38F5_P_3): Likewise.
|
| 377 |
|
|
(VEX_LEN_0F38F6_P_3): Likewise.
|
| 378 |
|
|
(VEX_LEN_0F38F7_P_1): Likewise.
|
| 379 |
|
|
(VEX_LEN_0F38F7_P_2): Likewise.
|
| 380 |
|
|
(VEX_LEN_0F38F7_P_3): Likewise.
|
| 381 |
|
|
(VEX_LEN_0F3A00_P_2): Likewise.
|
| 382 |
|
|
(VEX_LEN_0F3A01_P_2): Likewise.
|
| 383 |
|
|
(VEX_LEN_0F3A38_P_2): Likewise.
|
| 384 |
|
|
(VEX_LEN_0F3A39_P_2): Likewise.
|
| 385 |
|
|
(VEX_LEN_0F3A46_P_2): Likewise.
|
| 386 |
|
|
(VEX_LEN_0F3AF0_P_3): Likewise.
|
| 387 |
|
|
(VEX_W_0F3816_P_2): Likewise.
|
| 388 |
|
|
(VEX_W_0F3818_P_2): Likewise.
|
| 389 |
|
|
(VEX_W_0F3819_P_2): Likewise.
|
| 390 |
|
|
(VEX_W_0F3836_P_2): Likewise.
|
| 391 |
|
|
(VEX_W_0F3846_P_2): Likewise.
|
| 392 |
|
|
(VEX_W_0F3858_P_2): Likewise.
|
| 393 |
|
|
(VEX_W_0F3859_P_2): Likewise.
|
| 394 |
|
|
(VEX_W_0F385A_P_2_M_0): Likewise.
|
| 395 |
|
|
(VEX_W_0F3878_P_2): Likewise.
|
| 396 |
|
|
(VEX_W_0F3879_P_2): Likewise.
|
| 397 |
|
|
(VEX_W_0F3A00_P_2): Likewise.
|
| 398 |
|
|
(VEX_W_0F3A01_P_2): Likewise.
|
| 399 |
|
|
(VEX_W_0F3A02_P_2): Likewise.
|
| 400 |
|
|
(VEX_W_0F3A38_P_2): Likewise.
|
| 401 |
|
|
(VEX_W_0F3A39_P_2): Likewise.
|
| 402 |
|
|
(VEX_W_0F3A46_P_2): Likewise.
|
| 403 |
|
|
(MOD_VEX_0F3818_PREFIX_2): Removed.
|
| 404 |
|
|
(MOD_VEX_0F3819_PREFIX_2): Likewise.
|
| 405 |
|
|
(VEX_LEN_0F60_P_2..VEX_LEN_0F6D_P_2): Likewise.
|
| 406 |
|
|
(VEX_LEN_0F70_P_1..VEX_LEN_0F76_P_2): Likewise.
|
| 407 |
|
|
(VEX_LEN_0FD1_P_2..VEX_LEN_0FD5_P_2): Likewise.
|
| 408 |
|
|
(VEX_LEN_0FD7_P_2_M_1..VEX_LEN_0F3819_P_2_M_0): Likewise.
|
| 409 |
|
|
(VEX_LEN_0F381C_P_2..VEX_LEN_0F3840_P_2): Likewise.
|
| 410 |
|
|
(VEX_LEN_0F3A0E_P_2): Likewise.
|
| 411 |
|
|
(VEX_LEN_0F3A0F_P_2): Likewise.
|
| 412 |
|
|
(VEX_LEN_0F3A42_P_2): Likewise.
|
| 413 |
|
|
(VEX_LEN_0F3A4C_P_2): Likewise.
|
| 414 |
|
|
(VEX_W_0F3818_P_2_M_0): Likewise.
|
| 415 |
|
|
(VEX_W_0F3819_P_2_M_0): Likewise.
|
| 416 |
|
|
(prefix_table): Updated.
|
| 417 |
|
|
(three_byte_table): Likewise.
|
| 418 |
|
|
(vex_table): Likewise.
|
| 419 |
|
|
(vex_len_table): Likewise.
|
| 420 |
|
|
(vex_w_table): Likewise.
|
| 421 |
|
|
(mod_table): Likewise.
|
| 422 |
|
|
(putop): Handle "LW".
|
| 423 |
|
|
(intel_operand_size): Handle xmm_mb_mode, xmm_mw_mode,
|
| 424 |
|
|
xmm_md_mode, xmm_mq_mode, xmmdw_mode, xmmqd_mode, ymmxmm_mode,
|
| 425 |
|
|
vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode.
|
| 426 |
|
|
(OP_EX): Likewise.
|
| 427 |
|
|
(OP_E_memory): Handle vex_vsib_d_w_dq_mode and
|
| 428 |
|
|
vex_vsib_q_w_dq_mode.
|
| 429 |
|
|
(OP_XMM): Handle vex_vsib_q_w_dq_mode.
|
| 430 |
|
|
(OP_VEX): Likewise.
|
| 431 |
|
|
|
| 432 |
|
|
* i386-gen.c (cpu_flag_init): Add CpuAVX2 to CPU_ANY_SSE_FLAGS
|
| 433 |
|
|
and CPU_ANY_AVX_FLAGS. Add CPU_BMI2_FLAGS, CPU_LZCNT_FLAGS,
|
| 434 |
|
|
CPU_INVPCID_FLAGS and CPU_AVX2_FLAGS.
|
| 435 |
|
|
(cpu_flags): Add CpuAVX2, CpuBMI2, CpuLZCNT and CpuINVPCID.
|
| 436 |
|
|
(opcode_modifiers): Add VecSIB.
|
| 437 |
|
|
|
| 438 |
|
|
* i386-opc.h (CpuAVX2): New.
|
| 439 |
|
|
(CpuBMI2): Likewise.
|
| 440 |
|
|
(CpuLZCNT): Likewise.
|
| 441 |
|
|
(CpuINVPCID): Likewise.
|
| 442 |
|
|
(VecSIB128): Likewise.
|
| 443 |
|
|
(VecSIB256): Likewise.
|
| 444 |
|
|
(VecSIB): Likewise.
|
| 445 |
|
|
(i386_cpu_flags): Add cpuavx2, cpubmi2, cpulzcnt and cpuinvpcid.
|
| 446 |
|
|
(i386_opcode_modifier): Add vecsib.
|
| 447 |
|
|
|
| 448 |
|
|
* i386-opc.tbl: Add invpcid, AVX2 and BMI2 instructions.
|
| 449 |
|
|
* i386-init.h: Regenerated.
|
| 450 |
|
|
* i386-tbl.h: Likewise.
|
| 451 |
|
|
|
| 452 |
|
|
2011-06-03 Quentin Neill
|
| 453 |
|
|
|
| 454 |
|
|
* i386-gen.c (cpu_flag_init): Add CpuF16C to CPU_BDVER2_FLAGS.
|
| 455 |
|
|
* i386-init.h: Regenerated.
|
| 456 |
|
|
|
| 457 |
18 |
khays |
2011-06-03 Nick Clifton
|
| 458 |
|
|
|
| 459 |
|
|
PR binutils/12752
|
| 460 |
|
|
* arm-dis.c (print_insn_coprocessor): Use bfd_vma type for
|
| 461 |
|
|
computing address offsets.
|
| 462 |
|
|
(print_arm_address): Likewise.
|
| 463 |
|
|
(print_insn_arm): Likewise.
|
| 464 |
|
|
(print_insn_thumb16): Likewise.
|
| 465 |
|
|
(print_insn_thumb32): Likewise.
|
| 466 |
|
|
|
| 467 |
|
|
2011-06-02 Jie Zhang
|
| 468 |
|
|
Nathan Sidwell
|
| 469 |
|
|
Maciej Rozycki
|
| 470 |
|
|
|
| 471 |
|
|
* arm-dis.c (print_insn_coprocessor): Explicitly print #-0
|
| 472 |
|
|
as address offset.
|
| 473 |
|
|
(print_arm_address): Likewise. Elide positive #0 appropriately.
|
| 474 |
|
|
(print_insn_arm): Likewise.
|
| 475 |
|
|
|
| 476 |
|
|
2011-06-02 Nick Clifton
|
| 477 |
|
|
|
| 478 |
|
|
PR gas/12752
|
| 479 |
|
|
* arm-dis.c (print_insn_thumb32): Do not sign extend addresses
|
| 480 |
|
|
passed to print_address_func.
|
| 481 |
|
|
|
| 482 |
|
|
2011-06-02 Nick Clifton
|
| 483 |
|
|
|
| 484 |
|
|
* arm-dis.c: Fix spelling mistakes.
|
| 485 |
|
|
* op/opcodes.pot: Regenerate.
|
| 486 |
|
|
|
| 487 |
|
|
2011-05-24 Andreas Krebbel
|
| 488 |
|
|
|
| 489 |
|
|
* s390-opc.c: Replace S390_OPERAND_REG_EVEN with
|
| 490 |
|
|
S390_OPERAND_REG_PAIR. Fix INSTR_RRF_0UFEF instruction type.
|
| 491 |
|
|
* s390-opc.txt: Fix cxr instruction type.
|
| 492 |
|
|
|
| 493 |
|
|
2011-05-24 Andreas Krebbel
|
| 494 |
|
|
|
| 495 |
|
|
* s390-opc.c: Add new instruction types marking register pair
|
| 496 |
|
|
operands.
|
| 497 |
|
|
* s390-opc.txt: Match instructions having register pair operands
|
| 498 |
|
|
to the new instruction types.
|
| 499 |
|
|
|
| 500 |
|
|
2011-05-19 Nick Clifton
|
| 501 |
|
|
|
| 502 |
|
|
* v850-opc.c (cmpf.[sd]): Reverse the order of the reg1 and reg2
|
| 503 |
|
|
operands.
|
| 504 |
|
|
|
| 505 |
|
|
2011-05-10 Quentin Neill
|
| 506 |
|
|
|
| 507 |
|
|
* i386-gen.c (cpu_flag_init): Add new CPU_BDVER2_FLAGS.
|
| 508 |
|
|
* i386-init.h: Regenerated.
|
| 509 |
|
|
|
| 510 |
|
|
2011-04-27 Nick Clifton
|
| 511 |
|
|
|
| 512 |
|
|
* po/da.po: Updated Danish translation.
|
| 513 |
|
|
|
| 514 |
|
|
2011-04-26 Anton Blanchard
|
| 515 |
|
|
|
| 516 |
|
|
* ppc-opc.c: (powerpc_opcodes): Enable icswx for POWER7.
|
| 517 |
|
|
|
| 518 |
|
|
2011-04-21 DJ Delorie
|
| 519 |
|
|
|
| 520 |
|
|
* rx-decode.opc (rx_decode_opcode): Set the syntax for multi-byte NOPs.
|
| 521 |
|
|
* rx-decode.c: Regenerate.
|
| 522 |
|
|
|
| 523 |
|
|
2011-04-20 H.J. Lu
|
| 524 |
|
|
|
| 525 |
|
|
* i386-init.h: Regenerated.
|
| 526 |
|
|
|
| 527 |
|
|
2011-04-19 Quentin Neill
|
| 528 |
|
|
|
| 529 |
|
|
* i386-gen.c (cpu_flag_init): Remove 3dnow and 3dnowa bits
|
| 530 |
|
|
from bdver1 flags.
|
| 531 |
|
|
|
| 532 |
|
|
2011-04-13 Nick Clifton
|
| 533 |
|
|
|
| 534 |
|
|
* v850-dis.c (disassemble): Always print a closing square brace if
|
| 535 |
|
|
an opening square brace was printed.
|
| 536 |
|
|
|
| 537 |
|
|
2011-04-12 Nick Clifton
|
| 538 |
|
|
|
| 539 |
|
|
PR binutils/12534
|
| 540 |
|
|
* arm-dis.c (thumb32_opcodes): Add %L suffix to LDRD and STRD insn
|
| 541 |
|
|
patterns.
|
| 542 |
|
|
(print_insn_thumb32): Handle %L.
|
| 543 |
|
|
|
| 544 |
|
|
2011-04-11 Julian Brown
|
| 545 |
|
|
|
| 546 |
|
|
* arm-dis.c (psr_name): Fix typo for BASEPRI_MAX.
|
| 547 |
|
|
(print_insn_thumb32): Add APSR bitmask support.
|
| 548 |
|
|
|
| 549 |
|
|
2011-04-07 Paul Carroll
|
| 550 |
|
|
|
| 551 |
|
|
* arm-dis.c (print_insn): init vars moved into private_data structure.
|
| 552 |
|
|
|
| 553 |
|
|
2011-03-24 Mike Frysinger
|
| 554 |
|
|
|
| 555 |
|
|
* bfin-dis.c (decode_dsp32mac_0): Move MM zeroing down to MAC0 logic.
|
| 556 |
|
|
|
| 557 |
|
|
2011-03-22 Eric B. Weddington
|
| 558 |
|
|
|
| 559 |
|
|
* avr-dis.c (avr_operand): Add opcode_str parameter. Check for
|
| 560 |
|
|
post-increment to support LPM Z+ instruction. Add support for 'E'
|
| 561 |
|
|
constraint for DES instruction.
|
| 562 |
|
|
(print_insn_avr): Adjust calls to avr_operand. Rename variable.
|
| 563 |
|
|
|
| 564 |
|
|
2011-03-14 Richard Sandiford
|
| 565 |
|
|
|
| 566 |
|
|
* arm-dis.c (get_sym_code_type): Treat STT_GNU_IFUNCs as code.
|
| 567 |
|
|
|
| 568 |
|
|
2011-03-14 Richard Sandiford
|
| 569 |
|
|
|
| 570 |
|
|
* arm-dis.c (get_sym_code_type): Don't check for STT_ARM_TFUNC.
|
| 571 |
|
|
Use branch types instead.
|
| 572 |
|
|
(print_insn): Likewise.
|
| 573 |
|
|
|
| 574 |
|
|
2011-02-28 Maciej W. Rozycki
|
| 575 |
|
|
|
| 576 |
|
|
* mips-opc.c (mips_builtin_opcodes): Correct register use
|
| 577 |
|
|
annotation of "alnv.ps".
|
| 578 |
|
|
|
| 579 |
|
|
2011-02-28 Maciej W. Rozycki
|
| 580 |
|
|
|
| 581 |
|
|
* mips-opc.c (mips_builtin_opcodes): Add "pref" macro.
|
| 582 |
|
|
|
| 583 |
|
|
2011-02-22 Mike Frysinger
|
| 584 |
|
|
|
| 585 |
|
|
* bfin-dis.c (OUTS): Remove p NULL check and txt NUL check.
|
| 586 |
|
|
|
| 587 |
|
|
2011-02-22 Mike Frysinger
|
| 588 |
|
|
|
| 589 |
|
|
* bfin-dis.c (print_insn_bfin): Change outf->fprintf_func to OUTS.
|
| 590 |
|
|
|
| 591 |
|
|
2011-02-19 Mike Frysinger
|
| 592 |
|
|
|
| 593 |
|
|
* bfin-dis.c (saved_state): Mark static. Change a[01]x to ax[] and
|
| 594 |
|
|
a[01]w to aw[]. Delete ac0, ac0_copy, ac1, an, aq, av0, av0s, av1,
|
| 595 |
|
|
av1s, az, cc, v, v_copy, vs, rnd_mod, v_internal, pc, ticks, insts,
|
| 596 |
|
|
exception, end_of_registers, msize, memory, bfd_mach.
|
| 597 |
|
|
(CCREG, PCREG, A0XREG, A0WREG, A1XREG, A1WREG, LC0REG, LT0REG,
|
| 598 |
|
|
LB0REG, LC1REG, LT1REG, LB1REG): Delete
|
| 599 |
|
|
(AXREG, AWREG, LCREG, LTREG, LBREG): Define.
|
| 600 |
|
|
(get_allreg): Change to new defines. Fallback to abort().
|
| 601 |
|
|
|
| 602 |
|
|
2011-02-14 Mike Frysinger
|
| 603 |
|
|
|
| 604 |
|
|
* bfin-dis.c: Add whitespace/parenthesis where needed.
|
| 605 |
|
|
|
| 606 |
|
|
2011-02-14 Mike Frysinger
|
| 607 |
|
|
|
| 608 |
|
|
* bfin-dis.c (decode_LoopSetup_0): Return when reg is greater
|
| 609 |
|
|
than 7.
|
| 610 |
|
|
|
| 611 |
|
|
2011-02-13 Ralf Wildenhues
|
| 612 |
|
|
|
| 613 |
|
|
* configure: Regenerate.
|
| 614 |
|
|
|
| 615 |
|
|
2011-02-13 Mike Frysinger
|
| 616 |
|
|
|
| 617 |
|
|
* bfin-dis.c (decode_dsp32alu_0): Fix typo with A1 reg.
|
| 618 |
|
|
|
| 619 |
|
|
2011-02-13 Mike Frysinger
|
| 620 |
|
|
|
| 621 |
|
|
* bfin-dis.c (decode_dsp32mult_0): Add 1 to dst for mac1. Output
|
| 622 |
|
|
dregs only when P is set, and dregs_lo otherwise.
|
| 623 |
|
|
|
| 624 |
|
|
2011-02-13 Mike Frysinger
|
| 625 |
|
|
|
| 626 |
|
|
* bfin-dis.c (decode_dsp32alu_0): Delete BYTEOP2M code.
|
| 627 |
|
|
|
| 628 |
|
|
2011-02-12 Mike Frysinger
|
| 629 |
|
|
|
| 630 |
|
|
* bfin-dis.c (decode_pseudoDEBUG_0): Add space after PRNT.
|
| 631 |
|
|
|
| 632 |
|
|
2011-02-12 Mike Frysinger
|
| 633 |
|
|
|
| 634 |
|
|
* bfin-dis.c (machine_registers): Delete REG_GP.
|
| 635 |
|
|
(reg_names): Delete "GP".
|
| 636 |
|
|
(decode_allregs): Change REG_GP to REG_LASTREG.
|
| 637 |
|
|
|
| 638 |
|
|
2011-02-12 Mike Frysinger
|
| 639 |
|
|
|
| 640 |
|
|
* bfin-dis.c (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2,
|
| 641 |
|
|
M_IH, M_IU): Delete.
|
| 642 |
|
|
|
| 643 |
|
|
2011-02-11 Mike Frysinger
|
| 644 |
|
|
|
| 645 |
|
|
* bfin-dis.c (reg_names): Add const.
|
| 646 |
|
|
(decode_dregs_lo, decode_dregs_hi, decode_dregs, decode_dregs_byte,
|
| 647 |
|
|
decode_pregs, decode_iregs, decode_mregs, decode_dpregs, decode_gregs,
|
| 648 |
|
|
decode_regs, decode_regs_lo, decode_regs_hi, decode_statbits,
|
| 649 |
|
|
decode_counters, decode_allregs): Likewise.
|
| 650 |
|
|
|
| 651 |
|
|
2011-02-09 Michael Snyder
|
| 652 |
|
|
|
| 653 |
158 |
khays |
* i386-dis.c (OP_J): Parenthesize expression to prevent
|
| 654 |
18 |
khays |
truncated addresses.
|
| 655 |
|
|
(print_insn): Fix indentation off-by-one.
|
| 656 |
|
|
|
| 657 |
|
|
2011-02-01 Nick Clifton
|
| 658 |
|
|
|
| 659 |
|
|
* po/da.po: Updated Danish translation.
|
| 660 |
|
|
|
| 661 |
|
|
2011-01-21 Dave Murphy
|
| 662 |
|
|
|
| 663 |
|
|
* ppc-opc.c (NON32, NO371): Remove PPC_OPCODE_PPCPS.
|
| 664 |
|
|
|
| 665 |
|
|
2011-01-18 H.J. Lu
|
| 666 |
|
|
|
| 667 |
|
|
* i386-dis.c (sIbT): New.
|
| 668 |
|
|
(b_T_mode): Likewise.
|
| 669 |
|
|
(dis386): Replace sIb with sIbT on "pushT".
|
| 670 |
|
|
(x86_64_table): Replace sIb with Ib on "aam" and "aad".
|
| 671 |
|
|
(OP_sI): Handle b_T_mode. Properly sign-extend byte.
|
| 672 |
|
|
|
| 673 |
|
|
2011-01-18 Jan Kratochvil
|
| 674 |
|
|
|
| 675 |
|
|
* i386-init.h: Regenerated.
|
| 676 |
|
|
* i386-tbl.h: Regenerated
|
| 677 |
|
|
|
| 678 |
|
|
2011-01-17 Quentin Neill
|
| 679 |
|
|
|
| 680 |
|
|
* i386-dis.c (REG_XOP_TBM_01): New.
|
| 681 |
|
|
(REG_XOP_TBM_02): New.
|
| 682 |
|
|
(reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables.
|
| 683 |
|
|
(xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02
|
| 684 |
|
|
entries, and add bextr instruction.
|
| 685 |
|
|
|
| 686 |
|
|
* i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM.
|
| 687 |
|
|
(cpu_flags): Add CpuTBM.
|
| 688 |
|
|
|
| 689 |
|
|
* i386-opc.h (CpuTBM) New.
|
| 690 |
|
|
(i386_cpu_flags): Add bit cputbm.
|
| 691 |
|
|
|
| 692 |
|
|
* i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk,
|
| 693 |
|
|
blcs, blsfill, blsic, t1mskc, and tzmsk.
|
| 694 |
|
|
|
| 695 |
|
|
2011-01-12 DJ Delorie
|
| 696 |
|
|
|
| 697 |
|
|
* rx-dis.c (print_insn_rx): Support RX_Operand_TwoReg.
|
| 698 |
|
|
|
| 699 |
|
|
2011-01-11 Mingjie Xing
|
| 700 |
|
|
|
| 701 |
|
|
* mips-dis.c (print_insn_args): Adjust the value to print the real
|
| 702 |
|
|
offset for "+c" argument.
|
| 703 |
|
|
|
| 704 |
|
|
2011-01-10 Nick Clifton
|
| 705 |
|
|
|
| 706 |
|
|
* po/da.po: Updated Danish translation.
|
| 707 |
|
|
|
| 708 |
|
|
2011-01-05 Nathan Sidwell
|
| 709 |
|
|
|
| 710 |
|
|
* arm-dis.c (thumb32_opcodes): BLX must have bit zero clear.
|
| 711 |
|
|
|
| 712 |
|
|
2011-01-04 H.J. Lu
|
| 713 |
|
|
|
| 714 |
|
|
* i386-dis.c (REG_VEX_38F3): New.
|
| 715 |
|
|
(PREFIX_0FBC): Likewise.
|
| 716 |
|
|
(PREFIX_VEX_38F2): Likewise.
|
| 717 |
|
|
(PREFIX_VEX_38F3_REG_1): Likewise.
|
| 718 |
|
|
(PREFIX_VEX_38F3_REG_2): Likewise.
|
| 719 |
|
|
(PREFIX_VEX_38F3_REG_3): Likewise.
|
| 720 |
|
|
(PREFIX_VEX_38F7): Likewise.
|
| 721 |
|
|
(VEX_LEN_38F2_P_0): Likewise.
|
| 722 |
|
|
(VEX_LEN_38F3_R_1_P_0): Likewise.
|
| 723 |
|
|
(VEX_LEN_38F3_R_2_P_0): Likewise.
|
| 724 |
|
|
(VEX_LEN_38F3_R_3_P_0): Likewise.
|
| 725 |
|
|
(VEX_LEN_38F7_P_0): Likewise.
|
| 726 |
|
|
(dis386_twobyte): Use PREFIX_0FBC.
|
| 727 |
|
|
(reg_table): Add REG_VEX_38F3.
|
| 728 |
|
|
(prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2,
|
| 729 |
|
|
PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2,
|
| 730 |
|
|
PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7.
|
| 731 |
|
|
(vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and
|
| 732 |
|
|
PREFIX_VEX_38F7.
|
| 733 |
|
|
(vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0,
|
| 734 |
|
|
VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and
|
| 735 |
|
|
VEX_LEN_38F7_P_0.
|
| 736 |
|
|
|
| 737 |
|
|
* i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS.
|
| 738 |
|
|
(cpu_flags): Add CpuBMI.
|
| 739 |
|
|
|
| 740 |
|
|
* i386-opc.h (CpuBMI): New.
|
| 741 |
|
|
(i386_cpu_flags): Add cpubmi.
|
| 742 |
|
|
|
| 743 |
|
|
* i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt.
|
| 744 |
|
|
* i386-init.h: Regenerated.
|
| 745 |
|
|
* i386-tbl.h: Likewise.
|
| 746 |
|
|
|
| 747 |
|
|
2011-01-04 H.J. Lu
|
| 748 |
|
|
|
| 749 |
|
|
* i386-dis.c (VexGdq): New.
|
| 750 |
|
|
(OP_VEX): Handle dq_mode.
|
| 751 |
|
|
|
| 752 |
|
|
2011-01-01 H.J. Lu
|
| 753 |
|
|
|
| 754 |
|
|
* i386-gen.c (process_copyright): Update copyright to 2011.
|
| 755 |
|
|
|
| 756 |
|
|
For older changes see ChangeLog-2010
|
| 757 |
|
|
|
| 758 |
|
|
Local Variables:
|
| 759 |
|
|
mode: change-log
|
| 760 |
|
|
left-margin: 8
|
| 761 |
|
|
fill-column: 74
|
| 762 |
|
|
version-control: never
|
| 763 |
|
|
End:
|
