OpenCores
URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [gnu/] [binutils/] [opcodes/] [avr-dis.c] - Blame information for rev 241

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 18 khays
/* Disassemble AVR instructions.
2
   Copyright 1999, 2000, 2002, 2004, 2005, 2006, 2007, 2008
3
   Free Software Foundation, Inc.
4
 
5
   Contributed by Denis Chertykov <denisc@overta.ru>
6
 
7
   This file is part of libopcodes.
8
 
9
   This library is free software; you can redistribute it and/or modify
10
   it under the terms of the GNU General Public License as published by
11
   the Free Software Foundation; either version 3, or (at your option)
12
   any later version.
13
 
14
   It is distributed in the hope that it will be useful, but WITHOUT
15
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
17
   License for more details.
18
 
19
   You should have received a copy of the GNU General Public License
20
   along with this program; if not, write to the Free Software
21
   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
22
   MA 02110-1301, USA.  */
23
 
24
#include <assert.h>
25
#include "sysdep.h"
26
#include "dis-asm.h"
27
#include "opintl.h"
28
#include "libiberty.h"
29
 
30
struct avr_opcodes_s
31
{
32
  char *name;
33
  char *constraints;
34
  char *opcode;
35
  int insn_size;                /* In words.  */
36
  int isa;
37
  unsigned int bin_opcode;
38
};
39
 
40
#define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
41
{#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
42
 
43
const struct avr_opcodes_s avr_opcodes[] =
44
{
45
  #include "opcode/avr.h"
46
  {NULL, NULL, NULL, 0, 0, 0}
47
};
48
 
49
static const char * comment_start = "0x";
50
 
51
static int
52
avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constraint,
53
             char *opcode_str, char *buf, char *comment, int regs, int *sym, bfd_vma *sym_addr)
54
{
55
  int ok = 1;
56
  *sym = 0;
57
 
58
  switch (constraint)
59
    {
60
      /* Any register operand.  */
61
    case 'r':
62
      if (regs)
63
        insn = (insn & 0xf) | ((insn & 0x0200) >> 5); /* Source register.  */
64
      else
65
        insn = (insn & 0x01f0) >> 4; /* Destination register.  */
66
 
67
      sprintf (buf, "r%d", insn);
68
      break;
69
 
70
    case 'd':
71
      if (regs)
72
        sprintf (buf, "r%d", 16 + (insn & 0xf));
73
      else
74
        sprintf (buf, "r%d", 16 + ((insn & 0xf0) >> 4));
75
      break;
76
 
77
    case 'w':
78
      sprintf (buf, "r%d", 24 + ((insn & 0x30) >> 3));
79
      break;
80
 
81
    case 'a':
82
      if (regs)
83
        sprintf (buf, "r%d", 16 + (insn & 7));
84
      else
85
        sprintf (buf, "r%d", 16 + ((insn >> 4) & 7));
86
      break;
87
 
88
    case 'v':
89
      if (regs)
90
        sprintf (buf, "r%d", (insn & 0xf) * 2);
91
      else
92
        sprintf (buf, "r%d", ((insn & 0xf0) >> 3));
93
      break;
94
 
95
    case 'e':
96
      {
97
        char *xyz;
98
 
99
        switch (insn & 0x100f)
100
          {
101
            case 0x0000: xyz = "Z";  break;
102
            case 0x1001: xyz = "Z+"; break;
103
            case 0x1002: xyz = "-Z"; break;
104
            case 0x0008: xyz = "Y";  break;
105
            case 0x1009: xyz = "Y+"; break;
106
            case 0x100a: xyz = "-Y"; break;
107
            case 0x100c: xyz = "X";  break;
108
            case 0x100d: xyz = "X+"; break;
109
            case 0x100e: xyz = "-X"; break;
110
            default: xyz = "??"; ok = 0;
111
          }
112
        strcpy (buf, xyz);
113
 
114
        if (AVR_UNDEF_P (insn))
115
          sprintf (comment, _("undefined"));
116
      }
117
      break;
118
 
119
    case 'z':
120
      *buf++ = 'Z';
121
 
122
      /* Check for post-increment. */
123
      char *s;
124
      for (s = opcode_str; *s; ++s)
125
        {
126
          if (*s == '+')
127
            {
128 158 khays
              if (insn & (1 << (15 - (s - opcode_str))))
129
                *buf++ = '+';
130 18 khays
              break;
131
            }
132
        }
133
 
134
      *buf = '\0';
135
      if (AVR_UNDEF_P (insn))
136
        sprintf (comment, _("undefined"));
137
      break;
138
 
139
    case 'b':
140
      {
141
        unsigned int x;
142
 
143
        x = (insn & 7);
144
        x |= (insn >> 7) & (3 << 3);
145
        x |= (insn >> 8) & (1 << 5);
146
 
147
        if (insn & 0x8)
148
          *buf++ = 'Y';
149
        else
150
          *buf++ = 'Z';
151
        sprintf (buf, "+%d", x);
152
        sprintf (comment, "0x%02x", x);
153
      }
154
      break;
155
 
156
    case 'h':
157
      *sym = 1;
158
      *sym_addr = ((((insn & 1) | ((insn & 0x1f0) >> 3)) << 16) | insn2) * 2;
159
      /* See PR binutils/2454.  Ideally we would like to display the hex
160
         value of the address only once, but this would mean recoding
161
         objdump_print_address() which would affect many targets.  */
162
      sprintf (buf, "%#lx", (unsigned long) *sym_addr);
163
      strcpy (comment, comment_start);
164
      break;
165
 
166
    case 'L':
167
      {
168
        int rel_addr = (((insn & 0xfff) ^ 0x800) - 0x800) * 2;
169
        sprintf (buf, ".%+-8d", rel_addr);
170
        *sym = 1;
171
        *sym_addr = pc + 2 + rel_addr;
172
        strcpy (comment, comment_start);
173
      }
174
      break;
175
 
176
    case 'l':
177
      {
178
        int rel_addr = ((((insn >> 3) & 0x7f) ^ 0x40) - 0x40) * 2;
179
 
180
        sprintf (buf, ".%+-8d", rel_addr);
181
        *sym = 1;
182
        *sym_addr = pc + 2 + rel_addr;
183
        strcpy (comment, comment_start);
184
      }
185
      break;
186
 
187
    case 'i':
188
      sprintf (buf, "0x%04X", insn2);
189
      break;
190
 
191
    case 'M':
192
      sprintf (buf, "0x%02X", ((insn & 0xf00) >> 4) | (insn & 0xf));
193
      sprintf (comment, "%d", ((insn & 0xf00) >> 4) | (insn & 0xf));
194
      break;
195
 
196
    case 'n':
197
      sprintf (buf, "??");
198
      fprintf (stderr, _("Internal disassembler error"));
199
      ok = 0;
200
      break;
201
 
202
    case 'K':
203
      {
204
        unsigned int x;
205
 
206
        x = (insn & 0xf) | ((insn >> 2) & 0x30);
207
        sprintf (buf, "0x%02x", x);
208
        sprintf (comment, "%d", x);
209
      }
210
      break;
211
 
212
    case 's':
213
      sprintf (buf, "%d", insn & 7);
214
      break;
215
 
216
    case 'S':
217
      sprintf (buf, "%d", (insn >> 4) & 7);
218
      break;
219
 
220
    case 'P':
221
      {
222
        unsigned int x;
223
 
224
        x = (insn & 0xf);
225
        x |= (insn >> 5) & 0x30;
226
        sprintf (buf, "0x%02x", x);
227
        sprintf (comment, "%d", x);
228
      }
229
      break;
230
 
231
    case 'p':
232
      {
233
        unsigned int x;
234
 
235
        x = (insn >> 3) & 0x1f;
236
        sprintf (buf, "0x%02x", x);
237
        sprintf (comment, "%d", x);
238
      }
239
      break;
240
 
241
    case 'E':
242
      sprintf (buf, "%d", (insn >> 4) & 15);
243
      break;
244
 
245
    case '?':
246
      *buf = '\0';
247
      break;
248
 
249
    default:
250
      sprintf (buf, "??");
251
      fprintf (stderr, _("unknown constraint `%c'"), constraint);
252
      ok = 0;
253
    }
254
 
255
    return ok;
256
}
257
 
258
static unsigned short
259
avrdis_opcode (bfd_vma addr, disassemble_info *info)
260
{
261
  bfd_byte buffer[2];
262
  int status;
263
 
264
  status = info->read_memory_func (addr, buffer, 2, info);
265
 
266
  if (status == 0)
267
    return bfd_getl16 (buffer);
268
 
269
  info->memory_error_func (status, addr, info);
270
  return -1;
271
}
272
 
273
 
274
int
275
print_insn_avr (bfd_vma addr, disassemble_info *info)
276
{
277
  unsigned int insn, insn2;
278
  const struct avr_opcodes_s *opcode;
279
  static unsigned int *maskptr;
280
  void *stream = info->stream;
281
  fprintf_ftype prin = info->fprintf_func;
282
  static unsigned int *avr_bin_masks;
283
  static int initialized;
284
  int cmd_len = 2;
285
  int ok = 0;
286
  char op1[20], op2[20], comment1[40], comment2[40];
287
  int sym_op1 = 0, sym_op2 = 0;
288
  bfd_vma sym_addr1, sym_addr2;
289
 
290
 
291
  if (!initialized)
292
    {
293
      unsigned int nopcodes;
294
 
295
      /* PR 4045: Try to avoid duplicating the 0x prefix that
296
         objdump_print_addr() will put on addresses when there
297
         is no symbol table available.  */
298
      if (info->symtab_size == 0)
299
        comment_start = " ";
300
 
301
      nopcodes = sizeof (avr_opcodes) / sizeof (struct avr_opcodes_s);
302
 
303
      avr_bin_masks = xmalloc (nopcodes * sizeof (unsigned int));
304
 
305
      for (opcode = avr_opcodes, maskptr = avr_bin_masks;
306
           opcode->name;
307
           opcode++, maskptr++)
308
        {
309
          char * s;
310
          unsigned int bin = 0;
311
          unsigned int mask = 0;
312
 
313
          for (s = opcode->opcode; *s; ++s)
314
            {
315
              bin <<= 1;
316
              mask <<= 1;
317
              bin |= (*s == '1');
318
              mask |= (*s == '1' || *s == '0');
319
            }
320
          assert (s - opcode->opcode == 16);
321
          assert (opcode->bin_opcode == bin);
322
          *maskptr = mask;
323
        }
324
 
325
      initialized = 1;
326
    }
327
 
328
  insn = avrdis_opcode (addr, info);
329
 
330
  for (opcode = avr_opcodes, maskptr = avr_bin_masks;
331
       opcode->name;
332
       opcode++, maskptr++)
333
    if ((insn & *maskptr) == opcode->bin_opcode)
334
      break;
335
 
336
  /* Special case: disassemble `ldd r,b+0' as `ld r,b', and
337
     `std b+0,r' as `st b,r' (next entry in the table).  */
338
 
339
  if (AVR_DISP0_P (insn))
340
    opcode++;
341
 
342
  op1[0] = 0;
343
  op2[0] = 0;
344
  comment1[0] = 0;
345
  comment2[0] = 0;
346
 
347
  if (opcode->name)
348
    {
349
      char *constraints = opcode->constraints;
350
      char *opcode_str = opcode->opcode;
351
 
352
      insn2 = 0;
353
      ok = 1;
354
 
355
      if (opcode->insn_size > 1)
356
        {
357
          insn2 = avrdis_opcode (addr + 2, info);
358
          cmd_len = 4;
359
        }
360
 
361
      if (*constraints && *constraints != '?')
362
        {
363
          int regs = REGISTER_P (*constraints);
364
 
365
          ok = avr_operand (insn, insn2, addr, *constraints, opcode_str, op1, comment1, 0, &sym_op1, &sym_addr1);
366
 
367
          if (ok && *(++constraints) == ',')
368
            ok = avr_operand (insn, insn2, addr, *(++constraints), opcode_str, op2,
369
                              *comment1 ? comment2 : comment1, regs, &sym_op2, &sym_addr2);
370
        }
371
    }
372
 
373
  if (!ok)
374
    {
375
      /* Unknown opcode, or invalid combination of operands.  */
376
      sprintf (op1, "0x%04x", insn);
377
      op2[0] = 0;
378
      sprintf (comment1, "????");
379
      comment2[0] = 0;
380
    }
381
 
382
  (*prin) (stream, "%s", ok ? opcode->name : ".word");
383
 
384
  if (*op1)
385
      (*prin) (stream, "\t%s", op1);
386
 
387
  if (*op2)
388
    (*prin) (stream, ", %s", op2);
389
 
390
  if (*comment1)
391
    (*prin) (stream, "\t; %s", comment1);
392
 
393
  if (sym_op1)
394
    info->print_address_func (sym_addr1, info);
395
 
396
  if (*comment2)
397
    (*prin) (stream, " %s", comment2);
398
 
399
  if (sym_op2)
400
    info->print_address_func (sym_addr2, info);
401
 
402
  return cmd_len;
403
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.