OpenCores
URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [gnu/] [binutils/] [opcodes/] [xc16x-ibld.c] - Blame information for rev 299

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 18 khays
/* Instruction building/extraction support for xc16x. -*- C -*-
2
 
3
   THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
4
   - the resultant file is machine generated, cgen-ibld.in isn't
5
 
6
   Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2006, 2007,
7
   2008, 2010  Free Software Foundation, Inc.
8
 
9
   This file is part of libopcodes.
10
 
11
   This library is free software; you can redistribute it and/or modify
12
   it under the terms of the GNU General Public License as published by
13
   the Free Software Foundation; either version 3, or (at your option)
14
   any later version.
15
 
16
   It is distributed in the hope that it will be useful, but WITHOUT
17
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
18
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
19
   License for more details.
20
 
21
   You should have received a copy of the GNU General Public License
22
   along with this program; if not, write to the Free Software Foundation, Inc.,
23
   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
24
 
25
/* ??? Eventually more and more of this stuff can go to cpu-independent files.
26
   Keep that in mind.  */
27
 
28
#include "sysdep.h"
29
#include <stdio.h>
30
#include "ansidecl.h"
31
#include "dis-asm.h"
32
#include "bfd.h"
33
#include "symcat.h"
34
#include "xc16x-desc.h"
35
#include "xc16x-opc.h"
36
#include "cgen/basic-modes.h"
37
#include "opintl.h"
38
#include "safe-ctype.h"
39
 
40
#undef  min
41
#define min(a,b) ((a) < (b) ? (a) : (b))
42
#undef  max
43
#define max(a,b) ((a) > (b) ? (a) : (b))
44
 
45
/* Used by the ifield rtx function.  */
46
#define FLD(f) (fields->f)
47
 
48
static const char * insert_normal
49
  (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
50
   unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
51
static const char * insert_insn_normal
52
  (CGEN_CPU_DESC, const CGEN_INSN *,
53
   CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
54
static int extract_normal
55
  (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
56
   unsigned int, unsigned int, unsigned int, unsigned int,
57
   unsigned int, unsigned int, bfd_vma, long *);
58
static int extract_insn_normal
59
  (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
60
   CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
61
#if CGEN_INT_INSN_P
62
static void put_insn_int_value
63
  (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
64
#endif
65
#if ! CGEN_INT_INSN_P
66
static CGEN_INLINE void insert_1
67
  (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
68
static CGEN_INLINE int fill_cache
69
  (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *,  int, int, bfd_vma);
70
static CGEN_INLINE long extract_1
71
  (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
72
#endif
73
 
74
/* Operand insertion.  */
75
 
76
#if ! CGEN_INT_INSN_P
77
 
78
/* Subroutine of insert_normal.  */
79
 
80
static CGEN_INLINE void
81
insert_1 (CGEN_CPU_DESC cd,
82
          unsigned long value,
83
          int start,
84
          int length,
85
          int word_length,
86
          unsigned char *bufp)
87
{
88
  unsigned long x,mask;
89
  int shift;
90
 
91
  x = cgen_get_insn_value (cd, bufp, word_length);
92
 
93
  /* Written this way to avoid undefined behaviour.  */
94
  mask = (((1L << (length - 1)) - 1) << 1) | 1;
95
  if (CGEN_INSN_LSB0_P)
96
    shift = (start + 1) - length;
97
  else
98
    shift = (word_length - (start + length));
99
  x = (x & ~(mask << shift)) | ((value & mask) << shift);
100
 
101
  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
102
}
103
 
104
#endif /* ! CGEN_INT_INSN_P */
105
 
106
/* Default insertion routine.
107
 
108
   ATTRS is a mask of the boolean attributes.
109
   WORD_OFFSET is the offset in bits from the start of the insn of the value.
110
   WORD_LENGTH is the length of the word in bits in which the value resides.
111
   START is the starting bit number in the word, architecture origin.
112
   LENGTH is the length of VALUE in bits.
113
   TOTAL_LENGTH is the total length of the insn in bits.
114
 
115
   The result is an error message or NULL if success.  */
116
 
117
/* ??? This duplicates functionality with bfd's howto table and
118
   bfd_install_relocation.  */
119
/* ??? This doesn't handle bfd_vma's.  Create another function when
120
   necessary.  */
121
 
122
static const char *
123
insert_normal (CGEN_CPU_DESC cd,
124
               long value,
125
               unsigned int attrs,
126
               unsigned int word_offset,
127
               unsigned int start,
128
               unsigned int length,
129
               unsigned int word_length,
130
               unsigned int total_length,
131
               CGEN_INSN_BYTES_PTR buffer)
132
{
133
  static char errbuf[100];
134
  /* Written this way to avoid undefined behaviour.  */
135
  unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
136
 
137
  /* If LENGTH is zero, this operand doesn't contribute to the value.  */
138
  if (length == 0)
139
    return NULL;
140
 
141
  if (word_length > 8 * sizeof (CGEN_INSN_INT))
142
    abort ();
143
 
144
  /* For architectures with insns smaller than the base-insn-bitsize,
145
     word_length may be too big.  */
146
  if (cd->min_insn_bitsize < cd->base_insn_bitsize)
147
    {
148
      if (word_offset == 0
149
          && word_length > total_length)
150
        word_length = total_length;
151
    }
152
 
153
  /* Ensure VALUE will fit.  */
154
  if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
155
    {
156
      long minval = - (1L << (length - 1));
157
      unsigned long maxval = mask;
158
 
159
      if ((value > 0 && (unsigned long) value > maxval)
160
          || value < minval)
161
        {
162
          /* xgettext:c-format */
163
          sprintf (errbuf,
164
                   _("operand out of range (%ld not between %ld and %lu)"),
165
                   value, minval, maxval);
166
          return errbuf;
167
        }
168
    }
169
  else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
170
    {
171
      unsigned long maxval = mask;
172
      unsigned long val = (unsigned long) value;
173
 
174
      /* For hosts with a word size > 32 check to see if value has been sign
175
         extended beyond 32 bits.  If so then ignore these higher sign bits
176
         as the user is attempting to store a 32-bit signed value into an
177
         unsigned 32-bit field which is allowed.  */
178
      if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
179
        val &= 0xFFFFFFFF;
180
 
181
      if (val > maxval)
182
        {
183
          /* xgettext:c-format */
184
          sprintf (errbuf,
185
                   _("operand out of range (0x%lx not between 0 and 0x%lx)"),
186
                   val, maxval);
187
          return errbuf;
188
        }
189
    }
190
  else
191
    {
192
      if (! cgen_signed_overflow_ok_p (cd))
193
        {
194
          long minval = - (1L << (length - 1));
195
          long maxval =   (1L << (length - 1)) - 1;
196
 
197
          if (value < minval || value > maxval)
198
            {
199
              sprintf
200
                /* xgettext:c-format */
201
                (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
202
                 value, minval, maxval);
203
              return errbuf;
204
            }
205
        }
206
    }
207
 
208
#if CGEN_INT_INSN_P
209
 
210
  {
211
    int shift;
212
 
213
    if (CGEN_INSN_LSB0_P)
214
      shift = (word_offset + start + 1) - length;
215
    else
216
      shift = total_length - (word_offset + start + length);
217
    *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
218
  }
219
 
220
#else /* ! CGEN_INT_INSN_P */
221
 
222
  {
223
    unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
224
 
225
    insert_1 (cd, value, start, length, word_length, bufp);
226
  }
227
 
228
#endif /* ! CGEN_INT_INSN_P */
229
 
230
  return NULL;
231
}
232
 
233
/* Default insn builder (insert handler).
234
   The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
235
   that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
236
   recorded in host byte order, otherwise BUFFER is an array of bytes
237
   and the value is recorded in target byte order).
238
   The result is an error message or NULL if success.  */
239
 
240
static const char *
241
insert_insn_normal (CGEN_CPU_DESC cd,
242
                    const CGEN_INSN * insn,
243
                    CGEN_FIELDS * fields,
244
                    CGEN_INSN_BYTES_PTR buffer,
245
                    bfd_vma pc)
246
{
247
  const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
248
  unsigned long value;
249
  const CGEN_SYNTAX_CHAR_TYPE * syn;
250
 
251
  CGEN_INIT_INSERT (cd);
252
  value = CGEN_INSN_BASE_VALUE (insn);
253
 
254
  /* If we're recording insns as numbers (rather than a string of bytes),
255
     target byte order handling is deferred until later.  */
256
 
257
#if CGEN_INT_INSN_P
258
 
259
  put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
260
                      CGEN_FIELDS_BITSIZE (fields), value);
261
 
262
#else
263
 
264
  cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
265
                                        (unsigned) CGEN_FIELDS_BITSIZE (fields)),
266
                       value);
267
 
268
#endif /* ! CGEN_INT_INSN_P */
269
 
270
  /* ??? It would be better to scan the format's fields.
271
     Still need to be able to insert a value based on the operand though;
272
     e.g. storing a branch displacement that got resolved later.
273
     Needs more thought first.  */
274
 
275
  for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
276
    {
277
      const char *errmsg;
278
 
279
      if (CGEN_SYNTAX_CHAR_P (* syn))
280
        continue;
281
 
282
      errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
283
                                       fields, buffer, pc);
284
      if (errmsg)
285
        return errmsg;
286
    }
287
 
288
  return NULL;
289
}
290
 
291
#if CGEN_INT_INSN_P
292
/* Cover function to store an insn value into an integral insn.  Must go here
293
   because it needs <prefix>-desc.h for CGEN_INT_INSN_P.  */
294
 
295
static void
296
put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
297
                    CGEN_INSN_BYTES_PTR buf,
298
                    int length,
299
                    int insn_length,
300
                    CGEN_INSN_INT value)
301
{
302
  /* For architectures with insns smaller than the base-insn-bitsize,
303
     length may be too big.  */
304
  if (length > insn_length)
305
    *buf = value;
306
  else
307
    {
308
      int shift = insn_length - length;
309
      /* Written this way to avoid undefined behaviour.  */
310
      CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
311
 
312
      *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
313
    }
314
}
315
#endif
316
 
317
/* Operand extraction.  */
318
 
319
#if ! CGEN_INT_INSN_P
320
 
321
/* Subroutine of extract_normal.
322
   Ensure sufficient bytes are cached in EX_INFO.
323
   OFFSET is the offset in bytes from the start of the insn of the value.
324
   BYTES is the length of the needed value.
325
   Returns 1 for success, 0 for failure.  */
326
 
327
static CGEN_INLINE int
328
fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
329
            CGEN_EXTRACT_INFO *ex_info,
330
            int offset,
331
            int bytes,
332
            bfd_vma pc)
333
{
334
  /* It's doubtful that the middle part has already been fetched so
335
     we don't optimize that case.  kiss.  */
336
  unsigned int mask;
337
  disassemble_info *info = (disassemble_info *) ex_info->dis_info;
338
 
339
  /* First do a quick check.  */
340
  mask = (1 << bytes) - 1;
341
  if (((ex_info->valid >> offset) & mask) == mask)
342
    return 1;
343
 
344
  /* Search for the first byte we need to read.  */
345
  for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
346
    if (! (mask & ex_info->valid))
347
      break;
348
 
349
  if (bytes)
350
    {
351
      int status;
352
 
353
      pc += offset;
354
      status = (*info->read_memory_func)
355
        (pc, ex_info->insn_bytes + offset, bytes, info);
356
 
357
      if (status != 0)
358
        {
359
          (*info->memory_error_func) (status, pc, info);
360
          return 0;
361
        }
362
 
363
      ex_info->valid |= ((1 << bytes) - 1) << offset;
364
    }
365
 
366
  return 1;
367
}
368
 
369
/* Subroutine of extract_normal.  */
370
 
371
static CGEN_INLINE long
372
extract_1 (CGEN_CPU_DESC cd,
373
           CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
374
           int start,
375
           int length,
376
           int word_length,
377
           unsigned char *bufp,
378
           bfd_vma pc ATTRIBUTE_UNUSED)
379
{
380
  unsigned long x;
381
  int shift;
382
 
383
  x = cgen_get_insn_value (cd, bufp, word_length);
384
 
385
  if (CGEN_INSN_LSB0_P)
386
    shift = (start + 1) - length;
387
  else
388
    shift = (word_length - (start + length));
389
  return x >> shift;
390
}
391
 
392
#endif /* ! CGEN_INT_INSN_P */
393
 
394
/* Default extraction routine.
395
 
396
   INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
397
   or sometimes less for cases like the m32r where the base insn size is 32
398
   but some insns are 16 bits.
399
   ATTRS is a mask of the boolean attributes.  We only need `SIGNED',
400
   but for generality we take a bitmask of all of them.
401
   WORD_OFFSET is the offset in bits from the start of the insn of the value.
402
   WORD_LENGTH is the length of the word in bits in which the value resides.
403
   START is the starting bit number in the word, architecture origin.
404
   LENGTH is the length of VALUE in bits.
405
   TOTAL_LENGTH is the total length of the insn in bits.
406
 
407
   Returns 1 for success, 0 for failure.  */
408
 
409
/* ??? The return code isn't properly used.  wip.  */
410
 
411
/* ??? This doesn't handle bfd_vma's.  Create another function when
412
   necessary.  */
413
 
414
static int
415
extract_normal (CGEN_CPU_DESC cd,
416
#if ! CGEN_INT_INSN_P
417
                CGEN_EXTRACT_INFO *ex_info,
418
#else
419
                CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
420
#endif
421
                CGEN_INSN_INT insn_value,
422
                unsigned int attrs,
423
                unsigned int word_offset,
424
                unsigned int start,
425
                unsigned int length,
426
                unsigned int word_length,
427
                unsigned int total_length,
428
#if ! CGEN_INT_INSN_P
429
                bfd_vma pc,
430
#else
431
                bfd_vma pc ATTRIBUTE_UNUSED,
432
#endif
433
                long *valuep)
434
{
435
  long value, mask;
436
 
437
  /* If LENGTH is zero, this operand doesn't contribute to the value
438
     so give it a standard value of zero.  */
439
  if (length == 0)
440
    {
441
      *valuep = 0;
442
      return 1;
443
    }
444
 
445
  if (word_length > 8 * sizeof (CGEN_INSN_INT))
446
    abort ();
447
 
448
  /* For architectures with insns smaller than the insn-base-bitsize,
449
     word_length may be too big.  */
450
  if (cd->min_insn_bitsize < cd->base_insn_bitsize)
451
    {
452
      if (word_offset + word_length > total_length)
453
        word_length = total_length - word_offset;
454
    }
455
 
456
  /* Does the value reside in INSN_VALUE, and at the right alignment?  */
457
 
458
  if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
459
    {
460
      if (CGEN_INSN_LSB0_P)
461
        value = insn_value >> ((word_offset + start + 1) - length);
462
      else
463
        value = insn_value >> (total_length - ( word_offset + start + length));
464
    }
465
 
466
#if ! CGEN_INT_INSN_P
467
 
468
  else
469
    {
470
      unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
471
 
472
      if (word_length > 8 * sizeof (CGEN_INSN_INT))
473
        abort ();
474
 
475
      if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
476
        return 0;
477
 
478
      value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
479
    }
480
 
481
#endif /* ! CGEN_INT_INSN_P */
482
 
483
  /* Written this way to avoid undefined behaviour.  */
484
  mask = (((1L << (length - 1)) - 1) << 1) | 1;
485
 
486
  value &= mask;
487
  /* sign extend? */
488
  if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
489
      && (value & (1L << (length - 1))))
490
    value |= ~mask;
491
 
492
  *valuep = value;
493
 
494
  return 1;
495
}
496
 
497
/* Default insn extractor.
498
 
499
   INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
500
   The extracted fields are stored in FIELDS.
501
   EX_INFO is used to handle reading variable length insns.
502
   Return the length of the insn in bits, or 0 if no match,
503
   or -1 if an error occurs fetching data (memory_error_func will have
504
   been called).  */
505
 
506
static int
507
extract_insn_normal (CGEN_CPU_DESC cd,
508
                     const CGEN_INSN *insn,
509
                     CGEN_EXTRACT_INFO *ex_info,
510
                     CGEN_INSN_INT insn_value,
511
                     CGEN_FIELDS *fields,
512
                     bfd_vma pc)
513
{
514
  const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
515
  const CGEN_SYNTAX_CHAR_TYPE *syn;
516
 
517
  CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
518
 
519
  CGEN_INIT_EXTRACT (cd);
520
 
521
  for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
522
    {
523
      int length;
524
 
525
      if (CGEN_SYNTAX_CHAR_P (*syn))
526
        continue;
527
 
528
      length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
529
                                        ex_info, insn_value, fields, pc);
530
      if (length <= 0)
531
        return length;
532
    }
533
 
534
  /* We recognized and successfully extracted this insn.  */
535
  return CGEN_INSN_BITSIZE (insn);
536
}
537
 
538
/* Machine generated code added here.  */
539
 
540
const char * xc16x_cgen_insert_operand
541
  (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
542
 
543
/* Main entry point for operand insertion.
544
 
545
   This function is basically just a big switch statement.  Earlier versions
546
   used tables to look up the function to use, but
547
   - if the table contains both assembler and disassembler functions then
548
     the disassembler contains much of the assembler and vice-versa,
549
   - there's a lot of inlining possibilities as things grow,
550
   - using a switch statement avoids the function call overhead.
551
 
552
   This function could be moved into `parse_insn_normal', but keeping it
553
   separate makes clear the interface between `parse_insn_normal' and each of
554
   the handlers.  It's also needed by GAS to insert operands that couldn't be
555
   resolved during parsing.  */
556
 
557
const char *
558
xc16x_cgen_insert_operand (CGEN_CPU_DESC cd,
559
                             int opindex,
560
                             CGEN_FIELDS * fields,
561
                             CGEN_INSN_BYTES_PTR buffer,
562
                             bfd_vma pc ATTRIBUTE_UNUSED)
563
{
564
  const char * errmsg = NULL;
565
  unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
566
 
567
  switch (opindex)
568
    {
569
    case XC16X_OPERAND_REGNAM :
570
      errmsg = insert_normal (cd, fields->f_reg8, 0, 0, 15, 8, 32, total_length, buffer);
571
      break;
572
    case XC16X_OPERAND_BIT01 :
573
      errmsg = insert_normal (cd, fields->f_op_1bit, 0, 0, 8, 1, 32, total_length, buffer);
574
      break;
575
    case XC16X_OPERAND_BIT1 :
576
      errmsg = insert_normal (cd, fields->f_op_bit1, 0, 0, 11, 1, 32, total_length, buffer);
577
      break;
578
    case XC16X_OPERAND_BIT2 :
579
      errmsg = insert_normal (cd, fields->f_op_bit2, 0, 0, 11, 2, 32, total_length, buffer);
580
      break;
581
    case XC16X_OPERAND_BIT4 :
582
      errmsg = insert_normal (cd, fields->f_op_bit4, 0, 0, 11, 4, 32, total_length, buffer);
583
      break;
584
    case XC16X_OPERAND_BIT8 :
585
      errmsg = insert_normal (cd, fields->f_op_bit8, 0, 0, 31, 8, 32, total_length, buffer);
586
      break;
587
    case XC16X_OPERAND_BITONE :
588
      errmsg = insert_normal (cd, fields->f_op_onebit, 0, 0, 9, 1, 32, total_length, buffer);
589
      break;
590
    case XC16X_OPERAND_CADDR :
591
      errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, buffer);
592
      break;
593
    case XC16X_OPERAND_COND :
594
      errmsg = insert_normal (cd, fields->f_condcode, 0, 0, 7, 4, 32, total_length, buffer);
595
      break;
596
    case XC16X_OPERAND_DATA8 :
597
      errmsg = insert_normal (cd, fields->f_data8, 0, 0, 23, 8, 32, total_length, buffer);
598
      break;
599
    case XC16X_OPERAND_DATAHI8 :
600
      errmsg = insert_normal (cd, fields->f_datahi8, 0, 0, 31, 8, 32, total_length, buffer);
601
      break;
602
    case XC16X_OPERAND_DOT :
603
      break;
604
    case XC16X_OPERAND_DR :
605
      errmsg = insert_normal (cd, fields->f_r1, 0, 0, 15, 4, 32, total_length, buffer);
606
      break;
607
    case XC16X_OPERAND_DRB :
608
      errmsg = insert_normal (cd, fields->f_r1, 0, 0, 15, 4, 32, total_length, buffer);
609
      break;
610
    case XC16X_OPERAND_DRI :
611
      errmsg = insert_normal (cd, fields->f_r4, 0, 0, 11, 4, 32, total_length, buffer);
612
      break;
613
    case XC16X_OPERAND_EXTCOND :
614
      errmsg = insert_normal (cd, fields->f_extccode, 0, 0, 15, 5, 32, total_length, buffer);
615
      break;
616
    case XC16X_OPERAND_GENREG :
617
      errmsg = insert_normal (cd, fields->f_regb8, 0, 0, 15, 8, 32, total_length, buffer);
618
      break;
619
    case XC16X_OPERAND_HASH :
620
      break;
621
    case XC16X_OPERAND_ICOND :
622
      errmsg = insert_normal (cd, fields->f_icondcode, 0, 0, 15, 4, 32, total_length, buffer);
623
      break;
624
    case XC16X_OPERAND_LBIT2 :
625
      errmsg = insert_normal (cd, fields->f_op_lbit2, 0, 0, 15, 2, 32, total_length, buffer);
626
      break;
627
    case XC16X_OPERAND_LBIT4 :
628
      errmsg = insert_normal (cd, fields->f_op_lbit4, 0, 0, 15, 4, 32, total_length, buffer);
629
      break;
630
    case XC16X_OPERAND_MASK8 :
631
      errmsg = insert_normal (cd, fields->f_mask8, 0, 0, 23, 8, 32, total_length, buffer);
632
      break;
633
    case XC16X_OPERAND_MASKLO8 :
634
      errmsg = insert_normal (cd, fields->f_datahi8, 0, 0, 31, 8, 32, total_length, buffer);
635
      break;
636
    case XC16X_OPERAND_MEMGR8 :
637
      errmsg = insert_normal (cd, fields->f_memgr8, 0, 0, 31, 16, 32, total_length, buffer);
638
      break;
639
    case XC16X_OPERAND_MEMORY :
640
      errmsg = insert_normal (cd, fields->f_memory, 0, 0, 31, 16, 32, total_length, buffer);
641
      break;
642
    case XC16X_OPERAND_PAG :
643
      break;
644
    case XC16X_OPERAND_PAGENUM :
645
      errmsg = insert_normal (cd, fields->f_pagenum, 0, 0, 25, 10, 32, total_length, buffer);
646
      break;
647
    case XC16X_OPERAND_POF :
648
      break;
649
    case XC16X_OPERAND_QBIT :
650
      errmsg = insert_normal (cd, fields->f_qbit, 0, 0, 7, 4, 32, total_length, buffer);
651
      break;
652
    case XC16X_OPERAND_QHIBIT :
653
      errmsg = insert_normal (cd, fields->f_qhibit, 0, 0, 27, 4, 32, total_length, buffer);
654
      break;
655
    case XC16X_OPERAND_QLOBIT :
656
      errmsg = insert_normal (cd, fields->f_qlobit, 0, 0, 31, 4, 32, total_length, buffer);
657
      break;
658
    case XC16X_OPERAND_REG8 :
659
      errmsg = insert_normal (cd, fields->f_reg8, 0, 0, 15, 8, 32, total_length, buffer);
660
      break;
661
    case XC16X_OPERAND_REGB8 :
662
      errmsg = insert_normal (cd, fields->f_regb8, 0, 0, 15, 8, 32, total_length, buffer);
663
      break;
664
    case XC16X_OPERAND_REGBMEM8 :
665
      errmsg = insert_normal (cd, fields->f_regmem8, 0, 0, 15, 8, 32, total_length, buffer);
666
      break;
667
    case XC16X_OPERAND_REGHI8 :
668
      errmsg = insert_normal (cd, fields->f_reghi8, 0, 0, 23, 8, 32, total_length, buffer);
669
      break;
670
    case XC16X_OPERAND_REGMEM8 :
671
      errmsg = insert_normal (cd, fields->f_regmem8, 0, 0, 15, 8, 32, total_length, buffer);
672
      break;
673
    case XC16X_OPERAND_REGOFF8 :
674
      errmsg = insert_normal (cd, fields->f_regoff8, 0, 0, 15, 8, 32, total_length, buffer);
675
      break;
676
    case XC16X_OPERAND_REL :
677
      errmsg = insert_normal (cd, fields->f_rel8, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 8, 32, total_length, buffer);
678
      break;
679
    case XC16X_OPERAND_RELHI :
680
      errmsg = insert_normal (cd, fields->f_relhi8, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 23, 8, 32, total_length, buffer);
681
      break;
682
    case XC16X_OPERAND_SEG :
683
      errmsg = insert_normal (cd, fields->f_seg8, 0, 0, 15, 8, 32, total_length, buffer);
684
      break;
685
    case XC16X_OPERAND_SEGHI8 :
686
      errmsg = insert_normal (cd, fields->f_segnum8, 0, 0, 23, 8, 32, total_length, buffer);
687
      break;
688
    case XC16X_OPERAND_SEGM :
689
      break;
690
    case XC16X_OPERAND_SOF :
691
      break;
692
    case XC16X_OPERAND_SR :
693
      errmsg = insert_normal (cd, fields->f_r2, 0, 0, 11, 4, 32, total_length, buffer);
694
      break;
695
    case XC16X_OPERAND_SR2 :
696
      errmsg = insert_normal (cd, fields->f_r0, 0, 0, 9, 2, 32, total_length, buffer);
697
      break;
698
    case XC16X_OPERAND_SRB :
699
      errmsg = insert_normal (cd, fields->f_r2, 0, 0, 11, 4, 32, total_length, buffer);
700
      break;
701
    case XC16X_OPERAND_SRC1 :
702
      errmsg = insert_normal (cd, fields->f_r1, 0, 0, 15, 4, 32, total_length, buffer);
703
      break;
704
    case XC16X_OPERAND_SRC2 :
705
      errmsg = insert_normal (cd, fields->f_r2, 0, 0, 11, 4, 32, total_length, buffer);
706
      break;
707
    case XC16X_OPERAND_SRDIV :
708
      errmsg = insert_normal (cd, fields->f_reg8, 0, 0, 15, 8, 32, total_length, buffer);
709
      break;
710
    case XC16X_OPERAND_U4 :
711
      errmsg = insert_normal (cd, fields->f_uimm4, 0, 0, 15, 4, 32, total_length, buffer);
712
      break;
713
    case XC16X_OPERAND_UIMM16 :
714
      errmsg = insert_normal (cd, fields->f_uimm16, 0, 0, 31, 16, 32, total_length, buffer);
715
      break;
716
    case XC16X_OPERAND_UIMM2 :
717
      errmsg = insert_normal (cd, fields->f_uimm2, 0, 0, 13, 2, 32, total_length, buffer);
718
      break;
719
    case XC16X_OPERAND_UIMM3 :
720
      errmsg = insert_normal (cd, fields->f_uimm3, 0, 0, 10, 3, 32, total_length, buffer);
721
      break;
722
    case XC16X_OPERAND_UIMM4 :
723
      errmsg = insert_normal (cd, fields->f_uimm4, 0, 0, 15, 4, 32, total_length, buffer);
724
      break;
725
    case XC16X_OPERAND_UIMM7 :
726
      errmsg = insert_normal (cd, fields->f_uimm7, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 7, 32, total_length, buffer);
727
      break;
728
    case XC16X_OPERAND_UIMM8 :
729
      errmsg = insert_normal (cd, fields->f_uimm8, 0, 0, 23, 8, 32, total_length, buffer);
730
      break;
731
    case XC16X_OPERAND_UPAG16 :
732
      errmsg = insert_normal (cd, fields->f_uimm16, 0, 0, 31, 16, 32, total_length, buffer);
733
      break;
734
    case XC16X_OPERAND_UPOF16 :
735
      errmsg = insert_normal (cd, fields->f_memory, 0, 0, 31, 16, 32, total_length, buffer);
736
      break;
737
    case XC16X_OPERAND_USEG16 :
738
      errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, buffer);
739
      break;
740
    case XC16X_OPERAND_USEG8 :
741
      errmsg = insert_normal (cd, fields->f_seg8, 0, 0, 15, 8, 32, total_length, buffer);
742
      break;
743
    case XC16X_OPERAND_USOF16 :
744
      errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, buffer);
745
      break;
746
 
747
    default :
748
      /* xgettext:c-format */
749
      fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
750
               opindex);
751
      abort ();
752
  }
753
 
754
  return errmsg;
755
}
756
 
757
int xc16x_cgen_extract_operand
758
  (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
759
 
760
/* Main entry point for operand extraction.
761
   The result is <= 0 for error, >0 for success.
762
   ??? Actual values aren't well defined right now.
763
 
764
   This function is basically just a big switch statement.  Earlier versions
765
   used tables to look up the function to use, but
766
   - if the table contains both assembler and disassembler functions then
767
     the disassembler contains much of the assembler and vice-versa,
768
   - there's a lot of inlining possibilities as things grow,
769
   - using a switch statement avoids the function call overhead.
770
 
771
   This function could be moved into `print_insn_normal', but keeping it
772
   separate makes clear the interface between `print_insn_normal' and each of
773
   the handlers.  */
774
 
775
int
776
xc16x_cgen_extract_operand (CGEN_CPU_DESC cd,
777
                             int opindex,
778
                             CGEN_EXTRACT_INFO *ex_info,
779
                             CGEN_INSN_INT insn_value,
780
                             CGEN_FIELDS * fields,
781
                             bfd_vma pc)
782
{
783
  /* Assume success (for those operands that are nops).  */
784
  int length = 1;
785
  unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
786
 
787
  switch (opindex)
788
    {
789
    case XC16X_OPERAND_REGNAM :
790
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_reg8);
791
      break;
792
    case XC16X_OPERAND_BIT01 :
793
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 1, 32, total_length, pc, & fields->f_op_1bit);
794
      break;
795
    case XC16X_OPERAND_BIT1 :
796
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_op_bit1);
797
      break;
798
    case XC16X_OPERAND_BIT2 :
799
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 2, 32, total_length, pc, & fields->f_op_bit2);
800
      break;
801
    case XC16X_OPERAND_BIT4 :
802
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_op_bit4);
803
      break;
804
    case XC16X_OPERAND_BIT8 :
805
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 8, 32, total_length, pc, & fields->f_op_bit8);
806
      break;
807
    case XC16X_OPERAND_BITONE :
808
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_op_onebit);
809
      break;
810
    case XC16X_OPERAND_CADDR :
811
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, pc, & fields->f_offset16);
812
      break;
813
    case XC16X_OPERAND_COND :
814
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 4, 32, total_length, pc, & fields->f_condcode);
815
      break;
816
    case XC16X_OPERAND_DATA8 :
817
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_data8);
818
      break;
819
    case XC16X_OPERAND_DATAHI8 :
820
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 8, 32, total_length, pc, & fields->f_datahi8);
821
      break;
822
    case XC16X_OPERAND_DOT :
823
      break;
824
    case XC16X_OPERAND_DR :
825
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_r1);
826
      break;
827
    case XC16X_OPERAND_DRB :
828
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_r1);
829
      break;
830
    case XC16X_OPERAND_DRI :
831
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r4);
832
      break;
833
    case XC16X_OPERAND_EXTCOND :
834
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_extccode);
835
      break;
836
    case XC16X_OPERAND_GENREG :
837
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regb8);
838
      break;
839
    case XC16X_OPERAND_HASH :
840
      break;
841
    case XC16X_OPERAND_ICOND :
842
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_icondcode);
843
      break;
844
    case XC16X_OPERAND_LBIT2 :
845
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 2, 32, total_length, pc, & fields->f_op_lbit2);
846
      break;
847
    case XC16X_OPERAND_LBIT4 :
848
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_op_lbit4);
849
      break;
850
    case XC16X_OPERAND_MASK8 :
851
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_mask8);
852
      break;
853
    case XC16X_OPERAND_MASKLO8 :
854
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 8, 32, total_length, pc, & fields->f_datahi8);
855
      break;
856
    case XC16X_OPERAND_MEMGR8 :
857
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_memgr8);
858
      break;
859
    case XC16X_OPERAND_MEMORY :
860
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_memory);
861
      break;
862
    case XC16X_OPERAND_PAG :
863
      break;
864
    case XC16X_OPERAND_PAGENUM :
865
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 10, 32, total_length, pc, & fields->f_pagenum);
866
      break;
867
    case XC16X_OPERAND_POF :
868
      break;
869
    case XC16X_OPERAND_QBIT :
870
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 4, 32, total_length, pc, & fields->f_qbit);
871
      break;
872
    case XC16X_OPERAND_QHIBIT :
873
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 27, 4, 32, total_length, pc, & fields->f_qhibit);
874
      break;
875
    case XC16X_OPERAND_QLOBIT :
876
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 4, 32, total_length, pc, & fields->f_qlobit);
877
      break;
878
    case XC16X_OPERAND_REG8 :
879
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_reg8);
880
      break;
881
    case XC16X_OPERAND_REGB8 :
882
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regb8);
883
      break;
884
    case XC16X_OPERAND_REGBMEM8 :
885
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regmem8);
886
      break;
887
    case XC16X_OPERAND_REGHI8 :
888
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_reghi8);
889
      break;
890
    case XC16X_OPERAND_REGMEM8 :
891
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regmem8);
892
      break;
893
    case XC16X_OPERAND_REGOFF8 :
894
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regoff8);
895
      break;
896
    case XC16X_OPERAND_REL :
897
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 8, 32, total_length, pc, & fields->f_rel8);
898
      break;
899
    case XC16X_OPERAND_RELHI :
900
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 23, 8, 32, total_length, pc, & fields->f_relhi8);
901
      break;
902
    case XC16X_OPERAND_SEG :
903
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_seg8);
904
      break;
905
    case XC16X_OPERAND_SEGHI8 :
906
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_segnum8);
907
      break;
908
    case XC16X_OPERAND_SEGM :
909
      break;
910
    case XC16X_OPERAND_SOF :
911
      break;
912
    case XC16X_OPERAND_SR :
913
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r2);
914
      break;
915
    case XC16X_OPERAND_SR2 :
916
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 2, 32, total_length, pc, & fields->f_r0);
917
      break;
918
    case XC16X_OPERAND_SRB :
919
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r2);
920
      break;
921
    case XC16X_OPERAND_SRC1 :
922
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_r1);
923
      break;
924
    case XC16X_OPERAND_SRC2 :
925
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r2);
926
      break;
927
    case XC16X_OPERAND_SRDIV :
928
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_reg8);
929
      break;
930
    case XC16X_OPERAND_U4 :
931
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_uimm4);
932
      break;
933
    case XC16X_OPERAND_UIMM16 :
934
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_uimm16);
935
      break;
936
    case XC16X_OPERAND_UIMM2 :
937
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 2, 32, total_length, pc, & fields->f_uimm2);
938
      break;
939
    case XC16X_OPERAND_UIMM3 :
940
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 3, 32, total_length, pc, & fields->f_uimm3);
941
      break;
942
    case XC16X_OPERAND_UIMM4 :
943
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_uimm4);
944
      break;
945
    case XC16X_OPERAND_UIMM7 :
946
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 7, 32, total_length, pc, & fields->f_uimm7);
947
      break;
948
    case XC16X_OPERAND_UIMM8 :
949
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_uimm8);
950
      break;
951
    case XC16X_OPERAND_UPAG16 :
952
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_uimm16);
953
      break;
954
    case XC16X_OPERAND_UPOF16 :
955
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_memory);
956
      break;
957
    case XC16X_OPERAND_USEG16 :
958
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, pc, & fields->f_offset16);
959
      break;
960
    case XC16X_OPERAND_USEG8 :
961
      length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_seg8);
962
      break;
963
    case XC16X_OPERAND_USOF16 :
964
      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, pc, & fields->f_offset16);
965
      break;
966
 
967
    default :
968
      /* xgettext:c-format */
969
      fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"),
970
               opindex);
971
      abort ();
972
    }
973
 
974
  return length;
975
}
976
 
977
cgen_insert_fn * const xc16x_cgen_insert_handlers[] =
978
{
979
  insert_insn_normal,
980
};
981
 
982
cgen_extract_fn * const xc16x_cgen_extract_handlers[] =
983
{
984
  extract_insn_normal,
985
};
986
 
987
int xc16x_cgen_get_int_operand     (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
988
bfd_vma xc16x_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
989
 
990
/* Getting values from cgen_fields is handled by a collection of functions.
991
   They are distinguished by the type of the VALUE argument they return.
992
   TODO: floating point, inlining support, remove cases where result type
993
   not appropriate.  */
994
 
995
int
996
xc16x_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
997
                             int opindex,
998
                             const CGEN_FIELDS * fields)
999
{
1000
  int value;
1001
 
1002
  switch (opindex)
1003
    {
1004
    case XC16X_OPERAND_REGNAM :
1005
      value = fields->f_reg8;
1006
      break;
1007
    case XC16X_OPERAND_BIT01 :
1008
      value = fields->f_op_1bit;
1009
      break;
1010
    case XC16X_OPERAND_BIT1 :
1011
      value = fields->f_op_bit1;
1012
      break;
1013
    case XC16X_OPERAND_BIT2 :
1014
      value = fields->f_op_bit2;
1015
      break;
1016
    case XC16X_OPERAND_BIT4 :
1017
      value = fields->f_op_bit4;
1018
      break;
1019
    case XC16X_OPERAND_BIT8 :
1020
      value = fields->f_op_bit8;
1021
      break;
1022
    case XC16X_OPERAND_BITONE :
1023
      value = fields->f_op_onebit;
1024
      break;
1025
    case XC16X_OPERAND_CADDR :
1026
      value = fields->f_offset16;
1027
      break;
1028
    case XC16X_OPERAND_COND :
1029
      value = fields->f_condcode;
1030
      break;
1031
    case XC16X_OPERAND_DATA8 :
1032
      value = fields->f_data8;
1033
      break;
1034
    case XC16X_OPERAND_DATAHI8 :
1035
      value = fields->f_datahi8;
1036
      break;
1037
    case XC16X_OPERAND_DOT :
1038
      value = 0;
1039
      break;
1040
    case XC16X_OPERAND_DR :
1041
      value = fields->f_r1;
1042
      break;
1043
    case XC16X_OPERAND_DRB :
1044
      value = fields->f_r1;
1045
      break;
1046
    case XC16X_OPERAND_DRI :
1047
      value = fields->f_r4;
1048
      break;
1049
    case XC16X_OPERAND_EXTCOND :
1050
      value = fields->f_extccode;
1051
      break;
1052
    case XC16X_OPERAND_GENREG :
1053
      value = fields->f_regb8;
1054
      break;
1055
    case XC16X_OPERAND_HASH :
1056
      value = 0;
1057
      break;
1058
    case XC16X_OPERAND_ICOND :
1059
      value = fields->f_icondcode;
1060
      break;
1061
    case XC16X_OPERAND_LBIT2 :
1062
      value = fields->f_op_lbit2;
1063
      break;
1064
    case XC16X_OPERAND_LBIT4 :
1065
      value = fields->f_op_lbit4;
1066
      break;
1067
    case XC16X_OPERAND_MASK8 :
1068
      value = fields->f_mask8;
1069
      break;
1070
    case XC16X_OPERAND_MASKLO8 :
1071
      value = fields->f_datahi8;
1072
      break;
1073
    case XC16X_OPERAND_MEMGR8 :
1074
      value = fields->f_memgr8;
1075
      break;
1076
    case XC16X_OPERAND_MEMORY :
1077
      value = fields->f_memory;
1078
      break;
1079
    case XC16X_OPERAND_PAG :
1080
      value = 0;
1081
      break;
1082
    case XC16X_OPERAND_PAGENUM :
1083
      value = fields->f_pagenum;
1084
      break;
1085
    case XC16X_OPERAND_POF :
1086
      value = 0;
1087
      break;
1088
    case XC16X_OPERAND_QBIT :
1089
      value = fields->f_qbit;
1090
      break;
1091
    case XC16X_OPERAND_QHIBIT :
1092
      value = fields->f_qhibit;
1093
      break;
1094
    case XC16X_OPERAND_QLOBIT :
1095
      value = fields->f_qlobit;
1096
      break;
1097
    case XC16X_OPERAND_REG8 :
1098
      value = fields->f_reg8;
1099
      break;
1100
    case XC16X_OPERAND_REGB8 :
1101
      value = fields->f_regb8;
1102
      break;
1103
    case XC16X_OPERAND_REGBMEM8 :
1104
      value = fields->f_regmem8;
1105
      break;
1106
    case XC16X_OPERAND_REGHI8 :
1107
      value = fields->f_reghi8;
1108
      break;
1109
    case XC16X_OPERAND_REGMEM8 :
1110
      value = fields->f_regmem8;
1111
      break;
1112
    case XC16X_OPERAND_REGOFF8 :
1113
      value = fields->f_regoff8;
1114
      break;
1115
    case XC16X_OPERAND_REL :
1116
      value = fields->f_rel8;
1117
      break;
1118
    case XC16X_OPERAND_RELHI :
1119
      value = fields->f_relhi8;
1120
      break;
1121
    case XC16X_OPERAND_SEG :
1122
      value = fields->f_seg8;
1123
      break;
1124
    case XC16X_OPERAND_SEGHI8 :
1125
      value = fields->f_segnum8;
1126
      break;
1127
    case XC16X_OPERAND_SEGM :
1128
      value = 0;
1129
      break;
1130
    case XC16X_OPERAND_SOF :
1131
      value = 0;
1132
      break;
1133
    case XC16X_OPERAND_SR :
1134
      value = fields->f_r2;
1135
      break;
1136
    case XC16X_OPERAND_SR2 :
1137
      value = fields->f_r0;
1138
      break;
1139
    case XC16X_OPERAND_SRB :
1140
      value = fields->f_r2;
1141
      break;
1142
    case XC16X_OPERAND_SRC1 :
1143
      value = fields->f_r1;
1144
      break;
1145
    case XC16X_OPERAND_SRC2 :
1146
      value = fields->f_r2;
1147
      break;
1148
    case XC16X_OPERAND_SRDIV :
1149
      value = fields->f_reg8;
1150
      break;
1151
    case XC16X_OPERAND_U4 :
1152
      value = fields->f_uimm4;
1153
      break;
1154
    case XC16X_OPERAND_UIMM16 :
1155
      value = fields->f_uimm16;
1156
      break;
1157
    case XC16X_OPERAND_UIMM2 :
1158
      value = fields->f_uimm2;
1159
      break;
1160
    case XC16X_OPERAND_UIMM3 :
1161
      value = fields->f_uimm3;
1162
      break;
1163
    case XC16X_OPERAND_UIMM4 :
1164
      value = fields->f_uimm4;
1165
      break;
1166
    case XC16X_OPERAND_UIMM7 :
1167
      value = fields->f_uimm7;
1168
      break;
1169
    case XC16X_OPERAND_UIMM8 :
1170
      value = fields->f_uimm8;
1171
      break;
1172
    case XC16X_OPERAND_UPAG16 :
1173
      value = fields->f_uimm16;
1174
      break;
1175
    case XC16X_OPERAND_UPOF16 :
1176
      value = fields->f_memory;
1177
      break;
1178
    case XC16X_OPERAND_USEG16 :
1179
      value = fields->f_offset16;
1180
      break;
1181
    case XC16X_OPERAND_USEG8 :
1182
      value = fields->f_seg8;
1183
      break;
1184
    case XC16X_OPERAND_USOF16 :
1185
      value = fields->f_offset16;
1186
      break;
1187
 
1188
    default :
1189
      /* xgettext:c-format */
1190
      fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"),
1191
                       opindex);
1192
      abort ();
1193
  }
1194
 
1195
  return value;
1196
}
1197
 
1198
bfd_vma
1199
xc16x_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1200
                             int opindex,
1201
                             const CGEN_FIELDS * fields)
1202
{
1203
  bfd_vma value;
1204
 
1205
  switch (opindex)
1206
    {
1207
    case XC16X_OPERAND_REGNAM :
1208
      value = fields->f_reg8;
1209
      break;
1210
    case XC16X_OPERAND_BIT01 :
1211
      value = fields->f_op_1bit;
1212
      break;
1213
    case XC16X_OPERAND_BIT1 :
1214
      value = fields->f_op_bit1;
1215
      break;
1216
    case XC16X_OPERAND_BIT2 :
1217
      value = fields->f_op_bit2;
1218
      break;
1219
    case XC16X_OPERAND_BIT4 :
1220
      value = fields->f_op_bit4;
1221
      break;
1222
    case XC16X_OPERAND_BIT8 :
1223
      value = fields->f_op_bit8;
1224
      break;
1225
    case XC16X_OPERAND_BITONE :
1226
      value = fields->f_op_onebit;
1227
      break;
1228
    case XC16X_OPERAND_CADDR :
1229
      value = fields->f_offset16;
1230
      break;
1231
    case XC16X_OPERAND_COND :
1232
      value = fields->f_condcode;
1233
      break;
1234
    case XC16X_OPERAND_DATA8 :
1235
      value = fields->f_data8;
1236
      break;
1237
    case XC16X_OPERAND_DATAHI8 :
1238
      value = fields->f_datahi8;
1239
      break;
1240
    case XC16X_OPERAND_DOT :
1241
      value = 0;
1242
      break;
1243
    case XC16X_OPERAND_DR :
1244
      value = fields->f_r1;
1245
      break;
1246
    case XC16X_OPERAND_DRB :
1247
      value = fields->f_r1;
1248
      break;
1249
    case XC16X_OPERAND_DRI :
1250
      value = fields->f_r4;
1251
      break;
1252
    case XC16X_OPERAND_EXTCOND :
1253
      value = fields->f_extccode;
1254
      break;
1255
    case XC16X_OPERAND_GENREG :
1256
      value = fields->f_regb8;
1257
      break;
1258
    case XC16X_OPERAND_HASH :
1259
      value = 0;
1260
      break;
1261
    case XC16X_OPERAND_ICOND :
1262
      value = fields->f_icondcode;
1263
      break;
1264
    case XC16X_OPERAND_LBIT2 :
1265
      value = fields->f_op_lbit2;
1266
      break;
1267
    case XC16X_OPERAND_LBIT4 :
1268
      value = fields->f_op_lbit4;
1269
      break;
1270
    case XC16X_OPERAND_MASK8 :
1271
      value = fields->f_mask8;
1272
      break;
1273
    case XC16X_OPERAND_MASKLO8 :
1274
      value = fields->f_datahi8;
1275
      break;
1276
    case XC16X_OPERAND_MEMGR8 :
1277
      value = fields->f_memgr8;
1278
      break;
1279
    case XC16X_OPERAND_MEMORY :
1280
      value = fields->f_memory;
1281
      break;
1282
    case XC16X_OPERAND_PAG :
1283
      value = 0;
1284
      break;
1285
    case XC16X_OPERAND_PAGENUM :
1286
      value = fields->f_pagenum;
1287
      break;
1288
    case XC16X_OPERAND_POF :
1289
      value = 0;
1290
      break;
1291
    case XC16X_OPERAND_QBIT :
1292
      value = fields->f_qbit;
1293
      break;
1294
    case XC16X_OPERAND_QHIBIT :
1295
      value = fields->f_qhibit;
1296
      break;
1297
    case XC16X_OPERAND_QLOBIT :
1298
      value = fields->f_qlobit;
1299
      break;
1300
    case XC16X_OPERAND_REG8 :
1301
      value = fields->f_reg8;
1302
      break;
1303
    case XC16X_OPERAND_REGB8 :
1304
      value = fields->f_regb8;
1305
      break;
1306
    case XC16X_OPERAND_REGBMEM8 :
1307
      value = fields->f_regmem8;
1308
      break;
1309
    case XC16X_OPERAND_REGHI8 :
1310
      value = fields->f_reghi8;
1311
      break;
1312
    case XC16X_OPERAND_REGMEM8 :
1313
      value = fields->f_regmem8;
1314
      break;
1315
    case XC16X_OPERAND_REGOFF8 :
1316
      value = fields->f_regoff8;
1317
      break;
1318
    case XC16X_OPERAND_REL :
1319
      value = fields->f_rel8;
1320
      break;
1321
    case XC16X_OPERAND_RELHI :
1322
      value = fields->f_relhi8;
1323
      break;
1324
    case XC16X_OPERAND_SEG :
1325
      value = fields->f_seg8;
1326
      break;
1327
    case XC16X_OPERAND_SEGHI8 :
1328
      value = fields->f_segnum8;
1329
      break;
1330
    case XC16X_OPERAND_SEGM :
1331
      value = 0;
1332
      break;
1333
    case XC16X_OPERAND_SOF :
1334
      value = 0;
1335
      break;
1336
    case XC16X_OPERAND_SR :
1337
      value = fields->f_r2;
1338
      break;
1339
    case XC16X_OPERAND_SR2 :
1340
      value = fields->f_r0;
1341
      break;
1342
    case XC16X_OPERAND_SRB :
1343
      value = fields->f_r2;
1344
      break;
1345
    case XC16X_OPERAND_SRC1 :
1346
      value = fields->f_r1;
1347
      break;
1348
    case XC16X_OPERAND_SRC2 :
1349
      value = fields->f_r2;
1350
      break;
1351
    case XC16X_OPERAND_SRDIV :
1352
      value = fields->f_reg8;
1353
      break;
1354
    case XC16X_OPERAND_U4 :
1355
      value = fields->f_uimm4;
1356
      break;
1357
    case XC16X_OPERAND_UIMM16 :
1358
      value = fields->f_uimm16;
1359
      break;
1360
    case XC16X_OPERAND_UIMM2 :
1361
      value = fields->f_uimm2;
1362
      break;
1363
    case XC16X_OPERAND_UIMM3 :
1364
      value = fields->f_uimm3;
1365
      break;
1366
    case XC16X_OPERAND_UIMM4 :
1367
      value = fields->f_uimm4;
1368
      break;
1369
    case XC16X_OPERAND_UIMM7 :
1370
      value = fields->f_uimm7;
1371
      break;
1372
    case XC16X_OPERAND_UIMM8 :
1373
      value = fields->f_uimm8;
1374
      break;
1375
    case XC16X_OPERAND_UPAG16 :
1376
      value = fields->f_uimm16;
1377
      break;
1378
    case XC16X_OPERAND_UPOF16 :
1379
      value = fields->f_memory;
1380
      break;
1381
    case XC16X_OPERAND_USEG16 :
1382
      value = fields->f_offset16;
1383
      break;
1384
    case XC16X_OPERAND_USEG8 :
1385
      value = fields->f_seg8;
1386
      break;
1387
    case XC16X_OPERAND_USOF16 :
1388
      value = fields->f_offset16;
1389
      break;
1390
 
1391
    default :
1392
      /* xgettext:c-format */
1393
      fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"),
1394
                       opindex);
1395
      abort ();
1396
  }
1397
 
1398
  return value;
1399
}
1400
 
1401
void xc16x_cgen_set_int_operand  (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
1402
void xc16x_cgen_set_vma_operand  (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
1403
 
1404
/* Stuffing values in cgen_fields is handled by a collection of functions.
1405
   They are distinguished by the type of the VALUE argument they accept.
1406
   TODO: floating point, inlining support, remove cases where argument type
1407
   not appropriate.  */
1408
 
1409
void
1410
xc16x_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1411
                             int opindex,
1412
                             CGEN_FIELDS * fields,
1413
                             int value)
1414
{
1415
  switch (opindex)
1416
    {
1417
    case XC16X_OPERAND_REGNAM :
1418
      fields->f_reg8 = value;
1419
      break;
1420
    case XC16X_OPERAND_BIT01 :
1421
      fields->f_op_1bit = value;
1422
      break;
1423
    case XC16X_OPERAND_BIT1 :
1424
      fields->f_op_bit1 = value;
1425
      break;
1426
    case XC16X_OPERAND_BIT2 :
1427
      fields->f_op_bit2 = value;
1428
      break;
1429
    case XC16X_OPERAND_BIT4 :
1430
      fields->f_op_bit4 = value;
1431
      break;
1432
    case XC16X_OPERAND_BIT8 :
1433
      fields->f_op_bit8 = value;
1434
      break;
1435
    case XC16X_OPERAND_BITONE :
1436
      fields->f_op_onebit = value;
1437
      break;
1438
    case XC16X_OPERAND_CADDR :
1439
      fields->f_offset16 = value;
1440
      break;
1441
    case XC16X_OPERAND_COND :
1442
      fields->f_condcode = value;
1443
      break;
1444
    case XC16X_OPERAND_DATA8 :
1445
      fields->f_data8 = value;
1446
      break;
1447
    case XC16X_OPERAND_DATAHI8 :
1448
      fields->f_datahi8 = value;
1449
      break;
1450
    case XC16X_OPERAND_DOT :
1451
      break;
1452
    case XC16X_OPERAND_DR :
1453
      fields->f_r1 = value;
1454
      break;
1455
    case XC16X_OPERAND_DRB :
1456
      fields->f_r1 = value;
1457
      break;
1458
    case XC16X_OPERAND_DRI :
1459
      fields->f_r4 = value;
1460
      break;
1461
    case XC16X_OPERAND_EXTCOND :
1462
      fields->f_extccode = value;
1463
      break;
1464
    case XC16X_OPERAND_GENREG :
1465
      fields->f_regb8 = value;
1466
      break;
1467
    case XC16X_OPERAND_HASH :
1468
      break;
1469
    case XC16X_OPERAND_ICOND :
1470
      fields->f_icondcode = value;
1471
      break;
1472
    case XC16X_OPERAND_LBIT2 :
1473
      fields->f_op_lbit2 = value;
1474
      break;
1475
    case XC16X_OPERAND_LBIT4 :
1476
      fields->f_op_lbit4 = value;
1477
      break;
1478
    case XC16X_OPERAND_MASK8 :
1479
      fields->f_mask8 = value;
1480
      break;
1481
    case XC16X_OPERAND_MASKLO8 :
1482
      fields->f_datahi8 = value;
1483
      break;
1484
    case XC16X_OPERAND_MEMGR8 :
1485
      fields->f_memgr8 = value;
1486
      break;
1487
    case XC16X_OPERAND_MEMORY :
1488
      fields->f_memory = value;
1489
      break;
1490
    case XC16X_OPERAND_PAG :
1491
      break;
1492
    case XC16X_OPERAND_PAGENUM :
1493
      fields->f_pagenum = value;
1494
      break;
1495
    case XC16X_OPERAND_POF :
1496
      break;
1497
    case XC16X_OPERAND_QBIT :
1498
      fields->f_qbit = value;
1499
      break;
1500
    case XC16X_OPERAND_QHIBIT :
1501
      fields->f_qhibit = value;
1502
      break;
1503
    case XC16X_OPERAND_QLOBIT :
1504
      fields->f_qlobit = value;
1505
      break;
1506
    case XC16X_OPERAND_REG8 :
1507
      fields->f_reg8 = value;
1508
      break;
1509
    case XC16X_OPERAND_REGB8 :
1510
      fields->f_regb8 = value;
1511
      break;
1512
    case XC16X_OPERAND_REGBMEM8 :
1513
      fields->f_regmem8 = value;
1514
      break;
1515
    case XC16X_OPERAND_REGHI8 :
1516
      fields->f_reghi8 = value;
1517
      break;
1518
    case XC16X_OPERAND_REGMEM8 :
1519
      fields->f_regmem8 = value;
1520
      break;
1521
    case XC16X_OPERAND_REGOFF8 :
1522
      fields->f_regoff8 = value;
1523
      break;
1524
    case XC16X_OPERAND_REL :
1525
      fields->f_rel8 = value;
1526
      break;
1527
    case XC16X_OPERAND_RELHI :
1528
      fields->f_relhi8 = value;
1529
      break;
1530
    case XC16X_OPERAND_SEG :
1531
      fields->f_seg8 = value;
1532
      break;
1533
    case XC16X_OPERAND_SEGHI8 :
1534
      fields->f_segnum8 = value;
1535
      break;
1536
    case XC16X_OPERAND_SEGM :
1537
      break;
1538
    case XC16X_OPERAND_SOF :
1539
      break;
1540
    case XC16X_OPERAND_SR :
1541
      fields->f_r2 = value;
1542
      break;
1543
    case XC16X_OPERAND_SR2 :
1544
      fields->f_r0 = value;
1545
      break;
1546
    case XC16X_OPERAND_SRB :
1547
      fields->f_r2 = value;
1548
      break;
1549
    case XC16X_OPERAND_SRC1 :
1550
      fields->f_r1 = value;
1551
      break;
1552
    case XC16X_OPERAND_SRC2 :
1553
      fields->f_r2 = value;
1554
      break;
1555
    case XC16X_OPERAND_SRDIV :
1556
      fields->f_reg8 = value;
1557
      break;
1558
    case XC16X_OPERAND_U4 :
1559
      fields->f_uimm4 = value;
1560
      break;
1561
    case XC16X_OPERAND_UIMM16 :
1562
      fields->f_uimm16 = value;
1563
      break;
1564
    case XC16X_OPERAND_UIMM2 :
1565
      fields->f_uimm2 = value;
1566
      break;
1567
    case XC16X_OPERAND_UIMM3 :
1568
      fields->f_uimm3 = value;
1569
      break;
1570
    case XC16X_OPERAND_UIMM4 :
1571
      fields->f_uimm4 = value;
1572
      break;
1573
    case XC16X_OPERAND_UIMM7 :
1574
      fields->f_uimm7 = value;
1575
      break;
1576
    case XC16X_OPERAND_UIMM8 :
1577
      fields->f_uimm8 = value;
1578
      break;
1579
    case XC16X_OPERAND_UPAG16 :
1580
      fields->f_uimm16 = value;
1581
      break;
1582
    case XC16X_OPERAND_UPOF16 :
1583
      fields->f_memory = value;
1584
      break;
1585
    case XC16X_OPERAND_USEG16 :
1586
      fields->f_offset16 = value;
1587
      break;
1588
    case XC16X_OPERAND_USEG8 :
1589
      fields->f_seg8 = value;
1590
      break;
1591
    case XC16X_OPERAND_USOF16 :
1592
      fields->f_offset16 = value;
1593
      break;
1594
 
1595
    default :
1596
      /* xgettext:c-format */
1597
      fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"),
1598
                       opindex);
1599
      abort ();
1600
  }
1601
}
1602
 
1603
void
1604
xc16x_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1605
                             int opindex,
1606
                             CGEN_FIELDS * fields,
1607
                             bfd_vma value)
1608
{
1609
  switch (opindex)
1610
    {
1611
    case XC16X_OPERAND_REGNAM :
1612
      fields->f_reg8 = value;
1613
      break;
1614
    case XC16X_OPERAND_BIT01 :
1615
      fields->f_op_1bit = value;
1616
      break;
1617
    case XC16X_OPERAND_BIT1 :
1618
      fields->f_op_bit1 = value;
1619
      break;
1620
    case XC16X_OPERAND_BIT2 :
1621
      fields->f_op_bit2 = value;
1622
      break;
1623
    case XC16X_OPERAND_BIT4 :
1624
      fields->f_op_bit4 = value;
1625
      break;
1626
    case XC16X_OPERAND_BIT8 :
1627
      fields->f_op_bit8 = value;
1628
      break;
1629
    case XC16X_OPERAND_BITONE :
1630
      fields->f_op_onebit = value;
1631
      break;
1632
    case XC16X_OPERAND_CADDR :
1633
      fields->f_offset16 = value;
1634
      break;
1635
    case XC16X_OPERAND_COND :
1636
      fields->f_condcode = value;
1637
      break;
1638
    case XC16X_OPERAND_DATA8 :
1639
      fields->f_data8 = value;
1640
      break;
1641
    case XC16X_OPERAND_DATAHI8 :
1642
      fields->f_datahi8 = value;
1643
      break;
1644
    case XC16X_OPERAND_DOT :
1645
      break;
1646
    case XC16X_OPERAND_DR :
1647
      fields->f_r1 = value;
1648
      break;
1649
    case XC16X_OPERAND_DRB :
1650
      fields->f_r1 = value;
1651
      break;
1652
    case XC16X_OPERAND_DRI :
1653
      fields->f_r4 = value;
1654
      break;
1655
    case XC16X_OPERAND_EXTCOND :
1656
      fields->f_extccode = value;
1657
      break;
1658
    case XC16X_OPERAND_GENREG :
1659
      fields->f_regb8 = value;
1660
      break;
1661
    case XC16X_OPERAND_HASH :
1662
      break;
1663
    case XC16X_OPERAND_ICOND :
1664
      fields->f_icondcode = value;
1665
      break;
1666
    case XC16X_OPERAND_LBIT2 :
1667
      fields->f_op_lbit2 = value;
1668
      break;
1669
    case XC16X_OPERAND_LBIT4 :
1670
      fields->f_op_lbit4 = value;
1671
      break;
1672
    case XC16X_OPERAND_MASK8 :
1673
      fields->f_mask8 = value;
1674
      break;
1675
    case XC16X_OPERAND_MASKLO8 :
1676
      fields->f_datahi8 = value;
1677
      break;
1678
    case XC16X_OPERAND_MEMGR8 :
1679
      fields->f_memgr8 = value;
1680
      break;
1681
    case XC16X_OPERAND_MEMORY :
1682
      fields->f_memory = value;
1683
      break;
1684
    case XC16X_OPERAND_PAG :
1685
      break;
1686
    case XC16X_OPERAND_PAGENUM :
1687
      fields->f_pagenum = value;
1688
      break;
1689
    case XC16X_OPERAND_POF :
1690
      break;
1691
    case XC16X_OPERAND_QBIT :
1692
      fields->f_qbit = value;
1693
      break;
1694
    case XC16X_OPERAND_QHIBIT :
1695
      fields->f_qhibit = value;
1696
      break;
1697
    case XC16X_OPERAND_QLOBIT :
1698
      fields->f_qlobit = value;
1699
      break;
1700
    case XC16X_OPERAND_REG8 :
1701
      fields->f_reg8 = value;
1702
      break;
1703
    case XC16X_OPERAND_REGB8 :
1704
      fields->f_regb8 = value;
1705
      break;
1706
    case XC16X_OPERAND_REGBMEM8 :
1707
      fields->f_regmem8 = value;
1708
      break;
1709
    case XC16X_OPERAND_REGHI8 :
1710
      fields->f_reghi8 = value;
1711
      break;
1712
    case XC16X_OPERAND_REGMEM8 :
1713
      fields->f_regmem8 = value;
1714
      break;
1715
    case XC16X_OPERAND_REGOFF8 :
1716
      fields->f_regoff8 = value;
1717
      break;
1718
    case XC16X_OPERAND_REL :
1719
      fields->f_rel8 = value;
1720
      break;
1721
    case XC16X_OPERAND_RELHI :
1722
      fields->f_relhi8 = value;
1723
      break;
1724
    case XC16X_OPERAND_SEG :
1725
      fields->f_seg8 = value;
1726
      break;
1727
    case XC16X_OPERAND_SEGHI8 :
1728
      fields->f_segnum8 = value;
1729
      break;
1730
    case XC16X_OPERAND_SEGM :
1731
      break;
1732
    case XC16X_OPERAND_SOF :
1733
      break;
1734
    case XC16X_OPERAND_SR :
1735
      fields->f_r2 = value;
1736
      break;
1737
    case XC16X_OPERAND_SR2 :
1738
      fields->f_r0 = value;
1739
      break;
1740
    case XC16X_OPERAND_SRB :
1741
      fields->f_r2 = value;
1742
      break;
1743
    case XC16X_OPERAND_SRC1 :
1744
      fields->f_r1 = value;
1745
      break;
1746
    case XC16X_OPERAND_SRC2 :
1747
      fields->f_r2 = value;
1748
      break;
1749
    case XC16X_OPERAND_SRDIV :
1750
      fields->f_reg8 = value;
1751
      break;
1752
    case XC16X_OPERAND_U4 :
1753
      fields->f_uimm4 = value;
1754
      break;
1755
    case XC16X_OPERAND_UIMM16 :
1756
      fields->f_uimm16 = value;
1757
      break;
1758
    case XC16X_OPERAND_UIMM2 :
1759
      fields->f_uimm2 = value;
1760
      break;
1761
    case XC16X_OPERAND_UIMM3 :
1762
      fields->f_uimm3 = value;
1763
      break;
1764
    case XC16X_OPERAND_UIMM4 :
1765
      fields->f_uimm4 = value;
1766
      break;
1767
    case XC16X_OPERAND_UIMM7 :
1768
      fields->f_uimm7 = value;
1769
      break;
1770
    case XC16X_OPERAND_UIMM8 :
1771
      fields->f_uimm8 = value;
1772
      break;
1773
    case XC16X_OPERAND_UPAG16 :
1774
      fields->f_uimm16 = value;
1775
      break;
1776
    case XC16X_OPERAND_UPOF16 :
1777
      fields->f_memory = value;
1778
      break;
1779
    case XC16X_OPERAND_USEG16 :
1780
      fields->f_offset16 = value;
1781
      break;
1782
    case XC16X_OPERAND_USEG8 :
1783
      fields->f_seg8 = value;
1784
      break;
1785
    case XC16X_OPERAND_USOF16 :
1786
      fields->f_offset16 = value;
1787
      break;
1788
 
1789
    default :
1790
      /* xgettext:c-format */
1791
      fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"),
1792
                       opindex);
1793
      abort ();
1794
  }
1795
}
1796
 
1797
/* Function to call before using the instruction builder tables.  */
1798
 
1799
void
1800
xc16x_cgen_init_ibld_table (CGEN_CPU_DESC cd)
1801
{
1802
  cd->insert_handlers = & xc16x_cgen_insert_handlers[0];
1803
  cd->extract_handlers = & xc16x_cgen_extract_handlers[0];
1804
 
1805
  cd->insert_operand = xc16x_cgen_insert_operand;
1806
  cd->extract_operand = xc16x_cgen_extract_operand;
1807
 
1808
  cd->get_int_operand = xc16x_cgen_get_int_operand;
1809
  cd->set_int_operand = xc16x_cgen_set_int_operand;
1810
  cd->get_vma_operand = xc16x_cgen_get_vma_operand;
1811
  cd->set_vma_operand = xc16x_cgen_set_vma_operand;
1812
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.