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[/] [open8_urisc/] [trunk/] [gnu/] [binutils/] [opcodes/] [xstormy16-opc.c] - Blame information for rev 18

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/* Instruction opcode table for xstormy16.
2
 
3
THIS FILE IS MACHINE GENERATED WITH CGEN.
4
 
5
Copyright 1996-2010 Free Software Foundation, Inc.
6
 
7
This file is part of the GNU Binutils and/or GDB, the GNU debugger.
8
 
9
   This file is free software; you can redistribute it and/or modify
10
   it under the terms of the GNU General Public License as published by
11
   the Free Software Foundation; either version 3, or (at your option)
12
   any later version.
13
 
14
   It is distributed in the hope that it will be useful, but WITHOUT
15
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
17
   License for more details.
18
 
19
   You should have received a copy of the GNU General Public License along
20
   with this program; if not, write to the Free Software Foundation, Inc.,
21
   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
22
 
23
*/
24
 
25
#include "sysdep.h"
26
#include "ansidecl.h"
27
#include "bfd.h"
28
#include "symcat.h"
29
#include "xstormy16-desc.h"
30
#include "xstormy16-opc.h"
31
#include "libiberty.h"
32
 
33
/* The hash functions are recorded here to help keep assembler code out of
34
   the disassembler and vice versa.  */
35
 
36
static int asm_hash_insn_p        (const CGEN_INSN *);
37
static unsigned int asm_hash_insn (const char *);
38
static int dis_hash_insn_p        (const CGEN_INSN *);
39
static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
40
 
41
/* Instruction formats.  */
42
 
43
#define F(f) & xstormy16_cgen_ifld_table[XSTORMY16_##f]
44
static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
45
  0, 0, 0x0, { { 0 } }
46
};
47
 
48
static const CGEN_IFMT ifmt_movlmemimm ATTRIBUTE_UNUSED = {
49
  32, 32, 0xfe000000, { { F (F_OP1) }, { F (F_OP2A) }, { F (F_OP2M) }, { F (F_LMEM8) }, { F (F_IMM16) }, { 0 } }
50
};
51
 
52
static const CGEN_IFMT ifmt_movhmemimm ATTRIBUTE_UNUSED = {
53
  32, 32, 0xfe000000, { { F (F_OP1) }, { F (F_OP2A) }, { F (F_OP2M) }, { F (F_HMEM8) }, { F (F_IMM16) }, { 0 } }
54
};
55
 
56
static const CGEN_IFMT ifmt_movlgrmem ATTRIBUTE_UNUSED = {
57
  16, 16, 0xf000, { { F (F_OP1) }, { F (F_RM) }, { F (F_OP2M) }, { F (F_LMEM8) }, { 0 } }
58
};
59
 
60
static const CGEN_IFMT ifmt_movhgrmem ATTRIBUTE_UNUSED = {
61
  16, 16, 0xf000, { { F (F_OP1) }, { F (F_RM) }, { F (F_OP2M) }, { F (F_HMEM8) }, { 0 } }
62
};
63
 
64
static const CGEN_IFMT ifmt_movgrgri ATTRIBUTE_UNUSED = {
65
  16, 16, 0xfe08, { { F (F_OP1) }, { F (F_OP2A) }, { F (F_OP2M) }, { F (F_RS) }, { F (F_OP4M) }, { F (F_RDM) }, { 0 } }
66
};
67
 
68
static const CGEN_IFMT ifmt_movgrgrii ATTRIBUTE_UNUSED = {
69
  32, 32, 0xfe08f000, { { F (F_OP1) }, { F (F_OP2A) }, { F (F_OP2M) }, { F (F_RS) }, { F (F_OP4M) }, { F (F_RDM) }, { F (F_OP5) }, { F (F_IMM12) }, { 0 } }
70
};
71
 
72
static const CGEN_IFMT ifmt_movgrgr ATTRIBUTE_UNUSED = {
73
  16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_RS) }, { F (F_RD) }, { 0 } }
74
};
75
 
76
static const CGEN_IFMT ifmt_movwimm8 ATTRIBUTE_UNUSED = {
77
  16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_IMM8) }, { 0 } }
78
};
79
 
80
static const CGEN_IFMT ifmt_movwgrimm8 ATTRIBUTE_UNUSED = {
81
  16, 16, 0xf100, { { F (F_OP1) }, { F (F_RM) }, { F (F_OP2M) }, { F (F_IMM8) }, { 0 } }
82
};
83
 
84
static const CGEN_IFMT ifmt_movwgrimm16 ATTRIBUTE_UNUSED = {
85
  32, 32, 0xfff00000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RD) }, { F (F_IMM16) }, { 0 } }
86
};
87
 
88
static const CGEN_IFMT ifmt_movlowgr ATTRIBUTE_UNUSED = {
89
  16, 16, 0xfff0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RD) }, { 0 } }
90
};
91
 
92
static const CGEN_IFMT ifmt_movfgrgrii ATTRIBUTE_UNUSED = {
93
  32, 32, 0xfe088000, { { F (F_OP1) }, { F (F_OP2A) }, { F (F_OP2M) }, { F (F_RS) }, { F (F_OP4M) }, { F (F_RDM) }, { F (F_OP5A) }, { F (F_RB) }, { F (F_IMM12) }, { 0 } }
94
};
95
 
96
static const CGEN_IFMT ifmt_addgrimm4 ATTRIBUTE_UNUSED = {
97
  16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_IMM4) }, { F (F_RD) }, { 0 } }
98
};
99
 
100
static const CGEN_IFMT ifmt_incgrimm2 ATTRIBUTE_UNUSED = {
101
  16, 16, 0xffc0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3A) }, { F (F_IMM2) }, { F (F_RD) }, { 0 } }
102
};
103
 
104
static const CGEN_IFMT ifmt_set1lmemimm ATTRIBUTE_UNUSED = {
105
  16, 16, 0xf100, { { F (F_OP1) }, { F (F_IMM3) }, { F (F_OP2M) }, { F (F_LMEM8) }, { 0 } }
106
};
107
 
108
static const CGEN_IFMT ifmt_set1hmemimm ATTRIBUTE_UNUSED = {
109
  16, 16, 0xf100, { { F (F_OP1) }, { F (F_IMM3) }, { F (F_OP2M) }, { F (F_HMEM8) }, { 0 } }
110
};
111
 
112
static const CGEN_IFMT ifmt_bccgrgr ATTRIBUTE_UNUSED = {
113
  32, 32, 0xff000000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_RS) }, { F (F_RD) }, { F (F_OP5) }, { F (F_REL12) }, { 0 } }
114
};
115
 
116
static const CGEN_IFMT ifmt_bccgrimm8 ATTRIBUTE_UNUSED = {
117
  32, 32, 0xf1000000, { { F (F_OP1) }, { F (F_RM) }, { F (F_OP2M) }, { F (F_IMM8) }, { F (F_OP5) }, { F (F_REL12) }, { 0 } }
118
};
119
 
120
static const CGEN_IFMT ifmt_bccimm16 ATTRIBUTE_UNUSED = {
121
  32, 32, 0xf0000000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_REL8_4) }, { F (F_IMM16) }, { 0 } }
122
};
123
 
124
static const CGEN_IFMT ifmt_bngrimm4 ATTRIBUTE_UNUSED = {
125
  32, 32, 0xff00f000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_IMM4) }, { F (F_RD) }, { F (F_OP5) }, { F (F_REL12) }, { 0 } }
126
};
127
 
128
static const CGEN_IFMT ifmt_bngrgr ATTRIBUTE_UNUSED = {
129
  32, 32, 0xff00f000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_RS) }, { F (F_RD) }, { F (F_OP5) }, { F (F_REL12) }, { 0 } }
130
};
131
 
132
static const CGEN_IFMT ifmt_bnlmemimm ATTRIBUTE_UNUSED = {
133
  32, 32, 0xff008000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_LMEM8) }, { F (F_OP5A) }, { F (F_IMM3B) }, { F (F_REL12) }, { 0 } }
134
};
135
 
136
static const CGEN_IFMT ifmt_bnhmemimm ATTRIBUTE_UNUSED = {
137
  32, 32, 0xff008000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_HMEM8) }, { F (F_OP5A) }, { F (F_IMM3B) }, { F (F_REL12) }, { 0 } }
138
};
139
 
140
static const CGEN_IFMT ifmt_bcc ATTRIBUTE_UNUSED = {
141
  16, 16, 0xf000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_REL8_2) }, { 0 } }
142
};
143
 
144
static const CGEN_IFMT ifmt_br ATTRIBUTE_UNUSED = {
145
  16, 16, 0xf001, { { F (F_OP1) }, { F (F_REL12A) }, { F (F_OP4B) }, { 0 } }
146
};
147
 
148
static const CGEN_IFMT ifmt_jmp ATTRIBUTE_UNUSED = {
149
  16, 16, 0xffe0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3B) }, { F (F_RBJ) }, { F (F_RD) }, { 0 } }
150
};
151
 
152
static const CGEN_IFMT ifmt_jmpf ATTRIBUTE_UNUSED = {
153
  32, 32, 0xff000000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_ABS24) }, { 0 } }
154
};
155
 
156
static const CGEN_IFMT ifmt_iret ATTRIBUTE_UNUSED = {
157
  16, 16, 0xffff, { { F (F_OP) }, { 0 } }
158
};
159
 
160
#undef F
161
 
162
#define A(a) (1 << CGEN_INSN_##a)
163
#define OPERAND(op) XSTORMY16_OPERAND_##op
164
#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
165
#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
166
 
167
/* The instruction table.  */
168
 
169
static const CGEN_OPCODE xstormy16_cgen_insn_opcode_table[MAX_INSNS] =
170
{
171
  /* Special null first entry.
172
     A `num' value of zero is thus invalid.
173
     Also, the special `invalid' insn resides here.  */
174
  { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
175
/* mov$ws2 $lmem8,#$imm16 */
176
  {
177
    { 0, 0, 0, 0 },
178
    { { MNEM, OP (WS2), ' ', OP (LMEM8), ',', '#', OP (IMM16), 0 } },
179
    & ifmt_movlmemimm, { 0x78000000 }
180
  },
181
/* mov$ws2 $hmem8,#$imm16 */
182
  {
183
    { 0, 0, 0, 0 },
184
    { { MNEM, OP (WS2), ' ', OP (HMEM8), ',', '#', OP (IMM16), 0 } },
185
    & ifmt_movhmemimm, { 0x7a000000 }
186
  },
187
/* mov$ws2 $Rm,$lmem8 */
188
  {
189
    { 0, 0, 0, 0 },
190
    { { MNEM, OP (WS2), ' ', OP (RM), ',', OP (LMEM8), 0 } },
191
    & ifmt_movlgrmem, { 0x8000 }
192
  },
193
/* mov$ws2 $Rm,$hmem8 */
194
  {
195
    { 0, 0, 0, 0 },
196
    { { MNEM, OP (WS2), ' ', OP (RM), ',', OP (HMEM8), 0 } },
197
    & ifmt_movhgrmem, { 0xa000 }
198
  },
199
/* mov$ws2 $lmem8,$Rm */
200
  {
201
    { 0, 0, 0, 0 },
202
    { { MNEM, OP (WS2), ' ', OP (LMEM8), ',', OP (RM), 0 } },
203
    & ifmt_movlgrmem, { 0x9000 }
204
  },
205
/* mov$ws2 $hmem8,$Rm */
206
  {
207
    { 0, 0, 0, 0 },
208
    { { MNEM, OP (WS2), ' ', OP (HMEM8), ',', OP (RM), 0 } },
209
    & ifmt_movhgrmem, { 0xb000 }
210
  },
211
/* mov$ws2 $Rdm,($Rs) */
212
  {
213
    { 0, 0, 0, 0 },
214
    { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), ')', 0 } },
215
    & ifmt_movgrgri, { 0x7000 }
216
  },
217
/* mov$ws2 $Rdm,($Rs++) */
218
  {
219
    { 0, 0, 0, 0 },
220
    { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), '+', '+', ')', 0 } },
221
    & ifmt_movgrgri, { 0x6000 }
222
  },
223
/* mov$ws2 $Rdm,(--$Rs) */
224
  {
225
    { 0, 0, 0, 0 },
226
    { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', '-', '-', OP (RS), ')', 0 } },
227
    & ifmt_movgrgri, { 0x6800 }
228
  },
229
/* mov$ws2 ($Rs),$Rdm */
230
  {
231
    { 0, 0, 0, 0 },
232
    { { MNEM, OP (WS2), ' ', '(', OP (RS), ')', ',', OP (RDM), 0 } },
233
    & ifmt_movgrgri, { 0x7200 }
234
  },
235
/* mov$ws2 ($Rs++),$Rdm */
236
  {
237
    { 0, 0, 0, 0 },
238
    { { MNEM, OP (WS2), ' ', '(', OP (RS), '+', '+', ')', ',', OP (RDM), 0 } },
239
    & ifmt_movgrgri, { 0x6200 }
240
  },
241
/* mov$ws2 (--$Rs),$Rdm */
242
  {
243
    { 0, 0, 0, 0 },
244
    { { MNEM, OP (WS2), ' ', '(', '-', '-', OP (RS), ')', ',', OP (RDM), 0 } },
245
    & ifmt_movgrgri, { 0x6a00 }
246
  },
247
/* mov$ws2 $Rdm,($Rs,$imm12) */
248
  {
249
    { 0, 0, 0, 0 },
250
    { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), ',', OP (IMM12), ')', 0 } },
251
    & ifmt_movgrgrii, { 0x70080000 }
252
  },
253
/* mov$ws2 $Rdm,($Rs++,$imm12) */
254
  {
255
    { 0, 0, 0, 0 },
256
    { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), '+', '+', ',', OP (IMM12), ')', 0 } },
257
    & ifmt_movgrgrii, { 0x60080000 }
258
  },
259
/* mov$ws2 $Rdm,(--$Rs,$imm12) */
260
  {
261
    { 0, 0, 0, 0 },
262
    { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', '-', '-', OP (RS), ',', OP (IMM12), ')', 0 } },
263
    & ifmt_movgrgrii, { 0x68080000 }
264
  },
265
/* mov$ws2 ($Rs,$imm12),$Rdm */
266
  {
267
    { 0, 0, 0, 0 },
268
    { { MNEM, OP (WS2), ' ', '(', OP (RS), ',', OP (IMM12), ')', ',', OP (RDM), 0 } },
269
    & ifmt_movgrgrii, { 0x72080000 }
270
  },
271
/* mov$ws2 ($Rs++,$imm12),$Rdm */
272
  {
273
    { 0, 0, 0, 0 },
274
    { { MNEM, OP (WS2), ' ', '(', OP (RS), '+', '+', ',', OP (IMM12), ')', ',', OP (RDM), 0 } },
275
    & ifmt_movgrgrii, { 0x62080000 }
276
  },
277
/* mov$ws2 (--$Rs,$imm12),$Rdm */
278
  {
279
    { 0, 0, 0, 0 },
280
    { { MNEM, OP (WS2), ' ', '(', '-', '-', OP (RS), ',', OP (IMM12), ')', ',', OP (RDM), 0 } },
281
    & ifmt_movgrgrii, { 0x6a080000 }
282
  },
283
/* mov $Rd,$Rs */
284
  {
285
    { 0, 0, 0, 0 },
286
    { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
287
    & ifmt_movgrgr, { 0x4600 }
288
  },
289
/* mov.w Rx,#$imm8 */
290
  {
291
    { 0, 0, 0, 0 },
292
    { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
293
    & ifmt_movwimm8, { 0x4700 }
294
  },
295
/* mov.w $Rm,#$imm8small */
296
  {
297
    { 0, 0, 0, 0 },
298
    { { MNEM, ' ', OP (RM), ',', '#', OP (IMM8SMALL), 0 } },
299
    & ifmt_movwgrimm8, { 0x2100 }
300
  },
301
/* mov.w $Rd,#$imm16 */
302
  {
303
    { 0, 0, 0, 0 },
304
    { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
305
    & ifmt_movwgrimm16, { 0x31300000 }
306
  },
307
/* mov.b $Rd,RxL */
308
  {
309
    { 0, 0, 0, 0 },
310
    { { MNEM, ' ', OP (RD), ',', 'R', 'x', 'L', 0 } },
311
    & ifmt_movlowgr, { 0x30c0 }
312
  },
313
/* mov.b $Rd,RxH */
314
  {
315
    { 0, 0, 0, 0 },
316
    { { MNEM, ' ', OP (RD), ',', 'R', 'x', 'H', 0 } },
317
    & ifmt_movlowgr, { 0x30d0 }
318
  },
319
/* movf$ws2 $Rdm,($Rs) */
320
  {
321
    { 0, 0, 0, 0 },
322
    { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), ')', 0 } },
323
    & ifmt_movgrgri, { 0x7400 }
324
  },
325
/* movf$ws2 $Rdm,($Rs++) */
326
  {
327
    { 0, 0, 0, 0 },
328
    { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), '+', '+', ')', 0 } },
329
    & ifmt_movgrgri, { 0x6400 }
330
  },
331
/* movf$ws2 $Rdm,(--$Rs) */
332
  {
333
    { 0, 0, 0, 0 },
334
    { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', '-', '-', OP (RS), ')', 0 } },
335
    & ifmt_movgrgri, { 0x6c00 }
336
  },
337
/* movf$ws2 ($Rs),$Rdm */
338
  {
339
    { 0, 0, 0, 0 },
340
    { { MNEM, OP (WS2), ' ', '(', OP (RS), ')', ',', OP (RDM), 0 } },
341
    & ifmt_movgrgri, { 0x7600 }
342
  },
343
/* movf$ws2 ($Rs++),$Rdm */
344
  {
345
    { 0, 0, 0, 0 },
346
    { { MNEM, OP (WS2), ' ', '(', OP (RS), '+', '+', ')', ',', OP (RDM), 0 } },
347
    & ifmt_movgrgri, { 0x6600 }
348
  },
349
/* movf$ws2 (--$Rs),$Rdm */
350
  {
351
    { 0, 0, 0, 0 },
352
    { { MNEM, OP (WS2), ' ', '(', '-', '-', OP (RS), ')', ',', OP (RDM), 0 } },
353
    & ifmt_movgrgri, { 0x6e00 }
354
  },
355
/* movf$ws2 $Rdm,($Rb,$Rs,$imm12) */
356
  {
357
    { 0, 0, 0, 0 },
358
    { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RB), ',', OP (RS), ',', OP (IMM12), ')', 0 } },
359
    & ifmt_movfgrgrii, { 0x74080000 }
360
  },
361
/* movf$ws2 $Rdm,($Rb,$Rs++,$imm12) */
362
  {
363
    { 0, 0, 0, 0 },
364
    { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RB), ',', OP (RS), '+', '+', ',', OP (IMM12), ')', 0 } },
365
    & ifmt_movfgrgrii, { 0x64080000 }
366
  },
367
/* movf$ws2 $Rdm,($Rb,--$Rs,$imm12) */
368
  {
369
    { 0, 0, 0, 0 },
370
    { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RB), ',', '-', '-', OP (RS), ',', OP (IMM12), ')', 0 } },
371
    & ifmt_movfgrgrii, { 0x6c080000 }
372
  },
373
/* movf$ws2 ($Rb,$Rs,$imm12),$Rdm */
374
  {
375
    { 0, 0, 0, 0 },
376
    { { MNEM, OP (WS2), ' ', '(', OP (RB), ',', OP (RS), ',', OP (IMM12), ')', ',', OP (RDM), 0 } },
377
    & ifmt_movfgrgrii, { 0x76080000 }
378
  },
379
/* movf$ws2 ($Rb,$Rs++,$imm12),$Rdm */
380
  {
381
    { 0, 0, 0, 0 },
382
    { { MNEM, OP (WS2), ' ', '(', OP (RB), ',', OP (RS), '+', '+', ',', OP (IMM12), ')', ',', OP (RDM), 0 } },
383
    & ifmt_movfgrgrii, { 0x66080000 }
384
  },
385
/* movf$ws2 ($Rb,--$Rs,$imm12),$Rdm */
386
  {
387
    { 0, 0, 0, 0 },
388
    { { MNEM, OP (WS2), ' ', '(', OP (RB), ',', '-', '-', OP (RS), ',', OP (IMM12), ')', ',', OP (RDM), 0 } },
389
    & ifmt_movfgrgrii, { 0x6e080000 }
390
  },
391
/* mask $Rd,$Rs */
392
  {
393
    { 0, 0, 0, 0 },
394
    { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
395
    & ifmt_movgrgr, { 0x3300 }
396
  },
397
/* mask $Rd,#$imm16 */
398
  {
399
    { 0, 0, 0, 0 },
400
    { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
401
    & ifmt_movwgrimm16, { 0x30e00000 }
402
  },
403
/* push $Rd */
404
  {
405
    { 0, 0, 0, 0 },
406
    { { MNEM, ' ', OP (RD), 0 } },
407
    & ifmt_movlowgr, { 0x80 }
408
  },
409
/* pop $Rd */
410
  {
411
    { 0, 0, 0, 0 },
412
    { { MNEM, ' ', OP (RD), 0 } },
413
    & ifmt_movlowgr, { 0x90 }
414
  },
415
/* swpn $Rd */
416
  {
417
    { 0, 0, 0, 0 },
418
    { { MNEM, ' ', OP (RD), 0 } },
419
    & ifmt_movlowgr, { 0x3090 }
420
  },
421
/* swpb $Rd */
422
  {
423
    { 0, 0, 0, 0 },
424
    { { MNEM, ' ', OP (RD), 0 } },
425
    & ifmt_movlowgr, { 0x3080 }
426
  },
427
/* swpw $Rd,$Rs */
428
  {
429
    { 0, 0, 0, 0 },
430
    { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
431
    & ifmt_movgrgr, { 0x3200 }
432
  },
433
/* and $Rd,$Rs */
434
  {
435
    { 0, 0, 0, 0 },
436
    { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
437
    & ifmt_movgrgr, { 0x4000 }
438
  },
439
/* and Rx,#$imm8 */
440
  {
441
    { 0, 0, 0, 0 },
442
    { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
443
    & ifmt_movwimm8, { 0x4100 }
444
  },
445
/* and $Rd,#$imm16 */
446
  {
447
    { 0, 0, 0, 0 },
448
    { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
449
    & ifmt_movwgrimm16, { 0x31000000 }
450
  },
451
/* or $Rd,$Rs */
452
  {
453
    { 0, 0, 0, 0 },
454
    { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
455
    & ifmt_movgrgr, { 0x4200 }
456
  },
457
/* or Rx,#$imm8 */
458
  {
459
    { 0, 0, 0, 0 },
460
    { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
461
    & ifmt_movwimm8, { 0x4300 }
462
  },
463
/* or $Rd,#$imm16 */
464
  {
465
    { 0, 0, 0, 0 },
466
    { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
467
    & ifmt_movwgrimm16, { 0x31100000 }
468
  },
469
/* xor $Rd,$Rs */
470
  {
471
    { 0, 0, 0, 0 },
472
    { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
473
    & ifmt_movgrgr, { 0x4400 }
474
  },
475
/* xor Rx,#$imm8 */
476
  {
477
    { 0, 0, 0, 0 },
478
    { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
479
    & ifmt_movwimm8, { 0x4500 }
480
  },
481
/* xor $Rd,#$imm16 */
482
  {
483
    { 0, 0, 0, 0 },
484
    { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
485
    & ifmt_movwgrimm16, { 0x31200000 }
486
  },
487
/* not $Rd */
488
  {
489
    { 0, 0, 0, 0 },
490
    { { MNEM, ' ', OP (RD), 0 } },
491
    & ifmt_movlowgr, { 0x30b0 }
492
  },
493
/* add $Rd,$Rs */
494
  {
495
    { 0, 0, 0, 0 },
496
    { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
497
    & ifmt_movgrgr, { 0x4900 }
498
  },
499
/* add $Rd,#$imm4 */
500
  {
501
    { 0, 0, 0, 0 },
502
    { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
503
    & ifmt_addgrimm4, { 0x5100 }
504
  },
505
/* add Rx,#$imm8 */
506
  {
507
    { 0, 0, 0, 0 },
508
    { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
509
    & ifmt_movwimm8, { 0x5900 }
510
  },
511
/* add $Rd,#$imm16 */
512
  {
513
    { 0, 0, 0, 0 },
514
    { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
515
    & ifmt_movwgrimm16, { 0x31400000 }
516
  },
517
/* adc $Rd,$Rs */
518
  {
519
    { 0, 0, 0, 0 },
520
    { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
521
    & ifmt_movgrgr, { 0x4b00 }
522
  },
523
/* adc $Rd,#$imm4 */
524
  {
525
    { 0, 0, 0, 0 },
526
    { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
527
    & ifmt_addgrimm4, { 0x5300 }
528
  },
529
/* adc Rx,#$imm8 */
530
  {
531
    { 0, 0, 0, 0 },
532
    { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
533
    & ifmt_movwimm8, { 0x5b00 }
534
  },
535
/* adc $Rd,#$imm16 */
536
  {
537
    { 0, 0, 0, 0 },
538
    { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
539
    & ifmt_movwgrimm16, { 0x31500000 }
540
  },
541
/* sub $Rd,$Rs */
542
  {
543
    { 0, 0, 0, 0 },
544
    { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
545
    & ifmt_movgrgr, { 0x4d00 }
546
  },
547
/* sub $Rd,#$imm4 */
548
  {
549
    { 0, 0, 0, 0 },
550
    { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
551
    & ifmt_addgrimm4, { 0x5500 }
552
  },
553
/* sub Rx,#$imm8 */
554
  {
555
    { 0, 0, 0, 0 },
556
    { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
557
    & ifmt_movwimm8, { 0x5d00 }
558
  },
559
/* sub $Rd,#$imm16 */
560
  {
561
    { 0, 0, 0, 0 },
562
    { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
563
    & ifmt_movwgrimm16, { 0x31600000 }
564
  },
565
/* sbc $Rd,$Rs */
566
  {
567
    { 0, 0, 0, 0 },
568
    { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
569
    & ifmt_movgrgr, { 0x4f00 }
570
  },
571
/* sbc $Rd,#$imm4 */
572
  {
573
    { 0, 0, 0, 0 },
574
    { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
575
    & ifmt_addgrimm4, { 0x5700 }
576
  },
577
/* sbc Rx,#$imm8 */
578
  {
579
    { 0, 0, 0, 0 },
580
    { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
581
    & ifmt_movwimm8, { 0x5f00 }
582
  },
583
/* sbc $Rd,#$imm16 */
584
  {
585
    { 0, 0, 0, 0 },
586
    { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
587
    & ifmt_movwgrimm16, { 0x31700000 }
588
  },
589
/* inc $Rd,#$imm2 */
590
  {
591
    { 0, 0, 0, 0 },
592
    { { MNEM, ' ', OP (RD), ',', '#', OP (IMM2), 0 } },
593
    & ifmt_incgrimm2, { 0x3000 }
594
  },
595
/* dec $Rd,#$imm2 */
596
  {
597
    { 0, 0, 0, 0 },
598
    { { MNEM, ' ', OP (RD), ',', '#', OP (IMM2), 0 } },
599
    & ifmt_incgrimm2, { 0x3040 }
600
  },
601
/* rrc $Rd,$Rs */
602
  {
603
    { 0, 0, 0, 0 },
604
    { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
605
    & ifmt_movgrgr, { 0x3800 }
606
  },
607
/* rrc $Rd,#$imm4 */
608
  {
609
    { 0, 0, 0, 0 },
610
    { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
611
    & ifmt_addgrimm4, { 0x3900 }
612
  },
613
/* rlc $Rd,$Rs */
614
  {
615
    { 0, 0, 0, 0 },
616
    { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
617
    & ifmt_movgrgr, { 0x3a00 }
618
  },
619
/* rlc $Rd,#$imm4 */
620
  {
621
    { 0, 0, 0, 0 },
622
    { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
623
    & ifmt_addgrimm4, { 0x3b00 }
624
  },
625
/* shr $Rd,$Rs */
626
  {
627
    { 0, 0, 0, 0 },
628
    { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
629
    & ifmt_movgrgr, { 0x3c00 }
630
  },
631
/* shr $Rd,#$imm4 */
632
  {
633
    { 0, 0, 0, 0 },
634
    { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
635
    & ifmt_addgrimm4, { 0x3d00 }
636
  },
637
/* shl $Rd,$Rs */
638
  {
639
    { 0, 0, 0, 0 },
640
    { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
641
    & ifmt_movgrgr, { 0x3e00 }
642
  },
643
/* shl $Rd,#$imm4 */
644
  {
645
    { 0, 0, 0, 0 },
646
    { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
647
    & ifmt_addgrimm4, { 0x3f00 }
648
  },
649
/* asr $Rd,$Rs */
650
  {
651
    { 0, 0, 0, 0 },
652
    { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
653
    & ifmt_movgrgr, { 0x3600 }
654
  },
655
/* asr $Rd,#$imm4 */
656
  {
657
    { 0, 0, 0, 0 },
658
    { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
659
    & ifmt_addgrimm4, { 0x3700 }
660
  },
661
/* set1 $Rd,#$imm4 */
662
  {
663
    { 0, 0, 0, 0 },
664
    { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
665
    & ifmt_addgrimm4, { 0x900 }
666
  },
667
/* set1 $Rd,$Rs */
668
  {
669
    { 0, 0, 0, 0 },
670
    { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
671
    & ifmt_movgrgr, { 0xb00 }
672
  },
673
/* set1 $lmem8,#$imm3 */
674
  {
675
    { 0, 0, 0, 0 },
676
    { { MNEM, ' ', OP (LMEM8), ',', '#', OP (IMM3), 0 } },
677
    & ifmt_set1lmemimm, { 0xe100 }
678
  },
679
/* set1 $hmem8,#$imm3 */
680
  {
681
    { 0, 0, 0, 0 },
682
    { { MNEM, ' ', OP (HMEM8), ',', '#', OP (IMM3), 0 } },
683
    & ifmt_set1hmemimm, { 0xf100 }
684
  },
685
/* clr1 $Rd,#$imm4 */
686
  {
687
    { 0, 0, 0, 0 },
688
    { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
689
    & ifmt_addgrimm4, { 0x800 }
690
  },
691
/* clr1 $Rd,$Rs */
692
  {
693
    { 0, 0, 0, 0 },
694
    { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
695
    & ifmt_movgrgr, { 0xa00 }
696
  },
697
/* clr1 $lmem8,#$imm3 */
698
  {
699
    { 0, 0, 0, 0 },
700
    { { MNEM, ' ', OP (LMEM8), ',', '#', OP (IMM3), 0 } },
701
    & ifmt_set1lmemimm, { 0xe000 }
702
  },
703
/* clr1 $hmem8,#$imm3 */
704
  {
705
    { 0, 0, 0, 0 },
706
    { { MNEM, ' ', OP (HMEM8), ',', '#', OP (IMM3), 0 } },
707
    & ifmt_set1hmemimm, { 0xf000 }
708
  },
709
/* cbw $Rd */
710
  {
711
    { 0, 0, 0, 0 },
712
    { { MNEM, ' ', OP (RD), 0 } },
713
    & ifmt_movlowgr, { 0x30a0 }
714
  },
715
/* rev $Rd */
716
  {
717
    { 0, 0, 0, 0 },
718
    { { MNEM, ' ', OP (RD), 0 } },
719
    & ifmt_movlowgr, { 0x30f0 }
720
  },
721
/* b$bcond5 $Rd,$Rs,$rel12 */
722
  {
723
    { 0, 0, 0, 0 },
724
    { { MNEM, OP (BCOND5), ' ', OP (RD), ',', OP (RS), ',', OP (REL12), 0 } },
725
    & ifmt_bccgrgr, { 0xd000000 }
726
  },
727
/* b$bcond5 $Rm,#$imm8,$rel12 */
728
  {
729
    { 0, 0, 0, 0 },
730
    { { MNEM, OP (BCOND5), ' ', OP (RM), ',', '#', OP (IMM8), ',', OP (REL12), 0 } },
731
    & ifmt_bccgrimm8, { 0x20000000 }
732
  },
733
/* b$bcond2 Rx,#$imm16,${rel8-4} */
734
  {
735
    { 0, 0, 0, 0 },
736
    { { MNEM, OP (BCOND2), ' ', 'R', 'x', ',', '#', OP (IMM16), ',', OP (REL8_4), 0 } },
737
    & ifmt_bccimm16, { 0xc0000000 }
738
  },
739
/* bn $Rd,#$imm4,$rel12 */
740
  {
741
    { 0, 0, 0, 0 },
742
    { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), ',', OP (REL12), 0 } },
743
    & ifmt_bngrimm4, { 0x4000000 }
744
  },
745
/* bn $Rd,$Rs,$rel12 */
746
  {
747
    { 0, 0, 0, 0 },
748
    { { MNEM, ' ', OP (RD), ',', OP (RS), ',', OP (REL12), 0 } },
749
    & ifmt_bngrgr, { 0x6000000 }
750
  },
751
/* bn $lmem8,#$imm3b,$rel12 */
752
  {
753
    { 0, 0, 0, 0 },
754
    { { MNEM, ' ', OP (LMEM8), ',', '#', OP (IMM3B), ',', OP (REL12), 0 } },
755
    & ifmt_bnlmemimm, { 0x7c000000 }
756
  },
757
/* bn $hmem8,#$imm3b,$rel12 */
758
  {
759
    { 0, 0, 0, 0 },
760
    { { MNEM, ' ', OP (HMEM8), ',', '#', OP (IMM3B), ',', OP (REL12), 0 } },
761
    & ifmt_bnhmemimm, { 0x7e000000 }
762
  },
763
/* bp $Rd,#$imm4,$rel12 */
764
  {
765
    { 0, 0, 0, 0 },
766
    { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), ',', OP (REL12), 0 } },
767
    & ifmt_bngrimm4, { 0x5000000 }
768
  },
769
/* bp $Rd,$Rs,$rel12 */
770
  {
771
    { 0, 0, 0, 0 },
772
    { { MNEM, ' ', OP (RD), ',', OP (RS), ',', OP (REL12), 0 } },
773
    & ifmt_bngrgr, { 0x7000000 }
774
  },
775
/* bp $lmem8,#$imm3b,$rel12 */
776
  {
777
    { 0, 0, 0, 0 },
778
    { { MNEM, ' ', OP (LMEM8), ',', '#', OP (IMM3B), ',', OP (REL12), 0 } },
779
    & ifmt_bnlmemimm, { 0x7d000000 }
780
  },
781
/* bp $hmem8,#$imm3b,$rel12 */
782
  {
783
    { 0, 0, 0, 0 },
784
    { { MNEM, ' ', OP (HMEM8), ',', '#', OP (IMM3B), ',', OP (REL12), 0 } },
785
    & ifmt_bnhmemimm, { 0x7f000000 }
786
  },
787
/* b$bcond2 ${rel8-2} */
788
  {
789
    { 0, 0, 0, 0 },
790
    { { MNEM, OP (BCOND2), ' ', OP (REL8_2), 0 } },
791
    & ifmt_bcc, { 0xd000 }
792
  },
793
/* br $Rd */
794
  {
795
    { 0, 0, 0, 0 },
796
    { { MNEM, ' ', OP (RD), 0 } },
797
    & ifmt_movlowgr, { 0x20 }
798
  },
799
/* br $rel12a */
800
  {
801
    { 0, 0, 0, 0 },
802
    { { MNEM, ' ', OP (REL12A), 0 } },
803
    & ifmt_br, { 0x1000 }
804
  },
805
/* jmp $Rbj,$Rd */
806
  {
807
    { 0, 0, 0, 0 },
808
    { { MNEM, ' ', OP (RBJ), ',', OP (RD), 0 } },
809
    & ifmt_jmp, { 0x40 }
810
  },
811
/* jmpf $abs24 */
812
  {
813
    { 0, 0, 0, 0 },
814
    { { MNEM, ' ', OP (ABS24), 0 } },
815
    & ifmt_jmpf, { 0x2000000 }
816
  },
817
/* callr $Rd */
818
  {
819
    { 0, 0, 0, 0 },
820
    { { MNEM, ' ', OP (RD), 0 } },
821
    & ifmt_movlowgr, { 0x10 }
822
  },
823
/* callr $rel12a */
824
  {
825
    { 0, 0, 0, 0 },
826
    { { MNEM, ' ', OP (REL12A), 0 } },
827
    & ifmt_br, { 0x1001 }
828
  },
829
/* call $Rbj,$Rd */
830
  {
831
    { 0, 0, 0, 0 },
832
    { { MNEM, ' ', OP (RBJ), ',', OP (RD), 0 } },
833
    & ifmt_jmp, { 0xa0 }
834
  },
835
/* callf $abs24 */
836
  {
837
    { 0, 0, 0, 0 },
838
    { { MNEM, ' ', OP (ABS24), 0 } },
839
    & ifmt_jmpf, { 0x1000000 }
840
  },
841
/* icallr $Rd */
842
  {
843
    { 0, 0, 0, 0 },
844
    { { MNEM, ' ', OP (RD), 0 } },
845
    & ifmt_movlowgr, { 0x30 }
846
  },
847
/* icall $Rbj,$Rd */
848
  {
849
    { 0, 0, 0, 0 },
850
    { { MNEM, ' ', OP (RBJ), ',', OP (RD), 0 } },
851
    & ifmt_jmp, { 0x60 }
852
  },
853
/* icallf $abs24 */
854
  {
855
    { 0, 0, 0, 0 },
856
    { { MNEM, ' ', OP (ABS24), 0 } },
857
    & ifmt_jmpf, { 0x3000000 }
858
  },
859
/* iret */
860
  {
861
    { 0, 0, 0, 0 },
862
    { { MNEM, 0 } },
863
    & ifmt_iret, { 0x2 }
864
  },
865
/* ret */
866
  {
867
    { 0, 0, 0, 0 },
868
    { { MNEM, 0 } },
869
    & ifmt_iret, { 0x3 }
870
  },
871
/* mul */
872
  {
873
    { 0, 0, 0, 0 },
874
    { { MNEM, 0 } },
875
    & ifmt_iret, { 0xd0 }
876
  },
877
/* div */
878
  {
879
    { 0, 0, 0, 0 },
880
    { { MNEM, 0 } },
881
    & ifmt_iret, { 0xc0 }
882
  },
883
/* sdiv */
884
  {
885
    { 0, 0, 0, 0 },
886
    { { MNEM, 0 } },
887
    & ifmt_iret, { 0xc8 }
888
  },
889
/* sdivlh */
890
  {
891
    { 0, 0, 0, 0 },
892
    { { MNEM, 0 } },
893
    & ifmt_iret, { 0xe8 }
894
  },
895
/* divlh */
896
  {
897
    { 0, 0, 0, 0 },
898
    { { MNEM, 0 } },
899
    & ifmt_iret, { 0xe0 }
900
  },
901
/* reset */
902
  {
903
    { 0, 0, 0, 0 },
904
    { { MNEM, 0 } },
905
    & ifmt_iret, { 0xf }
906
  },
907
/* nop */
908
  {
909
    { 0, 0, 0, 0 },
910
    { { MNEM, 0 } },
911
    & ifmt_iret, { 0x0 }
912
  },
913
/* halt */
914
  {
915
    { 0, 0, 0, 0 },
916
    { { MNEM, 0 } },
917
    & ifmt_iret, { 0x8 }
918
  },
919
/* hold */
920
  {
921
    { 0, 0, 0, 0 },
922
    { { MNEM, 0 } },
923
    & ifmt_iret, { 0xa }
924
  },
925
/* holdx */
926
  {
927
    { 0, 0, 0, 0 },
928
    { { MNEM, 0 } },
929
    & ifmt_iret, { 0xb }
930
  },
931
/* brk */
932
  {
933
    { 0, 0, 0, 0 },
934
    { { MNEM, 0 } },
935
    & ifmt_iret, { 0x5 }
936
  },
937
/* --unused-- */
938
  {
939
    { 0, 0, 0, 0 },
940
    { { MNEM, 0 } },
941
    & ifmt_iret, { 0x1 }
942
  },
943
};
944
 
945
#undef A
946
#undef OPERAND
947
#undef MNEM
948
#undef OP
949
 
950
/* Formats for ALIAS macro-insns.  */
951
 
952
#define F(f) & xstormy16_cgen_ifld_table[XSTORMY16_##f]
953
static const CGEN_IFMT ifmt_movimm8 ATTRIBUTE_UNUSED = {
954
  16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_IMM8) }, { 0 } }
955
};
956
 
957
static const CGEN_IFMT ifmt_movgrimm8 ATTRIBUTE_UNUSED = {
958
  16, 16, 0xf100, { { F (F_OP1) }, { F (F_RM) }, { F (F_OP2M) }, { F (F_IMM8) }, { 0 } }
959
};
960
 
961
static const CGEN_IFMT ifmt_movgrimm16 ATTRIBUTE_UNUSED = {
962
  32, 32, 0xfff00000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RD) }, { F (F_IMM16) }, { 0 } }
963
};
964
 
965
static const CGEN_IFMT ifmt_incgr ATTRIBUTE_UNUSED = {
966
  16, 16, 0xfff0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3A) }, { F (F_IMM2) }, { F (F_RD) }, { 0 } }
967
};
968
 
969
static const CGEN_IFMT ifmt_decgr ATTRIBUTE_UNUSED = {
970
  16, 16, 0xfff0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3A) }, { F (F_IMM2) }, { F (F_RD) }, { 0 } }
971
};
972
 
973
#undef F
974
 
975
/* Each non-simple macro entry points to an array of expansion possibilities.  */
976
 
977
#define A(a) (1 << CGEN_INSN_##a)
978
#define OPERAND(op) XSTORMY16_OPERAND_##op
979
#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
980
#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
981
 
982
/* The macro instruction table.  */
983
 
984
static const CGEN_IBASE xstormy16_cgen_macro_insn_table[] =
985
{
986
/* mov Rx,#$imm8 */
987
  {
988
    -1, "movimm8", "mov", 16,
989
    { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } } } }
990
  },
991
/* mov $Rm,#$imm8small */
992
  {
993
    -1, "movgrimm8", "mov", 16,
994
    { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } } } }
995
  },
996
/* mov $Rd,#$imm16 */
997
  {
998
    -1, "movgrimm16", "mov", 32,
999
    { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } } } }
1000
  },
1001
/* inc $Rd */
1002
  {
1003
    -1, "incgr", "inc", 16,
1004
    { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } } } }
1005
  },
1006
/* dec $Rd */
1007
  {
1008
    -1, "decgr", "dec", 16,
1009
    { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } } } }
1010
  },
1011
};
1012
 
1013
/* The macro instruction opcode table.  */
1014
 
1015
static const CGEN_OPCODE xstormy16_cgen_macro_insn_opcode_table[] =
1016
{
1017
/* mov Rx,#$imm8 */
1018
  {
1019
    { 0, 0, 0, 0 },
1020
    { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
1021
    & ifmt_movimm8, { 0x4700 }
1022
  },
1023
/* mov $Rm,#$imm8small */
1024
  {
1025
    { 0, 0, 0, 0 },
1026
    { { MNEM, ' ', OP (RM), ',', '#', OP (IMM8SMALL), 0 } },
1027
    & ifmt_movgrimm8, { 0x2100 }
1028
  },
1029
/* mov $Rd,#$imm16 */
1030
  {
1031
    { 0, 0, 0, 0 },
1032
    { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
1033
    & ifmt_movgrimm16, { 0x31300000 }
1034
  },
1035
/* inc $Rd */
1036
  {
1037
    { 0, 0, 0, 0 },
1038
    { { MNEM, ' ', OP (RD), 0 } },
1039
    & ifmt_incgr, { 0x3000 }
1040
  },
1041
/* dec $Rd */
1042
  {
1043
    { 0, 0, 0, 0 },
1044
    { { MNEM, ' ', OP (RD), 0 } },
1045
    & ifmt_decgr, { 0x3040 }
1046
  },
1047
};
1048
 
1049
#undef A
1050
#undef OPERAND
1051
#undef MNEM
1052
#undef OP
1053
 
1054
#ifndef CGEN_ASM_HASH_P
1055
#define CGEN_ASM_HASH_P(insn) 1
1056
#endif
1057
 
1058
#ifndef CGEN_DIS_HASH_P
1059
#define CGEN_DIS_HASH_P(insn) 1
1060
#endif
1061
 
1062
/* Return non-zero if INSN is to be added to the hash table.
1063
   Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file.  */
1064
 
1065
static int
1066
asm_hash_insn_p (insn)
1067
     const CGEN_INSN *insn ATTRIBUTE_UNUSED;
1068
{
1069
  return CGEN_ASM_HASH_P (insn);
1070
}
1071
 
1072
static int
1073
dis_hash_insn_p (insn)
1074
     const CGEN_INSN *insn;
1075
{
1076
  /* If building the hash table and the NO-DIS attribute is present,
1077
     ignore.  */
1078
  if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
1079
    return 0;
1080
  return CGEN_DIS_HASH_P (insn);
1081
}
1082
 
1083
#ifndef CGEN_ASM_HASH
1084
#define CGEN_ASM_HASH_SIZE 127
1085
#ifdef CGEN_MNEMONIC_OPERANDS
1086
#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
1087
#else
1088
#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
1089
#endif
1090
#endif
1091
 
1092
/* It doesn't make much sense to provide a default here,
1093
   but while this is under development we do.
1094
   BUFFER is a pointer to the bytes of the insn, target order.
1095
   VALUE is the first base_insn_bitsize bits as an int in host order.  */
1096
 
1097
#ifndef CGEN_DIS_HASH
1098
#define CGEN_DIS_HASH_SIZE 256
1099
#define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
1100
#endif
1101
 
1102
/* The result is the hash value of the insn.
1103
   Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file.  */
1104
 
1105
static unsigned int
1106
asm_hash_insn (mnem)
1107
     const char * mnem;
1108
{
1109
  return CGEN_ASM_HASH (mnem);
1110
}
1111
 
1112
/* BUF is a pointer to the bytes of the insn, target order.
1113
   VALUE is the first base_insn_bitsize bits as an int in host order.  */
1114
 
1115
static unsigned int
1116
dis_hash_insn (buf, value)
1117
     const char * buf ATTRIBUTE_UNUSED;
1118
     CGEN_INSN_INT value ATTRIBUTE_UNUSED;
1119
{
1120
  return CGEN_DIS_HASH (buf, value);
1121
}
1122
 
1123
/* Set the recorded length of the insn in the CGEN_FIELDS struct.  */
1124
 
1125
static void
1126
set_fields_bitsize (CGEN_FIELDS *fields, int size)
1127
{
1128
  CGEN_FIELDS_BITSIZE (fields) = size;
1129
}
1130
 
1131
/* Function to call before using the operand instance table.
1132
   This plugs the opcode entries and macro instructions into the cpu table.  */
1133
 
1134
void
1135
xstormy16_cgen_init_opcode_table (CGEN_CPU_DESC cd)
1136
{
1137
  int i;
1138
  int num_macros = (sizeof (xstormy16_cgen_macro_insn_table) /
1139
                    sizeof (xstormy16_cgen_macro_insn_table[0]));
1140
  const CGEN_IBASE *ib = & xstormy16_cgen_macro_insn_table[0];
1141
  const CGEN_OPCODE *oc = & xstormy16_cgen_macro_insn_opcode_table[0];
1142
  CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN));
1143
 
1144
  /* This test has been added to avoid a warning generated
1145
     if memset is called with a third argument of value zero.  */
1146
  if (num_macros >= 1)
1147
    memset (insns, 0, num_macros * sizeof (CGEN_INSN));
1148
  for (i = 0; i < num_macros; ++i)
1149
    {
1150
      insns[i].base = &ib[i];
1151
      insns[i].opcode = &oc[i];
1152
      xstormy16_cgen_build_insn_regex (& insns[i]);
1153
    }
1154
  cd->macro_insn_table.init_entries = insns;
1155
  cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
1156
  cd->macro_insn_table.num_init_entries = num_macros;
1157
 
1158
  oc = & xstormy16_cgen_insn_opcode_table[0];
1159
  insns = (CGEN_INSN *) cd->insn_table.init_entries;
1160
  for (i = 0; i < MAX_INSNS; ++i)
1161
    {
1162
      insns[i].opcode = &oc[i];
1163
      xstormy16_cgen_build_insn_regex (& insns[i]);
1164
    }
1165
 
1166
  cd->sizeof_fields = sizeof (CGEN_FIELDS);
1167
  cd->set_fields_bitsize = set_fields_bitsize;
1168
 
1169
  cd->asm_hash_p = asm_hash_insn_p;
1170
  cd->asm_hash = asm_hash_insn;
1171
  cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
1172
 
1173
  cd->dis_hash_p = dis_hash_insn_p;
1174
  cd->dis_hash = dis_hash_insn;
1175
  cd->dis_hash_size = CGEN_DIS_HASH_SIZE;
1176
}

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