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[/] [open_hitter/] [trunk/] [sim/] [rtl_sim/] [src/] [search_control_sim.vhd] - Blame information for rev 20

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1 20 stvhawes
--////////////////////////////////////////////////////////////////////
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--//                                                              ////
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--// search_control_sim.vhd                                       ////
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--//                                                              ////
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--// This file is part of the open_hitter opencores effort.       ////
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--// <http://www.opencores.org/cores/open_hitter/>                ////
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--//                                                              ////
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--// Module Description:                                          ////
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--// Simulation program (synthesizable)                           ////
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--// Unit test for search_control.vhd                             ////
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--//                                                              ////
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--// To Do:                                                       ////
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--//    #LOTS                                                     ////
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--//                                                              ////
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--// Author(s):                                                   ////
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--// - Stephen Hawes                                              ////
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--//                                                              ////
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--////////////////////////////////////////////////////////////////////
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--//                                                              ////
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--// Copyright (C) 2015 Stephen Hawes and OPENCORES.ORG           ////
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--//                                                              ////
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--// This source file may be used and distributed without         ////
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--// restriction provided that this copyright statement is not    ////
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--// removed from the file and that any derivative work contains  ////
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--// the original copyright notice and the associated disclaimer. ////
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--//                                                              ////
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--// This source file is free software; you can redistribute it   ////
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--// and/or modify it under the terms of the GNU Lesser General   ////
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--// Public License as published by the Free Software Foundation; ////
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--// either version 2.1 of the License, or (at your option) any   ////
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--// later version.                                               ////
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--//                                                              ////
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--// This source is distributed in the hope that it will be       ////
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--// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
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--// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
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--// PURPOSE. See the GNU Lesser General Public License for more  ////
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--// details.                                                     ////
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--//                                                              ////
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--// You should have received a copy of the GNU Lesser General    ////
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--// Public License along with this source; if not, download it   ////
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--// from <http://www.opencores.org/lgpl.shtml>                   ////
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--//                                                              ////
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--////////////////////////////////////////////////////////////////////
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--//
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--// \$Id\$  TAKE OUT THE \'s and this comment in order to get this to work
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--//
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--// CVS Revision History
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--//
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--// \$Log\$  TAKE OUT THE \'s and this comment in order to get this to work
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--//
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.ALL;
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entity search_control_sim is
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  port (
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            RX_CLK: in std_logic;
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            restart: in std_logic;
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            processing: out std_logic;
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            result_one: out std_logic;
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            result_two: out std_logic;
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            result_all_ok: out std_logic
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  );
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end search_control_sim;
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architecture behav of search_control_sim is
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   component search_control is
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      generic ( searchitems : integer );
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      port (
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           RX_CLK: in std_logic;
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           -- control flag(s) on the incoming bus
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              search_px_valid_i: in std_logic;
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           -- pxdata: in price_packet
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              search_px_type_i: in std_logic_vector(4 downto 0);
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              search_buy_sell_i: in std_logic_vector(2 downto 0);   -- 111 buy, 000 sell
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              search_px_i: in std_logic_vector(15 downto 0);     -- price
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              search_qty_i: in std_logic_vector(15 downto 0);    -- quantity
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              search_sec_i: in std_logic_vector(55 downto 0);    -- 7x 8bits securities identifier
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              search_id_i: in std_logic_vector(15 downto 0);    -- unique/identifier/counter
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           -- pxdata: out price_packet
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              order_px_type_o: out std_logic_vector(4 downto 0);
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              order_buy_sell_o: out std_logic_vector(2 downto 0);   -- 111 buy, 000 sell
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              order_px_o: out std_logic_vector(15 downto 0);     -- price
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              order_qty_o: out std_logic_vector(15 downto 0);    -- quantity
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              order_sec_o: out std_logic_vector(55 downto 0);    -- 7x 8bits securities identifier
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              order_id_o: out std_logic_vector(15 downto 0);     -- unique/identifier/counter
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           -- control flag(s) on the outgoing bus
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              order_px_valid_o: out std_logic
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        );
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   end component;
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   for search_control_0: search_control use entity work.search_control;
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        -- control flag(s) on the incoming bus
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           signal search_px_valid_i: std_logic;
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        -- pxdata: in price_packet
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           signal search_px_type_i: std_logic_vector(4 downto 0);
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           signal search_buy_sell_i: std_logic_vector(2 downto 0);   -- 111 buy, 000 sell
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           signal search_px_i: std_logic_vector(15 downto 0);     -- price
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           signal search_qty_i: std_logic_vector(15 downto 0);    -- quantity
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           signal search_sec_i: std_logic_vector(55 downto 0);    -- 7x 8bits securities identifier
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           signal search_id_i: std_logic_vector(15 downto 0);    -- unique/identifier/counter
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        -- pxdata: out price_packet
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           signal order_px_type_o: std_logic_vector(4 downto 0);
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           signal order_buy_sell_o: std_logic_vector(2 downto 0);   -- 111 buy, 000 sell
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           signal order_px_o: std_logic_vector(15 downto 0);     -- price
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           signal order_qty_o: std_logic_vector(15 downto 0);    -- quantity
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           signal order_sec_o: std_logic_vector(55 downto 0);    -- 7x 8bits securities identifier
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           signal order_id_o: std_logic_vector(15 downto 0);     -- unique/identifier/counter
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        -- control
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           signal order_px_valid_o: std_logic;
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begin
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    --  Component instantiation.
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        search_control_0: search_control
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           generic map ( searchitems => 4 )   -- for test case when full at 4 orders
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           port map (
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              RX_CLK => RX_CLK,
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           -- control flag(s) on the incoming bus
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              search_px_valid_i => search_px_valid_i,
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           -- pxdata: in price_packet
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              search_px_type_i => search_px_type_i,
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              search_buy_sell_i => search_buy_sell_i,
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              search_px_i => search_px_i,
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              search_qty_i => search_qty_i,
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              search_sec_i => search_sec_i,
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              search_id_i => search_id_i,
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           -- pxdata: out price_packet
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              order_px_type_o => order_px_type_o,
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              order_buy_sell_o => order_buy_sell_o,
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              order_px_o => order_px_o,
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              order_qty_o => order_qty_o,
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              order_sec_o => order_sec_o,
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              order_id_o => order_id_o,
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           -- control
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              order_px_valid_o => order_px_valid_o
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           );
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    --
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    process (RX_CLK) is
137
        type input_pattern_type is record
138
           -- control flag(s) on the incoming bus
139
              search_px_valid_i: std_logic;
140
           -- pxdata: in price_packet
141
              search_px_type_i: std_logic_vector(4 downto 0);
142
              search_buy_sell_i: std_logic_vector(2 downto 0);   -- 111 buy, 000 sell
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              search_px_i: std_logic_vector(15 downto 0);     -- price
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              search_qty_i: std_logic_vector(15 downto 0);    -- quantity
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              search_sec_i: std_logic_vector(55 downto 0);    -- 7x 8bits securities identifier
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              -- search_id_i: std_logic_vector(15 downto 0);    -- unique/identifier/counter
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         end record;
148
         type output_pattern_type is record
149
            -- pxdata: out price_packet
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              order_px_type_o: std_logic_vector(4 downto 0);
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              order_buy_sell_o: std_logic_vector(2 downto 0);   -- 111 buy, 000 sell
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              order_px_o: std_logic_vector(15 downto 0);     -- price
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              order_qty_o: std_logic_vector(15 downto 0);    -- quantity
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              order_sec_o: std_logic_vector(55 downto 0);    -- 7x 8bits securities identifier
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              order_id_o: std_logic_vector(15 downto 0);      -- unique/identifier/counter
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         end record;
157
 
158
         --  The patterns to apply.
159
         constant zz_px: std_logic_vector(15 downto 0) := (others => 'Z');
160
         constant zz_qty: std_logic_vector(15 downto 0) := (others => 'Z');
161
         constant zz_sec: std_logic_vector(55 downto 0) := (others => 'Z');
162
         constant zz_id: std_logic_vector(15 downto 0) := (others => 'Z');
163
         constant set_qty: std_logic_vector(15 downto 0) := std_logic_vector'("0000000000010000");
164
         constant test_px: std_logic_vector(15 downto 0) := std_logic_vector'("0000000011100000");
165
         constant test_qty: std_logic_vector(15 downto 0) := std_logic_vector'("0000000000001100");
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         constant remain_qty: std_logic_vector(15 downto 0) := std_logic_vector'("0000000000000100");
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         constant test_sec0: std_logic_vector(55 downto 0) := std_logic_vector'(X"ABA544223478DC");
168
         constant test_sec1: std_logic_vector(55 downto 0) := std_logic_vector'(X"ABA543332178DC");
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         constant test_sec2: std_logic_vector(55 downto 0) := std_logic_vector'(X"ABA234234378DC");
170
         constant test_sec3: std_logic_vector(55 downto 0) := std_logic_vector'(X"ABA534534578DC");
171
         constant test_id: std_logic_vector(15 downto 0) := std_logic_vector'("0110011001100110");
172
         constant other_id: std_logic_vector(15 downto 0) := std_logic_vector'("0000010001100010");
173
         constant other_px: std_logic_vector(15 downto 0) := std_logic_vector'("0000000000001110");
174
         constant other_sec: std_logic_vector(55 downto 0) := std_logic_vector'(X"CDC423354634AA");
175
         type input_pattern_array is array (natural range <>) of input_pattern_type;
176
           constant input_patterns : input_pattern_array :=
177
             ( ('1', std_logic_vector'("00000"), std_logic_vector'("ZZZ"), zz_px, zz_qty, zz_sec), -- 0 reset
178
               ('1', std_logic_vector'("ZZZZZ"), std_logic_vector'("ZZZ"), zz_px, zz_qty, zz_sec), -- 1 nothing
179
               ('1', std_logic_vector'("00110"), std_logic_vector'("000"), test_px, set_qty, test_sec0),  -- 2 sec/set
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               ('1', std_logic_vector'("00110"), std_logic_vector'("000"), test_px, set_qty, test_sec1),  -- 3 sec/set
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               ('1', std_logic_vector'("00110"), std_logic_vector'("000"), test_px, set_qty, test_sec1),  -- 4 sec/set - repeat
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               ('1', std_logic_vector'("00110"), std_logic_vector'("111"), test_px, set_qty, test_sec2),  -- 5 sec/set
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               ('1', std_logic_vector'("00110"), std_logic_vector'("000"), test_px, set_qty, test_sec2),  -- 6 sec/set - diff buysell
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               ('1', std_logic_vector'("00110"), std_logic_vector'("000"), test_px, set_qty, test_sec3),  -- 7 too many sec/set
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               ('1', std_logic_vector'("11100"), std_logic_vector'("111"), test_px, test_qty, test_sec1),   -- 8 incoming px
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               ('1', std_logic_vector'("11100"), std_logic_vector'("111"), test_px, zz_qty, other_sec),   -- 9 incoming px (wrong security)
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               ('1', std_logic_vector'("11100"), std_logic_vector'("111"), other_px, test_qty, test_sec1),   -- 10incoming px (too low sale price)
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               ('1', std_logic_vector'("11100"), std_logic_vector'("111"), test_px, test_qty, test_sec1) ); -- 11incoming px (part qty)
189
         type output_pattern_array is array (natural range <>) of output_pattern_type;
190
           constant output_patterns : output_pattern_array :=
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             ( (std_logic_vector'("00000"), std_logic_vector'("ZZZ"), zz_px, zz_qty, zz_sec, zz_id),  -- 0 reset
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               (std_logic_vector'("ZZZZZ"), std_logic_vector'("ZZZ"), zz_px, zz_qty, zz_sec, zz_id),  -- 1 nothing
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               (std_logic_vector'("01010"), std_logic_vector'("ZZZ"), zz_px, zz_qty, zz_sec, std_logic_vector'(X"0000")),  -- 2 sec/set
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               (std_logic_vector'("01010"), std_logic_vector'("ZZZ"), zz_px, zz_qty, zz_sec, std_logic_vector'(X"0001")),  -- 3 sec/set
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               (std_logic_vector'("00110"), std_logic_vector'("ZZZ"), zz_px, zz_qty, zz_sec, std_logic_vector'(X"0001")),  -- 4 sec/set
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               (std_logic_vector'("01010"), std_logic_vector'("ZZZ"), zz_px, zz_qty, zz_sec, std_logic_vector'(X"0002")),  -- 5 sec/set
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               (std_logic_vector'("01010"), std_logic_vector'("ZZZ"), zz_px, zz_qty, zz_sec, std_logic_vector'(X"0003")),  -- 6 sec/set
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               (std_logic_vector'("11111"), std_logic_vector'("ZZZ"), zz_px, zz_qty, zz_sec, zz_id),  -- 7 bad sec/set (too many)
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               (std_logic_vector'("11100"), std_logic_vector'("000"), test_px, test_qty, test_sec1, std_logic_vector'(X"0001")),  -- 8 incoming px
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               (std_logic_vector'("11110"), std_logic_vector'("ZZZ"), zz_px, zz_qty, zz_sec, zz_id),  -- 9 incoming px (wrong security)
201
               (std_logic_vector'("11101"), std_logic_vector'("ZZZ"), zz_px, zz_qty, zz_sec, zz_id),  -- 10incoming px (too low sale price)
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               (std_logic_vector'("11100"), std_logic_vector'("000"), test_px, remain_qty, test_sec1, std_logic_vector'(X"0001")) );  -- 11incoming px (part qty)
203
 
204
       -- process control
205
       variable pos: integer;
206
       variable i: integer := 99;   -- pattern id
207
       variable subcount: integer := 99;   -- pattern step
208
       variable res: integer;
209
       variable res_ok: std_logic;
210
    begin
211
       if rising_edge(RX_CLK) then
212
           if restart = '1'  then
213
              i := 0;
214
              subcount := 0;
215
              --
216
              result_all_ok <= '0';
217
              result_one <= '0';
218
              result_two <= '0';
219
              processing <= '0';
220
           end if;
221
 
222
           --  Pattern step
223
           if i < input_patterns'right+1 then
224
              -- diagnostics (uncomment)
225
              -- write (l, String'("Wrapper start loop i: "));
226
              -- write (l, i);
227
              -- writeline (output, l);
228
 
229
              processing <= '1';
230
 
231
              if subcount = 0 then
232
                 --  Set the inputs.
233
                 search_px_valid_i <= input_patterns(i).search_px_valid_i;
234
                 search_px_type_i <= input_patterns(i).search_px_type_i;
235
                 search_buy_sell_i <= input_patterns(i).search_buy_sell_i;
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                 search_px_i <= input_patterns(i).search_px_i;
237
                 search_qty_i <= input_patterns(i).search_qty_i;
238
                 search_sec_i <= input_patterns(i).search_sec_i;
239
                 --search_id_i <= input_patterns(i).search_id_i;
240
                 res := 0;
241
                 res_ok := '1';
242
                 subcount := 1;
243
              else
244
                 -- reset the go instruction
245
                 search_px_valid_i <= '0';
246
                 --  Check the outputs.
247
 
248
                 -- diagnostics (uncomment)
249
                 -- write (l, String'("  Wrapper wait results r: "));
250
                 -- write (l, r);
251
                 -- write (l, String'(" order_px_valid_o: "));
252
                 -- write (l, std_logic'image(order_px_valid_o));
253
                 -- writeline (output, l);
254
 
255
                 -- got a return .. check it
256
                 if order_px_valid_o = '1' then
257
 
258
                    if order_px_type_o /= output_patterns(i).order_px_type_o
259
                       or order_buy_sell_o /= output_patterns(i).order_buy_sell_o
260
                       or order_px_o /= output_patterns(i).order_px_o
261
                       or order_qty_o /= output_patterns(i).order_qty_o
262
                       or order_sec_o /= output_patterns(i).order_sec_o
263
                       or order_id_o /= output_patterns(i).order_id_o  then
264
                       --
265
                       res_ok := '0';
266
                    end if;
267
                    res := res + 1;
268
                 end if;
269
 
270
                 if subcount = 4 then
271
                    -- check result
272
                    if res /= 1 then
273
                       res_ok := '0';
274
                    end if;
275
 
276
                    -- reporting
277
                    if i = 11 then
278
                       result_all_ok <= res_ok;  -- success!
279
                    elsif i = 6 then
280
                       result_two <= res_ok;     -- loader tasks oka
281
                    elsif i = 0 then
282
                       result_one <= res_ok;     -- initial reset worked
283
                    end if;
284
 
285
                    -- next pattern
286
                    i := i + 1;
287
                    subcount := 0;
288
                 else
289
                    subcount := subcount + 1;
290
                 end if;
291
              end if;
292
           else
293
              -- not processing (done or not started)
294
              processing <= '0';
295
           end if;   -- i
296
 
297
       end if;        -- RX_CLK
298
    end process;
299
end behav;

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