| 1 |
3 |
dgisselq |
##########################################################################/
|
| 2 |
|
|
##
|
| 3 |
|
|
## Filename: Makefile
|
| 4 |
|
|
##
|
| 5 |
|
|
## Project: OpenArty, an entirely open SoC based upon the Arty platform
|
| 6 |
|
|
##
|
| 7 |
|
|
## Purpose: To direct the Verilator build of the SoC sources. The result
|
| 8 |
|
|
## is C++ code (built by Verilator), that is then built (herein)
|
| 9 |
|
|
## into a library.
|
| 10 |
|
|
##
|
| 11 |
|
|
##
|
| 12 |
|
|
## Creator: Dan Gisselquist, Ph.D.
|
| 13 |
|
|
## Gisselquist Technology, LLC
|
| 14 |
|
|
##
|
| 15 |
|
|
##########################################################################/
|
| 16 |
|
|
##
|
| 17 |
|
|
## Copyright (C) 2015, Gisselquist Technology, LLC
|
| 18 |
|
|
##
|
| 19 |
|
|
## This program is free software (firmware): you can redistribute it and/or
|
| 20 |
|
|
## modify it under the terms of the GNU General Public License as published
|
| 21 |
|
|
## by the Free Software Foundation, either version 3 of the License, or (at
|
| 22 |
|
|
## your option) any later version.
|
| 23 |
|
|
##
|
| 24 |
|
|
## This program is distributed in the hope that it will be useful, but WITHOUT
|
| 25 |
|
|
## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
|
| 26 |
|
|
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
| 27 |
|
|
## for more details.
|
| 28 |
|
|
##
|
| 29 |
|
|
## License: GPL, v3, as defined and found on www.gnu.org,
|
| 30 |
|
|
## http:##www.gnu.org/licenses/gpl.html
|
| 31 |
|
|
##
|
| 32 |
|
|
##
|
| 33 |
|
|
##########################################################################/
|
| 34 |
|
|
##
|
| 35 |
|
|
##
|
| 36 |
|
|
all: test
|
| 37 |
|
|
YYMMDD=`date +%Y%m%d`
|
| 38 |
|
|
CXX := g++
|
| 39 |
|
|
FBDIR := .
|
| 40 |
|
|
VDIRFB:= $(FBDIR)/obj_dir
|
| 41 |
|
|
|
| 42 |
|
|
.PHONY: test
|
| 43 |
|
|
test: $(VDIRFB)/Veqspiflash__ALL.a
|
| 44 |
|
|
test: $(VDIRFB)/Venetctrl__ALL.a
|
| 45 |
|
|
# test: $(VDIRFB)/Vfastmaster__ALL.a
|
| 46 |
25 |
dgisselq |
test: $(VDIRFB)/Vbusmaster__ALL.a
|
| 47 |
3 |
dgisselq |
|
| 48 |
|
|
CPUDR := cpu
|
| 49 |
|
|
CPUSOURCESnD := zipcpu.v fastops.v pfcache.v pipemem.v \
|
| 50 |
|
|
pfcache.v ifastdec.v wbpriarbiter.v zipbones.v \
|
| 51 |
|
|
zipsystem.v zipcounter.v zipjiffies.v ziptimer.v \
|
| 52 |
|
|
wbdmac.v icontrol.v wbwatchdog.v
|
| 53 |
|
|
CPUSOURCES := $(addprefix $(CPUDR)/,$(CPUSOURCESnD))
|
| 54 |
|
|
|
| 55 |
|
|
JTAGBUS := wbufifo.v wbubus.v wbucompactlines.v \
|
| 56 |
|
|
wbucompress.v wbudecompress.v wbudeword.v wbuexec.v \
|
| 57 |
|
|
wbuidleint.v wbuinput.v wbuoutput.v wbureadcw.v wbusixchar.v \
|
| 58 |
|
|
wbutohex.v
|
| 59 |
25 |
dgisselq |
PERIPHERALS:= enetctrl.v fastio.v rtcdate.v rtcgps.v \
|
| 60 |
12 |
dgisselq |
rxuart.v txuart.v eqspiflash.v lleqspi.v flash_config.v \
|
| 61 |
3 |
dgisselq |
wbicapetwo.v sdspi.v gpsclock_tb.v gpsclock.v wboled.v lloled.v \
|
| 62 |
|
|
wbscopc.v wbscope.v memdev.v wbddrsdram.v
|
| 63 |
|
|
BIGMATH:= bigadd.v bigsmpy.v bigsub.v
|
| 64 |
|
|
SOURCES := fastmaster.v builddate.v \
|
| 65 |
|
|
$(CPUSOURCES) $(JTAGBUS) $(PERIPHERALS) $(BIGMATH)
|
| 66 |
|
|
SLOWSRC := busmaster.v builddate.v \
|
| 67 |
|
|
$(CPUSOURCES) $(JTAGBUS) $(PERIPHERALS) $(BIGMATH)
|
| 68 |
|
|
|
| 69 |
|
|
$(VDIRFB)/Vfastmaster__ALL.a: $(VDIRFB)/Vfastmaster.h $(VDIRFB)/Vfastmaster.cpp
|
| 70 |
|
|
$(VDIRFB)/Vfastmaster__ALL.a: $(VDIRFB)/Vfastmaster.mk
|
| 71 |
|
|
$(VDIRFB)/Vfastmaster.h $(VDIRFB)/Vfastmaster.cpp $(VDIRFB)/Vfastmaster.mk: $(SOURCES)
|
| 72 |
|
|
|
| 73 |
|
|
$(VDIRFB)/Vbusmaster__ALL.a: $(VDIRFB)/Vbusmaster.h $(VDIRFB)/Vbusmaster.cpp
|
| 74 |
|
|
$(VDIRFB)/Vbusmaster__ALL.a: $(VDIRFB)/Vbusmaster.mk
|
| 75 |
|
|
$(VDIRFB)/Vbusmaster.h $(VDIRFB)/Vbusmaster.cpp $(VDIRFB)/Vbusmaster.mk: $(SLOWSRC)
|
| 76 |
|
|
|
| 77 |
|
|
$(VDIRFB)/Venetctrl.h $(VDIRFB)/Venetctrl.cpp $(VDIRFB)/Venetctrl.mk: enetctrl.v
|
| 78 |
12 |
dgisselq |
$(VDIRFB)/Veqspiflash.h $(VDIRFB)/Veqspiflash.cpp $(VDIRFB)/Veqspiflash.mk: eqspiflash.v lleqspi.v
|
| 79 |
3 |
dgisselq |
$(VDIRFB)/V%.cpp $(VDIRFB)/V%.h $(VDIRFB)/V%.mk: $(FBDIR)/%.v
|
| 80 |
|
|
verilator -cc -y $(CPUDR) $*.v
|
| 81 |
|
|
|
| 82 |
|
|
|
| 83 |
|
|
$(VDIRFB)/V%__ALL.a: $(VDIRFB)/V%.mk
|
| 84 |
|
|
cd $(VDIRFB); make -f V$*.mk
|
| 85 |
|
|
|
| 86 |
|
|
.PHONY:
|
| 87 |
|
|
archive:
|
| 88 |
|
|
tar --transform s,^,$(YYMMDD)-rtl/, -chjf $(YYMMDD)-rtl.tjz Makefile *.v cpu/*.v
|
| 89 |
|
|
|
| 90 |
|
|
.PHONY: clean
|
| 91 |
|
|
clean:
|
| 92 |
|
|
rm -rf $(VDIRFB)/*.mk
|
| 93 |
|
|
rm -rf $(VDIRFB)/*.cpp
|
| 94 |
|
|
rm -rf $(VDIRFB)/*.h
|
| 95 |
|
|
rm -rf $(VDIRFB)/
|
| 96 |
|
|
|