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[/] [openarty/] [trunk/] [rtl/] [rxemin.v] - Blame information for rev 48

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1 33 dgisselq
////////////////////////////////////////////////////////////////////////////////
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//
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// Filename:    rxemin.v
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//
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// Project:     OpenArty, an entirely open SoC based upon the Arty platform
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//
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// Purpose:     To force the minimum received packet size of an ethernet frame
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//              to be a minimum of 64 bytes.  Packets less than 64-bytes
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//              (including CRC) need to be dropped.  This module handles that
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//      logic.
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//
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// Creator:     Dan Gisselquist, Ph.D.
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//              Gisselquist Technology, LLC
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2016, Gisselquist Technology, LLC
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//
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// This program is free software (firmware): you can redistribute it and/or
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// modify it under the terms of  the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or (at
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// your option) any later version.
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//
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with this program.  (It's in the $(ROOT)/doc directory, run make with no
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// target there if the PDF file isn't present.)  If not, see
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// <http://www.gnu.org/licenses/> for a copy.
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//
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// License:     GPL, v3, as defined and found on www.gnu.org,
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//              http://www.gnu.org/licenses/gpl.html
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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module rxemin(i_clk, i_ce, i_en, i_cancel, i_v, i_d, o_v, o_d, o_err);
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        parameter       MINNIBBLES=120;
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        localparam      LGNCOUNT=(MINNIBBLES<63)? 6
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                                :((MINNIBBLES<127)? 7:((MINNIBBLES<255)? 8:9));
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        input                   i_clk, i_ce, i_en, i_cancel;
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        input                   i_v;    // Valid
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        input           [3:0]    i_d;    // Data nibble
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        output  reg             o_err;
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        reg     last_v;
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        reg     [(LGNCOUNT-1):0] r_ncnt;
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        initial o_v = 1'b0;
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        initial last_v = 1'b0;
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        always @(posedge i_clk)
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        if (i_ce)
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        begin
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                last_v <= i_v;
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                if (((!i_v)&&(!o_v))||(i_cancel))
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                begin
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                        r_ncnt <= 0;
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                        o_err  <= 0;
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                end else if (i_v)
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                begin
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                        r_ncnt <= (r_ncnt<MINNIBBLES) ? r_ncnt+1'b1 : r_ncnt;
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                end else if (last_v)
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                        o_err <= (i_en)&&(r_ncnt < MINNIBBLES);
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        end
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endmodule

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