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[/] [openarty/] [trunk/] [sw/] [host/] [flashdrvr.cpp] - Blame information for rev 25

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1 14 dgisselq
////////////////////////////////////////////////////////////////////////////////
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//
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// Filename:    flashdrvr.cpp
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//
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// Project:     OpenArty, an entirely open SoC based upon the Arty platform
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//
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// Purpose:     Flash driver.  Encapsulates the erasing and programming (i.e.
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//              writing) necessary to set the values in a flash device.
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//
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// Creator:     Dan Gisselquist, Ph.D.
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//              Gisselquist Technology, LLC
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2015-2016, Gisselquist Technology, LLC
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//
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// This program is free software (firmware): you can redistribute it and/or
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// modify it under the terms of  the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or (at
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// your option) any later version.
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//
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with this program.  (It's in the $(ROOT)/doc directory, run make with no
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// target there if the PDF file isn't present.)  If not, see
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// <http://www.gnu.org/licenses/> for a copy.
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//
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// License:     GPL, v3, as defined and found on www.gnu.org,
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//              http://www.gnu.org/licenses/gpl.html
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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//
39 4 dgisselq
#include <stdio.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <strings.h>
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#include <ctype.h>
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#include <string.h>
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#include <signal.h>
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#include <assert.h>
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#include "port.h"
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#include "regdefs.h"
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#include "flashdrvr.h"
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const   bool    HIGH_SPEED = false;
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54 14 dgisselq
#define SETSCOPE m_fpga->writeio(R_QSCOPE, 8180)
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56
 
57 4 dgisselq
void    FLASHDRVR::flwait(void) {
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        DEVBUS::BUSW    v;
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        v = m_fpga->readio(R_QSPI_EREG);
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        if ((v&ERASEFLAG)==0)
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                return;
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        m_fpga->writeio(R_ICONTROL, ISPIF_DIS);
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        m_fpga->clear();
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        m_fpga->writeio(R_ICONTROL, ISPIF_EN);
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67
        do {
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                // Start by checking that we are still erasing.  The interrupt
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                // may have been generated while we were setting things up and
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                // disabling things, so this just double checks for us.  If
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                // the interrupt was tripped, we're done.  If not, we can now
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                // wait for an interrupt.
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                v = m_fpga->readio(R_QSPI_EREG);
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                if (v&ERASEFLAG) {
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                        m_fpga->usleep(400);
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                        if (m_fpga->poll()) {
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                                m_fpga->clear();
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                                m_fpga->writeio(R_ICONTROL, ISPIF_EN);
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                        }
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                }
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        } while(v & ERASEFLAG);
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}
83
 
84
bool    FLASHDRVR::erase_sector(const unsigned sector, const bool verify_erase) {
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        DEVBUS::BUSW    page[SZPAGEW];
86 4 dgisselq
 
87 18 dgisselq
        printf("EREG before   : %08x\n", m_fpga->readio(R_QSPI_EREG));
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        printf("Erasing sector: %08x\n", sector);
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        m_fpga->writeio(R_QSPI_EREG, DISABLEWP);
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        printf("EREG with WEL : %08x\n", m_fpga->readio(R_QSPI_EREG));
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        SETSCOPE;
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        m_fpga->writeio(R_QSPI_EREG, ERASEFLAG + sector);
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        printf("EREG after    : %08x\n", m_fpga->readio(R_QSPI_EREG));
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95
        // If we're in high speed mode and we want to verify the erase, then
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        // we can skip waiting for the erase to complete by issueing a read
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        // command immediately.  As soon as the erase completes the read will
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        // begin sending commands back.  This allows us to recover the lost 
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        // time between the interrupt and the next command being received.
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        if  ((!HIGH_SPEED)||(!verify_erase)) {
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                flwait();
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103
                printf("@%08x -> %08x\n", R_QSPI_EREG,
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                                m_fpga->readio(R_QSPI_EREG));
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                printf("@%08x -> %08x\n", R_QSPI_STAT,
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                                m_fpga->readio(R_QSPI_STAT));
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                printf("@%08x -> %08x\n", sector,
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                                m_fpga->readio(sector));
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        }
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        // Now, let's verify that we erased the sector properly
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        if (verify_erase) {
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                for(int i=0; i<NPAGES; i++) {
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                        m_fpga->readi(sector+i*SZPAGEW, SZPAGEW, page);
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                        for(int i=0; i<SZPAGEW; i++)
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                                if (page[i] != 0xffffffff)
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                                        return false;
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                }
119
        }
120
 
121
        return true;
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}
123
 
124
bool    FLASHDRVR::write_page(const unsigned addr, const unsigned len,
125
                const unsigned *data, const bool verify_write) {
126 14 dgisselq
        DEVBUS::BUSW    buf[SZPAGEW];
127 4 dgisselq
 
128
        assert(len > 0);
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        assert(len <= PGLENW);
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        assert(PAGEOF(addr)==PAGEOF(addr+len-1));
131
 
132
        if (len <= 0)
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                return true;
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135
        // Write the page
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        m_fpga->writeio(R_ICONTROL, ISPIF_DIS);
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        m_fpga->clear();
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        m_fpga->writeio(R_ICONTROL, ISPIF_EN);
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        printf("Writing page: 0x%08x - 0x%08x\n", addr, addr+len-1);
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        m_fpga->writeio(R_QSPI_EREG, DISABLEWP);
141 14 dgisselq
        SETSCOPE;
142 4 dgisselq
        m_fpga->writei(addr, len, data);
143
 
144
        // If we're in high speed mode and we want to verify the write, then
145
        // we can skip waiting for the write to complete by issueing a read
146
        // command immediately.  As soon as the write completes the read will
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        // begin sending commands back.  This allows us to recover the lost 
148
        // time between the interrupt and the next command being received.
149
        flwait();
150
        // if ((!HIGH_SPEED)||(!verify_write)) { }
151
        if (verify_write) {
152
                // printf("Attempting to verify page\n");
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                // NOW VERIFY THE PAGE
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                m_fpga->readi(addr, len, buf);
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                for(int i=0; i<len; i++) {
156
                        if (buf[i] != data[i]) {
157
                                printf("\nVERIFY FAILS[%d]: %08x\n", i, i+addr);
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                                printf("\t(Flash[%d]) %08x != %08x (Goal[%08x])\n",
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                                        i, buf[i], data[i], i+addr);
160
                                return false;
161
                        }
162
                } // printf("\nVerify success\n");
163
        } return true;
164
}
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166 18 dgisselq
#define VCONF_VALUE     0x8b
167
 
168
bool    FLASHDRVR::verify_config(void) {
169
        unsigned cfg = m_fpga->readio(R_QSPI_VCONF);
170
        printf("CFG = %02x\n", cfg);
171
        return (cfg == VCONF_VALUE);
172
}
173
 
174
void    FLASHDRVR::set_config(void) {
175
        // There is some delay associated with these commands, but it should
176
        // be dwarfed by the communication delay.  If you wish to do this on the
177
        // device itself, you may need to use some timers.
178
        //
179
        // Set the write-enable latch
180
        m_fpga->writeio(R_QSPI_EREG, DISABLEWP);
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        // Set the volatile configuration register
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        m_fpga->writeio(R_QSPI_VCONF, VCONF_VALUE);
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        // Clear the write-enable latch, since it didn't clear automatically
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        printf("EREG = %08x\n", m_fpga->readio(R_QSPI_EREG));
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        m_fpga->writeio(R_QSPI_EREG, ENABLEWP);
186
}
187
 
188 4 dgisselq
bool    FLASHDRVR::write(const unsigned addr, const unsigned len,
189
                const unsigned *data, const bool verify) {
190 18 dgisselq
 
191
        if (!verify_config()) {
192
                set_config();
193
                if (!verify_config())
194
                        return false;
195
        }
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        // Work through this one sector at a time.
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        // If this buffer is equal to the sector value(s), go on
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        // If not, erase the sector
200
 
201
        // m_fpga->writeio(R_QSPI_CREG, 2);
202
        // m_fpga->readio(R_VERSION);   // Read something innocuous
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204
        // Just to make sure the driver knows that these values are ...
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        // m_fpga->readio(R_QSPI_CREG);
206
        // m_fpga->readio(R_QSPI_SREG);
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        // Because the status register may invoke protections here, we
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        // void them.
209
        // m_fpga->writeio(R_QSPI_SREG, 0);
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        // m_fpga->readio(R_VERSION);   // Read something innocuous
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212 14 dgisselq
        for(unsigned s=SECTOROF(addr); s<SECTOROF(addr+len+SECTORSZW-1); s+=SECTORSZW) {
213 4 dgisselq
                // printf("IN LOOP, s=%08x\n", s);
214
                // Do we need to erase?
215
                bool    need_erase = false;
216
                unsigned newv = 0; // (s<addr)?addr:s;
217
                {
218 14 dgisselq
                        DEVBUS::BUSW    *sbuf = new DEVBUS::BUSW[SECTORSZW];
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                        const DEVBUS::BUSW *dp;
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                        unsigned        base,ln;
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                        base = (addr>s)?addr:s;
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                        ln=((addr+len>s+SECTORSZW)?(s+SECTORSZW):(addr+len))-base;
223 4 dgisselq
                        m_fpga->readi(base, ln, sbuf);
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225
                        dp = &data[base-addr];
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                        for(unsigned i=0; i<ln; i++) {
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                                if ((sbuf[i]&dp[i]) != dp[i]) {
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                                        printf("\nNEED-ERASE @0x%08x ... %08x != %08x (Goal)\n",
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                                                i+base-addr, sbuf[i], dp[i]);
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                                        need_erase = true;
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                                        newv = i+base;
232
                                        break;
233
                                } else if ((sbuf[i] != dp[i])&&(newv == 0)) {
234
                                        // if (newv == 0)
235
                                                // printf("MEM[%08x] = %08x (!= %08x (Goal))\n",
236
                                                        // i+base, sbuf[i], dp[i]);
237
                                        newv = i+base;
238
                                }
239
                        }
240
                }
241
 
242
                if (newv == 0)
243
                        continue; // This sector already matches
244
 
245
                // Just erase anyway
246
                if (!need_erase)
247
                        printf("NO ERASE NEEDED\n");
248
                else {
249
                        printf("ERASING SECTOR: %08x\n", s);
250
                        if (!erase_sector(s, verify)) {
251
                                printf("SECTOR ERASE FAILED!\n");
252
                                return false;
253
                        } newv = (s<addr) ? addr : s;
254
                }
255 14 dgisselq
                for(unsigned p=newv; (p<s+SECTORSZW)&&(p<addr+len); p=PAGEOF(p+PGLENW)) {
256 4 dgisselq
                        unsigned start = p, len = addr+len-start;
257
 
258
                        // BUT! if we cross page boundaries, we need to clip
259
                        // our results to the page boundary
260
                        if (PAGEOF(start+len-1)!=PAGEOF(start))
261 14 dgisselq
                                len = PAGEOF(start+PGLENW)-start;
262 4 dgisselq
                        if (!write_page(start, len, &data[p-addr], verify)) {
263
                                printf("WRITE-PAGE FAILED!\n");
264
                                return false;
265
                        }
266
                }
267
        }
268
 
269 14 dgisselq
        m_fpga->writeio(R_QSPI_EREG, ENABLEWP); // Re-enable write protection
270 4 dgisselq
 
271
        return true;
272
}
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